Commit Graph

71 Commits

Author SHA1 Message Date
Brian Norris a23eb34198 mtd: spi-nor: add DUAL_READ for w25q{32,64}dw
These flash support dual and quad read. Tested dual read on the 32 Mbit
version.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-10-19 09:50:44 -07:00
Brian Norris c6fc2171b2 mtd: spi-nor: disable protection for Winbond flash at startup
In case the flash was locked at boot time.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-10-13 18:22:56 -07:00
Brian Norris 357ca38d47 mtd: spi-nor: support lock/unlock/is_locked for Winbond
Many other flash share the same features as ST Micro. I've tested some
Winbond flash, so add them.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-10-13 18:22:55 -07:00
Brian Norris 5bf0e69b67 mtd: spi-nor: add mtd_is_locked() support
This enables ioctl(MEMISLOCKED). Status can now be reported in the
mtdinfo or flash_lock utilities found in mtd-utils.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-10-13 18:22:54 -07:00
Brian Norris 62593cf40b mtd: spi-nor: refactor block protection functions
This code was a bit sloppy, would produce a lot of copy-and-paste, and
did not always provide a sensible interface:

 * It didn't validate the length for LOCK and the offset for UNLOCK, so
   we were essentially discarding half of the user-supplied data and
   assuming what they wanted to lock/unlock
 * It didn't do very good error checking
 * It didn't make use of the fact that this operation works on
   power-of-two dimensions

So, rewrite this to do proper bit arithmetic rather than a bunch of
hard-coded condition tables. Now we have:

 * More comments on how this was derived
 * Notes on what is (and isn't) supported
 * A more exendible function, so we could add support for other
   protection ranges
 * More accurate locking - e.g., suppose the top quadrant is locked (75%
   to 100%); then in the following cases, case (a) will succeed but (b)
   will not (return -EINVAL):
     (a) user requests lock 3rd quadrant (50% to 75%)
     (b) user requests lock 3rd quadrant, minus a few blocks (e.g., 50%
         to 73%)
   Case (b) *should* fail, since we'd have to lock blocks that weren't
   requested. But the old implementation didn't know the difference and
   would lock the entire second half (50% to 100%)

This refactoring work will also help enable the addition of
mtd_is_locked() support and potentially the support of bottom boot
protection (TB=1).

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-10-13 18:22:54 -07:00
Brian Norris f0d2448e9a mtd: spi-nor: use SNOR_MFR_* instead of CFI_MFR_*
No functional change, just cosmetic.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-10-13 18:22:52 -07:00
Sean Nyekjaer 7c748f5774 mtd: spi-nor: Add support for s25fl004k
Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-10-13 12:56:50 -07:00
Sean Nyekjaer aada20cd2b mtd: spi-nor: s25fl204k supports dual I/0
Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-10-13 12:56:50 -07:00
Aurelien Chanot f9bcb6dc80 mtd: spi-nor: Add support for Micron n25q032a
The N25Q032A is identical to the N25Q032 except it has a different
supply voltage range. Therefore, it has a new JEDEC ID.

Signed-off-by: Aurelien Chanot <chanot.a@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-10-12 18:37:10 -07:00
Brian Norris 4404bd742d mtd: spi-nor: add support for w25q128fw
Tested only with single I/O, but the datasheet says it supports dual and
quad.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-09-29 13:25:12 -07:00
Furquan Shaikh 09b6a37768 mtd: spi-nor: scale up timeout for full-chip erase
This patch fixes timeout issues seen on large NOR flash (e.g., 16MB
w25q128fw) when using ioctl(MEMERASE) with offset=0 and length=16M. The
input parameters matter because spi_nor_erase() uses a different code
path for full-chip erase, where we use the SPINOR_OP_CHIP_ERASE (0xc7)
opcode.

Fix: use a different timeout for full-chip erase than for other
commands.

While most operations can be expected to perform relatively similarly
across a variety of NOR flash types and sizes (and therefore might as
well use a similar timeout to keep things simple), full-chip erase is
unique, because the time it typically takes to complete:
(1) is much larger than most operations and
(2) scales with the size of the flash.

Let's base our timeout on the original comments stuck here -- that a 2MB
flash requires max 40s to erase.

Small survey of a few flash datasheets I have lying around:

  Chip         Size (MB)   Max chip erase (seconds)
  ----         --------    ------------------------
  w25q32fw     4           50
  w25q64cv     8           30
  w25q64fw     8           100
  w25q128fw    16          200
  s25fl128s    16          ~256
  s25fl256s    32          ~512

From this data, it seems plenty sufficient to say we need to wait for
40 seconds for each 2MB of flash.

After this change, it might make some sense to decrease the timeout for
everything else, as even the most extreme operations (single block
erase?) shouldn't take more than a handful of seconds. But for safety,
let's leave it as-is. It's only an error case, after all, so we don't
exactly need to optimize it.

Signed-off-by: Furquan Shaikh <furquan@google.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-09-29 13:25:09 -07:00
Yao Yuan c887be71cc mtd: spi-nor: Add support for sst25wf040b
It is a 512KiB flash with 4 KiB erase sectors.

Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-09-29 13:17:23 -07:00
Joachim Eastwood adf508c347 mtd: spi-nor: s25fl008k and s25fl016k supports dual/quad mode
s25fl016k can be found on Embedded Artists' LPC4357 Developer's Kit
where is used in quad mode by the LPC4357 SPIFI controller.

Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-09-28 17:59:57 -07:00
Jagan Teki f9f3ce835d mtd: spi-nor: Zap unneeded write_enable from write_reg
The 'write_enable' argument is unused and unneeded, so remove it from
the API.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Han Xu <han.xu@freescale.com>
[Brian: fixed for nxp-spifi.c]
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-09-11 16:04:55 -07:00
Jagan Teki fd7252346b mtd: spi-nor: Use write_sr for write status
Use existing write_sr() call instead of decoding and
calling nor->write_reg separately.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-09-11 15:53:48 -07:00
Marek Vasut 11bff0b70c mtd: spi-nor: Decouple SPI NOR's device_node from controller device
The problem this patch is trying to address is such, that SPI NOR flash
devices attached to a dedicated SPI NOR controller cannot read their
properties from the associated struct device_node.

A couple of facts first:
1) Each SPI NOR flash has a struct spi_nor associated with it.
2) Each SPI NOR flash has certain device properties associated
   with it, for example the OF property 'm25p,fast-read' is a
   good pick. These properties are used by the SPI NOR core to
   select which opcodes are sent to such SPI NOR flash. These
   properties are coming from spi_nor .dev->of_node .

The problem is, that for SPI NOR controllers, the struct spi_nor .dev
element points to the struct device of the SPI NOR controller, not the
SPI NOR flash. Therefore, the associated dev->of_node also is the
one of the controller and therefore the SPI NOR core code is trying to
parse the SPI NOR controller's properties, not the properties of the
SPI NOR flash.

Note: The m25p80 driver is not affected, because the controller and
      the flash are the same device, so the associated device_node
      of the controller and the flash are the same.

This patch adjusts the SPI NOR core such that the device_node is not
picked from spi_nor .dev directly, but from a new separate spi_nor
.flash_node element. This let's the SPI NOR controller drivers set up
a different spi_nor .flash_node element for each SPI NOR flash.

This patch also fixes the controller drivers to be compatible with
this modification and correctly set the spi_nor .flash_node element.

This patch is inspired by 5844feeaa4
mtd: nand: add common DT init code

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-09-11 15:48:21 -07:00
Brian Norris f9b97fe614 Merge MTD 4.3-rc1 updates into -next 2015-09-09 16:57:39 -07:00
Brian Norris 2ff46e6fea mtd: spi-nor: fix NULL dereference when no match found in spi_nor_ids[]
Commit 06bb6f5a69 ("mtd: spi-nor: stop (ab)using struct
spi_device_id") converted an array into a pointer, which means that
we should be checking if the pointer goes anywhere, not whether the C
string is empty. To do the latter means we dereference a NULL pointer
when we reach the terminating entry, for which 'name' is now NULL
instead of an array { 0, 0, ... }.

Sample crash:

[    1.101371] Unable to handle kernel NULL pointer dereference at virtual address 00000000
[    1.109457] pgd = c0004000
[    1.112157] [00000000] *pgd=00000000
[    1.115736] Internal error: Oops: 5 [#1] SMP ARM
[    1.120345] Modules linked in:
[    1.123405] CPU: 3 PID: 1 Comm: swapper/0 Not tainted 4.2.0-next-20150902+ #61
[    1.130611] Hardware name: Rockchip (Device Tree)
[    1.135306] task: ee0b8d40 ti: ee0ba000 task.ti: ee0ba000
[    1.140697] PC is at spi_nor_scan+0x90/0x8c4
[    1.144958] LR is at spi_nor_scan+0xa4/0x8c4
...
[    1.504112] [<c03cc2e0>] (spi_nor_scan) from [<c03cb188>] (m25p_probe+0xc8/0x11c)
[    1.511583] [<c03cb188>] (m25p_probe) from [<c03cd9d8>] (spi_drv_probe+0x60/0x7c)
[    1.519055] [<c03cd9d8>] (spi_drv_probe) from [<c037faa0>] (driver_probe_device+0x1a0/0x444)
[    1.527478] [<c037faa0>] (driver_probe_device) from [<c037fec8>] (__device_attach_driver+0x94/0xa0)
[    1.536507] [<c037fec8>] (__device_attach_driver) from [<c037db3c>] (bus_for_each_drv+0x94/0xa4)
[    1.545277] [<c037db3c>] (bus_for_each_drv) from [<c037f7e4>] (__device_attach+0xa4/0x144)
[    1.553526] [<c037f7e4>] (__device_attach) from [<c0380058>] (device_initial_probe+0x1c/0x20)
[    1.562035] [<c0380058>] (device_initial_probe) from [<c037ec88>] (bus_probe_device+0x38/0x94)
[    1.570631] [<c037ec88>] (bus_probe_device) from [<c037ccf4>] (device_add+0x430/0x558)
[    1.578534] [<c037ccf4>] (device_add) from [<c03d0240>] (spi_add_device+0xe4/0x174)
[    1.586178] [<c03d0240>] (spi_add_device) from [<c03d0a24>] (spi_register_master+0x698/0x7d4)
[    1.594688] [<c03d0a24>] (spi_register_master) from [<c03d0ba0>] (devm_spi_register_master+0x40/0x7c)
[    1.603892] [<c03d0ba0>] (devm_spi_register_master) from [<c03d2fb4>] (rockchip_spi_probe+0x360/0x3f4)
[    1.613182] [<c03d2fb4>] (rockchip_spi_probe) from [<c0381e34>] (platform_drv_probe+0x58/0xa8)
[    1.621779] [<c0381e34>] (platform_drv_probe) from [<c037faa0>] (driver_probe_device+0x1a0/0x444)
[    1.630635] [<c037faa0>] (driver_probe_device) from [<c037fdc4>] (__driver_attach+0x80/0xa4)
[    1.639058] [<c037fdc4>] (__driver_attach) from [<c037e850>] (bus_for_each_dev+0x98/0xac)
[    1.647221] [<c037e850>] (bus_for_each_dev) from [<c037f448>] (driver_attach+0x28/0x30)
[    1.655210] [<c037f448>] (driver_attach) from [<c037ef74>] (bus_add_driver+0x128/0x250)
[    1.663200] [<c037ef74>] (bus_add_driver) from [<c0380c40>] (driver_register+0xac/0xf0)
[    1.671191] [<c0380c40>] (driver_register) from [<c0381d50>] (__platform_driver_register+0x58/0x6c)
[    1.680221] [<c0381d50>] (__platform_driver_register) from [<c0a467c8>] (rockchip_spi_driver_init+0x18/0x20)
[    1.690033] [<c0a467c8>] (rockchip_spi_driver_init) from [<c00098a4>] (do_one_initcall+0x124/0x1dc)
[    1.699063] [<c00098a4>] (do_one_initcall) from [<c0a19f84>] (kernel_init_freeable+0x218/0x2ec)
[    1.707748] [<c0a19f84>] (kernel_init_freeable) from [<c0719ed8>] (kernel_init+0x1c/0xf4)
[    1.715912] [<c0719ed8>] (kernel_init) from [<c000fe50>] (ret_from_fork+0x14/0x24)
[    1.723460] Code: e3510000 159f67c0 0a00000c e5961000 (e5d13000)
[    1.729564] ---[ end trace 95baa6b3b861ce25 ]---

Fixes: 06bb6f5a69 ("mtd: spi-nor: stop (ab)using struct spi_device_id")
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: Rafał Miłecki <zajec5@gmail.com>
2015-09-02 16:34:35 -07:00
Brian Norris 1976367173 mtd: spi-nor: embed struct mtd_info within struct spi_nor
This reflects the proper layering, so let's do it.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Tested-by: Joachim Eastwood <manabian@gmail.com>
2015-09-02 14:11:40 -07:00
Brian Norris c9ec3900ab mtd: spi-nor: assign mtd->priv in spi_nor_scan()
Layering suggests that the SPI NOR layer (not the hardware driver)
should be initializing the MTD layer.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Tested-by: Joachim Eastwood <manabian@gmail.com>
2015-09-02 14:11:40 -07:00
Joachim Eastwood 0f12a27b47 mtd: spi-nor: s25sl064p supports both dual and quad I/O
This chip can be found on Hitex LPC4350 Evaluation Board.

Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-09-02 14:09:56 -07:00
Jonas Gorski c175208679 mtd: spi-nor: allow dual/quad reads on S25FL129P
According to the datasheet[1], both S25FL129P0 (256kB sectors) and
S25FL129P1 (64kB sectors) support dual read, quad read, dual i/o read
and quad i/o read.

I have verified dual read to be working for S25FL129P1 on a dual
capable spi controller. Quad as well as S25FL129P0 is untested, lacking
hardware to verify.

[1] http://www.spansion.com/Support/Datasheets/S25FL129P_00.pdf

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-09-02 14:07:53 -07:00
Alexis Ballier a1d97ef96e mtd: spi-nor: Add support for sst25wf020a
It is a 256KiB flash with 4 KiB erase sectors
and 64KiB overlay blocks.

This is the one available on Hardkernel's Odroid U3 shield.

Signed-off-by: Alexis Ballier <aballier@gentoo.org>
[Brian: seems like this does NOT require the usual SST_WRITE hacks]
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-09-02 13:57:05 -07:00
Mika Westerberg 2a06c7b1fd mtd: spi-nor: Add support for Micron n25q064a serial flash
Add Micron (n25q064a) 8MB flash to the list of supported chips.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
[Brian: fixup context]
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-09-02 13:56:24 -07:00
Rafał Miłecki 06bb6f5a69 mtd: spi-nor: stop (ab)using struct spi_device_id
Using struct spi_device_id for storing list of flash devices comes from
early SPI NOR framework days. Thanks to the commit 70f3ce0510 ("mtd:
spi-nor: make spi_nor_scan() take a chip type name, not spi_device_id")
we can stop using spi_device_id and just switch to our own struct.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-08-25 13:42:21 -07:00
Antony Pavlov b4d97f022a mtd: spi-nor: add Spansion S25FL204K support
Spansion S25FL204K is a 4-Mbit 3.0V Serial Flash Memory
with Uniform 4 kB Sectors.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Acked-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-08-14 11:22:56 -07:00
Brian Norris 4316302292 mtd: m25p80: allow arbitrary OF matching for "jedec,spi-nor"
When we added the "jedec,spi-nor" compatible string for use in this
driver, we added it as a modalias option. The modalias can be derived in
different ways for platform devices vs. device tree (of_*) matching. But
for device tree matching (the primary target of this identifier string),
the modalias is determined from the first entry in the 'compatible'
property. IOW, the following properties would bind to this driver:

	// Option (a), modalias = "spi-nor"
	compatible = "jedec,spi-nor";

	// Option (b), modalias = "spi-nor"
	compatible = "idontknowwhatimdoing,spi-nor";

But the following would not:

	// Option (c), modalias = "shinynewdevice"
	compatible = "myvendor,shinynewdevice", "jedec,spi-nor";

So, we'd like to match (a) and (c) (even when we don't have an explicit
entry for "shinynewdevice"), and we'd rather not allow (b).

To do this, we
  (1) always (for devices without specific platform data) pass the
      modalias to the spi-nor library;
  (2) rework the spi-nor library to not reject "bad" names, and
      instead just fall back to autodetection; and
  (3) add the .of_match_table to properly catch all "jedec,spi-nor".

This allows (a) and (c) without warnings, and rejects (b).

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-07-21 09:33:42 -07:00
Alexey Firago 0db7fae273 mtd: spi-nor: set SECT_4K for n25q064 SPI flash
Micron n25q064 flash supports 4 KiB erase sectors.

Signed-off-by: Alexey Firago <alexey_firago@mentor.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-07-20 10:43:19 -07:00
Rafał Miłecki c19900edff mtd: spi-nor: Properly set SECT_4K for recently added flashes
Few recently added entries are missing SECT_4K flag despite of these
flashes supporting 4 KiB erase sectors and 0x20 erase command.
Also add a comment to help avoiding such mistakes in the future.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Cc: Knut Wohlrab <knut.wohlrab@de.bosch.com>
Cc: Huang Shijie <shijie.huang@intel.com>
Cc: Shengzhou Liu <shengzhou.liu@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-05-20 16:17:16 -07:00
Rafał Miłecki 413780d7d7 mtd: spi-nor: Add support for Spansion S25FL164K
It's an 8 MiB flash with 4 KiB erase sectors.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-05-20 16:17:16 -07:00
Gabor Juhos b79c332fb2 mtd: spi-nor: add support for the ISSI SI25CD512 SPI flash
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-05-07 00:18:24 -07:00
Gabor Juhos 660b5b07cf mtd: spi-nor: add support for the Macronix MX25L512E SPI flash chip
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-05-07 00:18:23 -07:00
Mika Westerberg 81a1209c90 mtd: spi-nor: Add support for Macronix mx25u6435f serial flash
Add Macronix (mx25u6435f) 8MB flash to the list of supported chips.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-04-05 19:09:10 -07:00
Mika Westerberg e88e567f15 mtd: spi-nor: Add support for Winbond w25q64dw serial flash
Add Winbond (w25q64dw) 8MB flash to the list of supported chips.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-04-05 19:09:08 -07:00
Gabor Juhos 40d19ab69c mtd: spi-nor: add support for the Winbond W25X05 flash
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Luka Perkov <luka@openwrt.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-04-05 18:56:21 -07:00
Shengzhou Liu 072b56ab86 mtd: spi-nor: support en25s64 device
Add support for EON en25s64 SPI flash.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-04-05 18:56:21 -07:00
Brian Norris 8cc7f33aad mtd: spi-nor: factor out replace-able flash_{lock,unlock}
Flash lock/unlock is a flash-specific operations. Factor out a callback
for it to more readily support other vendors.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Tested-by: VIET NGA DAO <vndao@altera.com>
2015-03-27 10:37:38 -07:00
Rafał Miłecki fcc87a9519 mtd: spi-nor: support for (GigaDevice) GD25Q128B
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-20 12:24:43 -08:00
Bean Huo 霍斌斌 (beanhuo) 548cd3ab54 mtd: spi-nor: Add quad I/O support for Micron SPI NOR
This patch adds code which enables Quad I/O mode on Micron SPI NOR flashes.

For Micron SPI NOR flash, enabling or disabling quad I/O protocol can be
done By two methods, which are to use EVCR (Enhanced Volatile
Configuration Register) and the ENTER QUAD I/O MODE command. There is no
difference between these two methods. Unfortunately, for some Micron SPI
NOR flashes, there no ENTER Quad I/O command (35h), such as n25q064. But
for all current Micron SPI NOR, if it support quad I/O mode, using EVCR
definitely be supported. It is a recommended method to enable Quad I/O
mode by EVCR, Quad I/O protocol bit 7. When EVCR bit 7 is reset to 0,
the SPI NOR flash will operate in quad I/O mode.

This patch has been tested on N25Q512A and MT25TL256BAA1ESF. Micron SPI
NOR of spi_nor_ids[] table all support this method.

Signed-off-by: Bean Huo <beanhuo@micron.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-07 11:33:22 -08:00
Rafał Miłecki 58c81957b7 mtd: spi-nor: allow NULL as chip name and try to auto detect it
This will allow spi-nor users to plainly use JEDEC to detect flash chip.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-12-01 10:21:42 -08:00
Brian Norris 05241aead9 mtd: spi-nor: factor out write_enable() for erase commands
write_enable() was being duplicated to both m25p80.c and fsl-quadspi.c.
But this should be handled within the spi-nor abstraction layer.

At the same time, let's add write_disable() after erasing, so we don't
leave the flash in a write-enabled state afterward.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Huang Shijie <shijie.huang@intel.com>
2014-12-01 00:19:03 -08:00
Huang Shijie 6d7604e517 mtd: spi-nor: add support for s25fl128s
We need to store the six bytes ID for s25fl128s, since it shares the same
five bytes with s25fl129p1.

This patch adds a macro INFO6 which is used for the six bytes ID flash, and adds
a new item for the s25fl128s.

Signed-off-by: Huang Shijie <shijie.huang@intel.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-12-01 00:15:18 -08:00
Huang Shijie d928a25938 mtd: spi-nor: remove the jedec_id/ext_id
The "id" array contains all the information about the JEDEC and the
manufacturer ID info. This patch removes the jedec_id/ext_id from
flash_info.

Signed-off-by: Huang Shijie <shijie.huang@intel.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-12-01 00:10:39 -08:00
Huang Shijie 09ffafb697 mtd: spi-nor: add id/id_len for flash_info{}
This patch adds the id/id_len fields for flash_info{}, and rewrite the
INFO to fill them. And at last, we read out 6 bytes in the spi_nor_read_id(),
and we use these new fields to parse out the correct flash_info.

Signed-off-by: Huang Shijie <shijie.huang@intel.com>
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-12-01 00:05:00 -08:00
Knut Wohlrab 3e38933dd8 mtd: m25p80: Add support for serial flash Spansion S25FL132K
Signed-off-by: Knut Wohlrab <knut.wohlrab@de.bosch.com>
Signed-off-by: Alison Chaiken <alison_chaiken@mentor.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-25 23:11:24 -08:00
Brian Norris a95ce92e4b mtd: spi-nor: improve wait-till-ready timeout loop
There are a few small issues with the timeout loop in
spi_nor_wait_till_ready():

 * The first operation should not be a reschedule; we should check the
   status register at least once to see if we're complete!

 * We should check the status register one last time after declaring the
   deadline has passed, to prevent a premature timeout error (this is
   theoretically possible if we sleep for a long time after the previous
   status register check).

 * Add an error message, so it's obvious if we ever hit a timeout.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Huang Shijie <shijie.huang@intel.com>
Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
2014-11-25 22:51:23 -08:00
Harini Katakam f02985b785 mtd: spi-nor: Add support for SST spi flash
Add sst25wf080 to the spi-nor device id table.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-05 13:06:02 -08:00
Rostislav Lisovy ce56ce7da3 mtd: spi-nor: Add support for Fujitsu MB85RS1MT FRAM
Tested with this particular FRAM chip

Signed-off-by: Rostislav Lisovy <lisovy@merica.cz>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-05 13:04:38 -08:00
Chunhe Lan 4414d3efe5 mtd: spi-nor: Move n25q032 entry to Micron devices list
Because n25q032 is the Micron SPI chip, move it to Micron
devices list group. In order that know which Micron SPI
chips have been support at a glance.

Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Huang Shijie <shijie8@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-05 12:58:38 -08:00
Brian Norris b94ed08774 mtd: spi-nor: drop replaceable wait-till-ready function pointer
We don't need to expose a 'wait-till-ready' interface to drivers. Status
register polling should be handled by the core spi-nor.c library, and as
of now, I see no need to provide a special driver-specific hook for it.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2014-11-05 02:08:21 -08:00