Now that the generic slave caps code can make use of the device assigned
capabilities, instead of relying on a callback to be implemented.
Make use of this code.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Split the device_control callback of the Allwinner A31 DMA driver to make use
of the newly introduced callbacks, that will eventually be used to retrieve
slave capabilities.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Pull dmaengine updates from Vinod Koul:
"Main features this time are:
- BAM v1.3.0 support form qcom bam dma
- support for Allwinner sun8i dma
- atmels eXtended DMA Controller driver
- chancnt cleanup by Maxime
- fixes spread over drivers"
* 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (56 commits)
dmaenegine: Delete a check before free_percpu()
dmaengine: ioatdma: fix dma mapping errors
dma: cppi41: add a delay while setting the TD bit
dma: cppi41: wait longer for the HW to return the descriptor
dmaengine: fsl-edma: fixup reg offset and hw S/G support in big-endian model
dmaengine: fsl-edma: fix calculation of remaining bytes
drivers/dma/pch_dma: declare pch_dma_id_table as static
dmaengine: ste_dma40: fix error return code
dma: imx-sdma: clarify about firmware not found error
Documentation: devicetree: Fix Xilinx VDMA specification
dmaengine: pl330: update author info
dmaengine: clarify the issue_pending expectations
dmaengine: at_xdmac: Add DMA_PRIVATE
ARM: dts: at_xdmac: fix bad value of dma-cells in documentation
dmaengine: at_xdmac: fix missing spin_unlock
dmaengine: at_xdmac: fix a bug in transfer residue computation
dmaengine: at_xdmac: fix software lockup at_xdmac_tx_status()
dmaengine: at_xdmac: remove chancnt affectation
dmaengine: at_xdmac: prefer usage of readl/writel_relaxed
dmaengine: xdmac: fix print warning on dma_addr_t variable
...
The A23 SoC has the same dma engine as the A31 (sun6i), with a
reduced amount of endpoints and physical channels. Add the proper
config data and compatible string to support it.
A slight difference in sun8i is an undocumented register needs
to be toggled for dma to function.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This patch adds support for hardware parameters tied to compatible
strings, so similar hardware can reuse the driver.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
The prep_memcpy call was not setting any meaningful burst and width because it
was relying on the dma_slave_config was not set already.
Rework the needed conversion functions, and hardcode the width and burst to
use.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: stable@vger.kernel.org
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
chanctnt is already filled by dma_async_device_register, which uses the channel
list to know how much channels there is.
Since it's already filled, we can safely remove it from the drivers' probe
function.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
The sun6i DMA controller requires the AHB1 bus clock to be
clocked from PLL6. This was originally done by the dmaengine
driver during probe time. The AHB1 clock driver has since been
unified, so the original code does not work.
Remove the clk muxing code, and replace it with DT clk default
properties.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
The sun6i_dma_prep_memcpy and sun6i_dma_prep_slave_sg functions were both
leaking the descriptor they allocated if an error was happening after a
successful dma_pool_alloc call.
It also fixes a memleak that was happening in the scatter gather list
traversal, that was allocating as much descriptor as there was scatter gather
items, but only freeing the current descriptor if an error was to arise.
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
There's still a small window between the call to sun6i_kill_tasklet and the end
of the driver remove function where a spurious interrupt might trigger, and
start using deallocated resources.
Replace the call to synchronize_irq by a free_irq, so that we're sure that we
won't get any further interrupts when we're deallocating resources.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Since the conversion routine is quite trivial, we don't need this switch, and
we can just use a simple calculation.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
The sg_dma_len() returns unsigned int but we had driver print it as %zu, use
%u as documented in Documentation/printk-formats.txt
drivers/dma/sun6i-dma.c: In function ‘sun6i_dma_prep_slave_sg’:
drivers/dma/sun6i-dma.c:643: warning: format ‘%zu’ expects type ‘size_t’,
but argument 8 has type ‘unsigned int’
drivers/dma/sun6i-dma.c:661: warning: format ‘%zu’ expects type ‘size_t’,
but argument 8 has type ‘unsigned int’
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Since the driver defined COMPILE_TEST, it gets compiled for different arch's
The driver uses __virt_to_phys() insteadof virt_to_phys, so replace it
drivers/dma/sun6i-dma.c: In function ‘sun6i_dma_dump_chan_regs’:
drivers/dma/sun6i-dma.c:203: error: implicit declaration of function '__virt_to_phys'
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
The Allwinner A31 has a 16 channels DMA controller that it shares with the
newer A23. Although sharing some similarities with the DMA controller of the
older Allwinner SoCs, it's significantly different, I don't expect it to be
possible to share the driver for these two.
The A31 Controller is able to memory-to-memory or memory-to-device transfers on
the 16 channels in parallel.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Maxime Ripard