Commit Graph

17 Commits

Author SHA1 Message Date
Hoan Nguyen An ada9a3d98f pinctrl: sh-pfc: r8a77965: Add Audio clock pin support
Add Audio clock pin support for r8a77965.

Signed-off-by: Hoan Nguyen An <na-hoan@jinso.co.jp>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-08-28 11:28:37 +02:00
Takeshi Kihara d06e3be6e8 pinctrl: sh-pfc: r8a77965: Add SATA pins, groups and functions
This patch adds SATA0 pin, group and function to the R8A77965 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[wsa: rebased to upstream base]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-08-27 17:01:41 +02:00
Takeshi Kihara 7628fa811b pinctrl: sh-pfc: r8a77965: Add HSCIF pins, groups, and functions
This patch adds HSCIF{0,1,2,3,4} pins, groups and functions to
the R8A77965 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-07-16 14:46:11 +02:00
Geert Uytterhoeven db701f4bea pinctrl: sh-pfc: rcar-gen3: Fix grammar in static pin comments
The comment block explaining the rationale for static pins contains
grammar errors.  It appeared first in the pin control driver for R-Car
H3 ES1.x, and spread to R-Car M3-W, H3 ES2.0, and M3-N later.

Fix the grammar in all copies at once.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2018-05-23 14:43:49 +02:00
Niklas Söderlund 82540ebcc7 pinctrl: sh-pfc: r8a77965: Add I2C pin support
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-05-23 14:43:49 +02:00
Takeshi Kihara 16688c8b86 pinctrl: sh-pfc: r8a77965: Add SDHI pins, groups and functions
This patch adds SDHI{0,1,2,3} pins, groups and functions to the R8A77965
SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-05-16 13:32:06 +02:00
Kieran Bingham a73ab128c3 pinctrl: sh-pfc: r8a77965: Add DU RGB output pins, groups and functions
This patch adds pins, groups and functions for parallel RGB output
signals from DU. The HDMI and TCON pins are added to separate groups.

Based on a similar patch of the R8A7796 PFC driver by Niklas Söderlund
<niklas.soderlund+renesas@ragnatech.se>.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[Kieran: Rebase on top of tree]
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-05-16 13:31:53 +02:00
Thomas Gleixner 3a4d17457d pinctrl: sh-pfc: r8a77965: Fixup incorrect SPDX identifier
GPL-2. is not a valid SPDX identifier. Make it GPL-2.0

Fixes: 490e687eb8 ("pinctrl: sh-pfc: Initial R-Car M3-N support")
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Jacopo Mondi <jacopo+renesas@jmondi.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-05-16 13:31:46 +02:00
Takeshi Kihara 54b7f2da97 pinctrl: sh-pfc: r8a77965: Add PWM pins, groups and functions
This patch adds PWM{0,1,2,3,4,5,6} pins, groups and functions to
R8A77965 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-05-16 13:31:31 +02:00
Takeshi Kihara 2c77aa3d70 pinctrl: sh-pfc: r8a77965: Add MSIOF pins, groups and functions
This patch adds MSIOF{0,1,2,3} pins, groups and functions to the
R8A77965 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Correct MSIOF3 SS2_E comment]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-05-16 13:31:02 +02:00
Geert Uytterhoeven f7ce295cfd pinctrl: sh-pfc: r8a77965: Rename EtherAVB "mdc" pin group to "mdio"
On other Renesas SoCs, the pin group for the MDIO bus is named "mdio"
instead of "mdc".  Fix the inconsistency, while retaining backwards
compatibility with old DTBs using a pin group alias.

Fixes: fa3e8b71b9 ("pinctrl: sh-pfc: r8a77965: Add EtherAVB groups/functions")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2018-03-21 18:18:30 +01:00
Takeshi Kihara c490b28f36 pinctrl: sh-pfc: r8a77965: Add USB3.0 host pins, groups and functions
This patch adds USB30 (USB3.0 host) pin, group and function to
the R8A77965 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-03-05 11:03:47 +01:00
Takeshi Kihara 0d75f8dae3 pinctrl: sh-pfc: r8a77965: Add USB2.0 host pins, groups and functions
This patch adds USB{0,1} (USB2.0 host) pins, groups and functions to
the R8A77965 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-03-05 11:02:32 +01:00
Takeshi Kihara a8ab4f2bd8 pinctrl: sh-pfc: r8a77965: Add support for INTC-EX IRQ pins
Most pins on the R8A77965 SoC can be configured in GPIO mode for
interrupt and GPIO functionality, while a couple of them can also
be routed to the INTC-EX hardware block (formerly known as IRQC).

On R8A77965 the INTC-EX hardware handles pins IRQ0 -> IRQ5 and
this patch adds support for them to the PFC driver as "intc_ex_irqN".

Based on a similar patch for the R8A7795 PFC driver by Magnus Damm
<damm+renesas@opensource.se>.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-02-28 09:17:54 +01:00
Jacopo Mondi fa3e8b71b9 pinctrl: sh-pfc: r8a77965: Add EtherAVB groups/functions
Add EtherAVB groups and functions definitions for R-Car M3-N.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-02-20 19:33:02 +01:00
Jacopo Mondi 58cfd7f37e pinctrl: sh-pfc: r8a77965: Add SCIFs groups/functions
Add SCIF[0-5] groups and pin function definitions for R-Car M3-N.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-02-20 19:32:59 +01:00
Jacopo Mondi 490e687eb8 pinctrl: sh-pfc: Initial R-Car M3-N support
Add initial PFC support for R-Car M3-N (r8a77965) SoC.
No groups or functions defined, just pin and registers enumeration.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-02-20 19:32:58 +01:00