Add an enable time of 600us for SD0/1/6 to ensure that we have
enough setup time for the power rail.
Signed-off-by: Vince Hsu <vinceh@nvidia.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
SD0 may operate in low-voltage mode, with a minimum of 0.41V
and a maximum of 1.5V. This is indicated by bit 4 of FUSE7.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Vince Hsu <vinceh@nvidia.com>
broonie.e6264@m.evernote.com
Signed-off-by: Mark Brown <broonie@linaro.org>
These settings are not used when using linear_ranges and it makes the code
looks confusing. Thus remove them.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Simple fix to set the correct current limit for SD0/1/6.
Signed-off-by: Vince Hsu <vinceh@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Fixes: bc407334e9 (regulator: as3722: add regulator driver for AMS AS3722)
Cc: stable@vger.kernel.org
Add REGULATOR_LINEAR_RANGE macro and convert regulator drivers to use it.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
linear ranges means each range has linear voltage settings.
So we can calculate max_uV for each linear range in regulator core rather than
set the max_uV field in drivers.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
AS3722_SDx_VSEL_MAX means the maximum selecter, the n_voltages should be
AS3722_SDx_VSEL_MAX + 1.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Fix off-by-one in the equation to calculate max_uV and also adjust the _min_uV
setting accordingly.
For LDOs:
The voltage select bits set the LDO output voltage 0.825V...3.3V, 25mV steps
....00h : LDO off
01h-24h : V_LDO4 = 0.8V + ldo4_vsel * 25mV
= 0.825V + (ldo4_vsel - 1h) * 25mV
25h-3Fh : do not use
40h-7Fh : V_LDO4 = 1.725V + (ldo4_vsel - 40h) * 25mV
For SD2345:
The voltage select bits set the DC/DC output voltage level and power the DC/DC
converter down.
....00h : DC/DC powered down
01h-40h : V_SD2 = 0.6V + sd2_vsel * 12.5mV
= 0.6125V + (sd2_vsel - 1h) * 12.5mV
41h-70h : V_SD2 = 1.4V + (sd2_vsel - 40h) * 25mV
= 1.425V + (sd2_vsel - 41h) * 25mV
71h-7Fh : V_SD2 = 2.6V + (sd2_vsel - 70h) * 50mV
= 2.65V + (sd2_vsel - 71h) * 50mV
Note, the third entry in as3722_sd2345_ranges is wrong in current code.
Fix it based on the datasheet.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The AMS AS3722 is a compact system PMU suitable for mobile phones,
tablets etc. It has 4 DCDC step down regulators, 3 DCDC step down
controller, 11 LDOs.
Add a driver to support accessing the DCDC/LDOs found on the AMS
AS3722 PMIC using regulators.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Florian Lobmaier <florian.lobmaier@ams.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Sachin Kamat