Even if DMA support is disabled code using DMA mapping APIs compiles fine,
but fails in linking.
-------
drivers/built-in.o: In function `ring_desc_ring_free':
spi-pic32-sqi.c:(.text+0x2cfbe0): undefined reference to `bad_dma_ops'
spi-pic32-sqi.c:(.text+0x2cfbe4): undefined reference to `bad_dma_ops'
drivers/built-in.o: In function `pic32_sqi_probe':
spi-pic32-sqi.c:(.text+0x2cfe48): undefined reference to `bad_dma_ops'
spi-pic32-sqi.c:(.text+0x2cfeb0): undefined reference to `bad_dma_ops'
spi-pic32-sqi.c:(.text+0x2cff38): undefined reference to `bad_dma_ops'
--------
Correct dependency by adding 'depends on HAS_DMA' in Kconfig.
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The relaxed I/O accessors are available on all architectures now.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
There is no build dependency for this driver, so enable COMPILE_TEST to get
better build coverage.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The SPI controller managed by the spi-orion is used on the new ARM64
Marvell Armada 7K/8K SoCs. In order to allow this driver to be built
for this platform, we allow it to be selected for ARCH_MVEBU=y
configurations.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This driver implements SPI master interface for Quad SPI
controller, specifically for accessing quad SPI flash.
It uses descriptor-based DMA transfer mode and supports
half-duplex communication for single, dual and quad SPI
transactions.
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Cc: Mark Brown <broonie@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
The PIC32 SPI driver is capable of performing SPI transfers
using PIO or external DMA engine. GPIO controlled /CS support
is made default in the driver for correct operation of the
controller. This can be enabled by adding "cs-gpios" property
of the SPI node in board dts file.
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
- Vulcan spi controller is compatible with netlogic,xlp832-spi.
- Add depends on ARCH_VULCAN to Kconfig to enable spi controller
driver for Broadcom Vulcan ARM64 SoCs.
Signed-off-by: Kamlakant Patel <kamlakant.patel@broadcom.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
ICP DAS LP-8841 contains a DS-1302 RTC. This driver provides an SPI
master which makes the RTC usable. The driver is not supposed to work
with anything else.
The driver uses the standard MicroWire half-duplex transfer timing.
Master output is set on low clock and sensed by the RTC on the rising
edge. Master input is set by the RTC on the trailing edge and is sensed
by the master on low clock.
Signed-off-by: Sergei Ianovich <ynvich@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Make use of ARCH_RENESAS in place of ARCH_SHMOBILE.
This is part of an ongoing process to migrate from ARCH_SHMOBILE to
ARCH_RENESAS the motivation for which being that RENESAS seems to be a more
appropriate name than SHMOBILE for the majority of Renesas ARM based SoCs.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@kernel.org>
The GPIO subsystem provides dummy GPIO consumer functions if GPIOLIB is
not enabled. Hence drivers that depend on GPIOLIB, but use GPIO consumer
functionality only, can still be compiled if GPIOLIB is not enabled.
Relax the dependency of SPI_BCM2835AUX on GPIOLIB if COMPILE_TEST is
enabled.
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
This patch adds support for the AXI SPI Engine controller which is a FPGA
soft-peripheral which is used in some of Analog Devices' reference designs.
The AXI SPI Engine controller is part of the SPI Engine framework[1] and
allows memory mapped access to the SPI Engine control bus. This allows it
to be used as a general purpose software driven SPI controller. The SPI
Engine in addition offers some optional advanced acceleration and
offloading capabilities, which are not part of this patch though and will
be introduced separately.
At the core of the SPI Engine framework is a small sort of co-processor
that accepts a command stream and turns the commands into low-level SPI
transactions. Communication is done through three memory mapped FIFOs in
the register map of the AXI SPI Engine peripheral. One FIFO for the command
stream and one each for transmit and receive data.
The driver translates a spi_message in a command stream and writes it to
the peripheral which executes it asynchronously. This allows it to perform
very precise timings which are required for some SPI slave devices to
achieve maximum performance (e.g. analog-to-digital and digital-to-analog
converters). The execution flow is synchronized to the host system by a
special synchronize instruction which generates a interrupt.
[1] https://wiki.analog.com/resources/fpga/peripherals/spi_engine
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
After removal of legacy PXA DMA code by the commit 6356437e65
("spi: spi-pxa2xx: remove legacy PXA DMA bits") the
CONFIG_SPI_PXA2XX_DMA follows the CONFIG_SPI_PXA2XX and cannot be disabled
alone. Therefore remove this config symbol and dead definitions from the
spi-pxa2xx.h.
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
adding the spi-loopback-test module to Kconfig and Makefile
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Allow the topcliff-pch driver to be built for MIPS platforms, in
preparation for use on the MIPS Boston board.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
LS1043a and LS2080A in the Layerscape family also support DSPI, make
DSPI selectable for these hardwares.
Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Move all register definitions and structs into the driver. This allows
us dropping the platform_data struct and drop any arch specific
includes. Make use of different device names to identify the version of
the block we have.
Since we now have full control over the message width, we can drop the
size check, which was broken anyway, since it never set ret to any error
code.
Also since we now have no arch depedendent resources, we can now allow
compiling it for any arch, hidden behind COMPILE_TEST.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
The bcm2835 has 2 auxiliary spi bus masters spi1 and spi2.
This implements the driver to enable these devices.
The driver does not implement native chip-selects but uses
the aribtrary GPIO-chip-selects provided by the spi-chipselect.
Note that this driver relies on the fact that
the clock is implemented by the clk-bcm2835-aux driver,
which enables/disables the HW block when requesting/releasing
the clock.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Acked-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add SPI Master controller driver for the SPI interface on XLP8XX,
XLP3XX, XLP2XX, XLP9XX and XLP5XX family of Netlogic XLP MIPS64 processors.
Signed-off-by: Kamlakant Patel <kamlakant.patel@broadcom.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This patch adds support for GQSPI controller driver used by
Zynq Ultrascale+ MPSoC
Signed-off-by: Ranjit Waghmode <ranjit.waghmode@xilinx.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Generic DMA support was already implemented by commit cd7bed0034
("spi/pxa2xx: break out the private DMA API usage into a separate file")
which moved all the legacy PXA DMA implementation code into its own
file.
With generic DMA available for PXA, we can now just trash this file.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Acked-by: Mark Brown <broonie@linaro.org>
[respin after pxa dmaengine support upstream]
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The GPIO subsystem provides dummy GPIO consumer functions if GPIOLIB is
not enabled. Hence drivers that depend on GPIOLIB, but use GPIO consumer
functionality only, can still be compiled if GPIOLIB is not enabled.
Relax the dependency on GPIOLIB if COMPILE_TEST is enabled, where
appropriate.
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
I got following error on CONFIG_GPIOLIB=n.
drivers/spi/spi-bcm2835.c: In function 'chip_match_name':
drivers/spi/spi-bcm2835.c:356:21: error: dereferencing pointer to incomplete type 'struct gpio_chip'
return !strcmp(chip->label, data);
^
drivers/spi/spi-bcm2835.c: In function 'bcm2835_spi_setup':
drivers/spi/spi-bcm2835.c:382:9: error: implicit declaration of function 'gpiochip_find' [-Werror=implicit-function-declaration]
chip = gpiochip_find("pinctrl-bcm2835", chip_match_name);
^
drivers/spi/spi-bcm2835.c:382:7: warning: assignment makes pointer from integer without a cast [-Wint-conversion]
chip = gpiochip_find("pinctrl-bcm2835", chip_match_name);
^
drivers/spi/spi-bcm2835.c: In function 'chip_match_name':
drivers/spi/spi-bcm2835.c:357:1: warning: control reaches end of non-void function [-Wreturn-type]
}
^
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Mark Brown <broonie@kernel.org>
LS1021A chip also has the DSPI module.
Add it to the dependence.
Signed-off-by: Haikun Wang <haikun.wang@freescale.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This driver mediates access between the connected CPLD and other devices
on the bus.
The m25p80-compatible boot flash and (some models) MMC use regular SPI,
bitbanged as required by the SoC. However the SPI-connected CPLD has
a two-wire mode, in which two bits are transferred per SPI clock
cycle. The second bit is transmitted with the SoC's CS2 pin.
Signed-off-by: Bert Vermeulen <bert@biot.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Fix:
drivers/spi/spi-bcm2835.c: In function 'chip_match_name':
drivers/spi/spi-bcm2835.c:356:21: error:
dereferencing pointer to incomplete type
drivers/spi/spi-bcm2835.c: In function 'bcm2835_spi_setup':
drivers/spi/spi-bcm2835.c:382:2: error:
` implicit declaration of function 'gpiochip_find'
drivers/spi/spi-bcm2835.c:387:21: error:
dereferencing pointer to incomplete type
by adding the now mandatory GPIOLIB dependency.
Fixes: a30a555d74 ("spi: bcm2835: transform native-cs to gpio-cs
on first spi_setup")
Cc: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
intel_mid_dma seems to be unmaintained for a long time. Moreover, the IP block
of DMA itself is the same in both dw_dmac and intel_mid_dma. This patch moves
spi-dw-midpci to use dw_dmac driver.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Remove Kconfig dependency and enable driver for
all ARCHs.
Also update help description.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Pull kconfig updates from Michal Marek:
"Yann E Morin was supposed to take over kconfig maintainership, but
this hasn't happened. So I'm sending a few kconfig patches that I
collected:
- Fix for missing va_end in kconfig
- merge_config.sh displays used if given too few arguments
- s/boolean/bool/ in Kconfig files for consistency, with the plan to
only support bool in the future"
* 'kconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild:
kconfig: use va_end to match corresponding va_start
merge_config.sh: Display usage if given too few arguments
kconfig: use bool instead of boolean for type definition attributes
DSPI module need cs change information in
a spi transfer. According to cs change, DSPI
will give last data the right flag. Bitbang
provide cs change behind the last data in
a transfer. So DSPI can not deal the last
data in every transfer properly, so remove
the bitbang in the driver.
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The pl08x driver originally selected S3C64XX_PL080 to avoid having
the legacy Samsung DMA interfaces. Those are now gone, so the
select is no longer needed, but it now causes problems when
CONFIG_DMA_ENGINE is disabled:
arch/arm/plat-samsung/built-in.o: In function `s3c64xx_spi0_set_platdata':
:(.init.text+0x518): undefined reference to `pl08x_filter_id'
This simply removes the 'select' to avoid this problem.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
Support for keyword 'boolean' will be dropped later on.
No functional change.
Reference: http://lkml.kernel.org/r/cover.1418003065.git.cj@linux.com
Signed-off-by: Christoph Jaeger <cj@linux.com>
Signed-off-by: Michal Marek <mmarek@suse.cz>
This adds support for Diolan DLN2 USB-SPI adapter.
Information about the USB protocol interface can be found in the
Programmer's Reference Manual [1], see section 5.4.6 for the SPI
master module commands and responses.
[1] https://www.diolan.com/downloads/dln-api-manual.pdf
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This patch adds support for the SPI portion of ST's SSC device.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
The Meson SPIFC driver uses regmap mmio functions and so it must
select REGMAP_MMIO to avoid the following build error:
spi-meson-spifc.c: undefined reference to `devm_regmap_init_mmio_clk'
Reported-by: Jim Davis <jim.epost@gmail.com>
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Exynos7 SPI controller supports only the auto Selection of
CS toggle mode and Exynos7 SoC includes six SPI controllers.
Add support for these changes in Exynos7 SPI controller driver.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This is a driver for the Amlogic Meson SPIFC (SPI flash controller),
which is one of the two SPI controllers available on the SoC. It
doesn't support DMA and has a 64-byte unified transmit/receive buffer.
The device is optimized for interfacing with SPI NOR memories and
allows the execution of standard operations such as read, page
program, sector erase, etc. in a simplified way, toggling a bit in a
dedicated register. The driver doesn't use those predefined commands
and relies only on custom transfers.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add support for the Synchronous Peripheral Flash Interface (SPFI) master
controller found on IMG SoCs. The SPFI controller supports 5 chip-select
lines and single/dual/quad mode SPI transfers.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
config SPI_BCM53XX needs to depend on BCMA_POSSIBLE and select BCMA.
This fixes below build error:
ERROR: "bcma_driver_unregister" [drivers/spi/spi-bcm53xx.ko] undefined!
ERROR: "__bcma_driver_register" [drivers/spi/spi-bcm53xx.ko] undefined!
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The support of the Moorestown was removed [1] from kernel long time ago. This
is just a follow up of that change.
[1] http://www.spinics.net/lists/platform-driver-x86/msg02948.html
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
commit dd1053a93f ("spi/drivers: Enable build of drivers with
COMPILE_TEST") allows compile-testing drivers on platforms they're not
meant for.
However, adding "|| COMPILE_TEST" bypasses all other implicit dependencies
assumed by the platform dependencies before, like HAS_DMA.
If NO_DMA=y:
drivers/built-in.o: In function `atmel_spi_dma_unmap_xfer':
drivers/spi/spi-atmel.c:915: undefined reference to `dma_unmap_single'
drivers/spi/spi-atmel.c:918: undefined reference to `dma_unmap_single'
drivers/built-in.o: In function `atmel_spi_next_xfer_data':
drivers/spi/spi-atmel.c:690: undefined reference to `dma_sync_single_for_cpu'
drivers/built-in.o: In function `atmel_spi_dma_map_xfer':
drivers/spi/spi-atmel.c:890: undefined reference to `dma_map_single'
drivers/spi/spi-atmel.c:893: undefined reference to `dma_mapping_error'
drivers/spi/spi-atmel.c:897: undefined reference to `dma_map_single'
drivers/spi/spi-atmel.c:900: undefined reference to `dma_mapping_error'
drivers/spi/spi-atmel.c:902: undefined reference to `dma_unmap_single'
drivers/built-in.o: In function `atmel_spi_probe':
drivers/spi/spi-atmel.c:1540: undefined reference to `dma_alloc_coherent'
drivers/spi/spi-atmel.c:1623: undefined reference to `dma_free_coherent'
drivers/built-in.o: In function `atmel_spi_remove':
drivers/spi/spi-atmel.c:1665: undefined reference to `dma_free_coherent'
drivers/built-in.o: In function `ep93xx_spi_dma_finish':
drivers/spi/spi-ep93xx.c:550: undefined reference to `dma_unmap_sg'
drivers/built-in.o: In function `ep93xx_spi_dma_prepare':
drivers/spi/spi-ep93xx.c:516: undefined reference to `dma_map_sg'
drivers/spi/spi-ep93xx.c:522: undefined reference to `dma_unmap_sg'
drivers/built-in.o: In function `omap2_mcspi_rx_dma':
drivers/spi/spi-omap2-mcspi.c:475: undefined reference to `dma_unmap_single'
drivers/built-in.o: In function `omap2_mcspi_txrx_dma':
drivers/spi/spi-omap2-mcspi.c:589: undefined reference to `dma_unmap_single'
drivers/built-in.o: In function `omap2_mcspi_transfer_one_message':
drivers/spi/spi-omap2-mcspi.c:1202: undefined reference to `dma_map_single'
drivers/spi/spi-omap2-mcspi.c:1204: undefined reference to `dma_mapping_error'
drivers/spi/spi-omap2-mcspi.c:1211: undefined reference to `dma_map_single'
drivers/spi/spi-omap2-mcspi.c:1213: undefined reference to `dma_mapping_error'
drivers/spi/spi-omap2-mcspi.c:1217: undefined reference to `dma_unmap_single'
drivers/built-in.o: In function `tegra_spi_deinit_dma_param':
drivers/spi/spi-tegra114.c:675: undefined reference to `dma_free_coherent'
drivers/built-in.o: In function `tegra_spi_copy_spi_rxbuf_to_client_rxbuf':
drivers/spi/spi-tegra114.c:415: undefined reference to `dma_sync_single_for_cpu'
drivers/spi/spi-tegra114.c:440: undefined reference to `dma_sync_single_for_cpu'
drivers/built-in.o: In function `tegra_spi_copy_client_txbuf_to_spi_txbuf':
drivers/spi/spi-tegra114.c:381: undefined reference to `dma_sync_single_for_cpu'
drivers/spi/spi-tegra114.c:405: undefined reference to `dma_sync_single_for_cpu'
drivers/built-in.o: In function `tegra_spi_start_dma_based_transfer':
drivers/spi/spi-tegra114.c:543: undefined reference to `dma_sync_single_for_cpu'
drivers/built-in.o: In function `tegra_slink_deinit_dma_param':
drivers/spi/spi-tegra20-slink.c:705: undefined reference to `dma_free_coherent'
drivers/built-in.o: In function `tegra_slink_copy_spi_rxbuf_to_client_rxbuf':
drivers/spi/spi-tegra20-slink.c:427: undefined reference to `dma_sync_single_for_cpu'
drivers/spi/spi-tegra20-slink.c:452: undefined reference to `dma_sync_single_for_cpu'
drivers/built-in.o: In function `tegra_slink_copy_client_txbuf_to_spi_txbuf':
drivers/spi/spi-tegra20-slink.c:393: undefined reference to `dma_sync_single_for_cpu'
drivers/spi/spi-tegra20-slink.c:417: undefined reference to `dma_sync_single_for_cpu'
drivers/built-in.o: In function `tegra_slink_start_dma_based_transfer':
drivers/spi/spi-tegra20-slink.c:561: undefined reference to `dma_sync_single_for_cpu'
Add dependencies on HAS_DMA to fix this.
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Broadcom 53xx ARM SoCs use bcma bus that contains various cores (AKA
devices). If board has a serial flash, it's connected over SPI and the
bcma bus includes a SPI controller. Example log from such a board:
bus0: Found chip with id 53010, rev 0x00 and package 0x02
(...)
bus0: Core 18 found: SPI flash controller (manuf 0x4BF, id 0x50A, rev 0x01, class 0x0)
This patch adds a bcma driver for SPI core, it registers SPI master
controller and "bcm53xxspiflash" SPI device.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
SPI PXA2XX core layer has dependency on common clock framework
to obtain information on host supported clock rate. Thus, we
setup the clock device in the PCI glue layer to enable PCI mode
host pass in the clock rate information.
Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Acked-by: Kweh, Hock Leong <hock.leong.kweh@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
As of commit ab116a4df4 ("dmaengine:
shdma: fix a build failure on platforms with no DMA support"), the DMA
filter function shdma_chan_filter() is sufficiently abstracted to allow
building without DMA support. Hence drop the SH_DMAE_BASE dependency on
SUPERH.
Also increase build coverage by allowing the driver to be enabled if
COMPILE_TEST=y.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
If NO_DMA=y:
drivers/built-in.o: In function `sh_msiof_release_dma':
spi-sh-msiof.c:(.text+0x23cbfe): undefined reference to `dma_unmap_single'
drivers/built-in.o: In function `sh_msiof_request_dma':
spi-sh-msiof.c:(.text+0x23cd5e): undefined reference to `dma_map_single'
spi-sh-msiof.c:(.text+0x23cd70): undefined reference to `dma_mapping_error'
spi-sh-msiof.c:(.text+0x23cdca): undefined reference to `dma_unmap_single'
drivers/built-in.o: In function `sh_msiof_dma_once':
spi-sh-msiof.c:(.text+0x23d450): undefined reference to `dma_sync_single_for_cpu'
spi-sh-msiof.c:(.text+0x23d5ea): undefined reference to `dma_sync_single_for_cpu'
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
Without the dependencies for the accessors the driver can be enabled on
architectures where it will fail to build.
Signed-off-by: Mark Brown <broonie@linaro.org>
In order to facilitate understanding, rockchip SPI controller IP design
looks similar in its registers to designware. But IC implementation
is different from designware, So we need a dedicated driver for Rockchip
RK3XXX SoCs integrated SPI. The main differences:
- dma request line: rockchip SPI controller have two DMA request line
for tx and rx.
- Register offset:
RK3288 dw
SPI_CTRLR0 0x0000 0x0000
SPI_CTRLR1 0x0004 0x0004
SPI_SSIENR 0x0008 0x0008
SPI_MWCR NONE 0x000c
SPI_SER 0x000c 0x0010
SPI_BAUDR 0x0010 0x0014
SPI_TXFTLR 0x0014 0x0018
SPI_RXFTLR 0x0018 0x001c
SPI_TXFLR 0x001c 0x0020
SPI_RXFLR 0x0020 0x0024
SPI_SR 0x0024 0x0028
SPI_IPR 0x0028 NONE
SPI_IMR 0x002c 0x002c
SPI_ISR 0x0030 0x0030
SPI_RISR 0x0034 0x0034
SPI_TXOICR NONE 0x0038
SPI_RXOICR NONE 0x003c
SPI_RXUICR NONE 0x0040
SPI_MSTICR NONE 0x0044
SPI_ICR 0x0038 0x0048
SPI_DMACR 0x003c 0x004c
SPI_DMATDLR 0x0040 0x0050
SPI_DMARDLR 0x0044 0x0054
SPI_TXDR 0x0400 NONE
SPI_RXDR 0x0800 NONE
SPI_IDR NONE 0x0058
SPI_VERSION NONE 0x005c
SPI_DR NONE 0x0060
- register configuration:
such as SPI_CTRLRO in rockchip SPI controller:
cr0 = (CR0_BHT_8BIT << CR0_BHT_OFFSET)
| (CR0_SSD_ONE << CR0_SSD_OFFSET);
cr0 |= (rs->n_bytes << CR0_DFS_OFFSET);
cr0 |= ((rs->mode & 0x3) << CR0_SCPH_OFFSET);
cr0 |= (rs->tmode << CR0_XFM_OFFSET);
cr0 |= (rs->type << CR0_FRF_OFFSET);
For more information, see RK3288 chip manual.
- Wait for idle: Must ensure that the FIFO data has been sent out
before the next transfer.
Signed-off-by: addy ke <addy.ke@rock-chips.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The spi-topcliff-pch driver is for a companion chip to the Intel Atom
E600 series processors. These are 32-bit x86 processors so the driver
is only needed on X86_32. Add COMPILE_TEST as an alternative, so that
the driver can still be build-tested elsewhere.
Signed-off-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
Add dependency on ARM in Kconfig.
This is to fix the build error related to _relaxed IO.
Remove dependency on SPI_MASTER because this is already defined
under if SPI_MASTER in Kconfig.
Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Add driver for Cadence SPI controller. This is used in Xilinx Zynq.
Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Spi v3 controller is not only used on Blackfin. So rename it
and use ioread/iowrite api to make it work on other platform.
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Commit 8fc1b0f87d ("ARM: qcom: Split Qualcomm support into legacy and
multiplatform") removed Kconfig symbol ARCH_MSM_DT. But that commit
left one (optional) dependency on ARCH_MSM_DT untouched.
Three Kconfig symbols used to depend on ARCH_MSM_DT: ARCH_MSM8X60,
ARCH_MSM8960, and ARCH_MSM8974. These three symbols now depend on
ARCH_QCOM. So it appears this driver needs to depend on ARCH_QCOM too.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
This helps increasing build testing coverage.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The tnetv107x platform is getting removed, so this driver
will not be needed any more.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
This simple SPI master controller is built into xtfpga bitstreams. It
always transfers 16 bit words in SPI mode 0, automatically asserting CS
on transfer start and deasserting on end.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The only remaining feature of spi-bitbang used by this driver is the
chipselect() callback, which just does conditional GPIO.
This is handled fine by the SPI core's spi_set_cs(), hence switch the
driver to use the core message handling through our own transfer_one()
method.
As the (optional) GPIO CS is no longer deasserted at spi_master.setup()
time (through spi_bitbang_setup() and the spi_bitbang.chipselect()
callback), we now have to take care of that ourselves.
Remove the call to spi_master_put() in sh_msiof_spi_remove(), as our SPI
master is now registered using devm_spi_register_master()
(spi_bitbang_start() uses the non-managed version).
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Mark Brown <broonie@linaro.org>
This driver uses writel_relaxed() which does not exist in x86, ppc, etc.
Make it depend on ARM && COMPILE_TEST to avoid below build error:
CC [M] drivers/spi/spi-qup.o
drivers/spi/spi-qup.c: In function 'spi_qup_set_state':
drivers/spi/spi-qup.c:180:3: error: implicit declaration of function 'writel_relaxed' [-Werror=implicit-function-declaration]
cc1: some warnings being treated as errors
make[2]: *** [drivers/spi/spi-qup.o] Error 1
make[1]: *** [drivers/spi] Error 2
make: *** [drivers] Error 2
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Mark Brown