Commit Graph

574449 Commits

Author SHA1 Message Date
Christian König c3874b758a drm/amdgpu: stop blocking for page filp fences
Just register an callback and reschedule the work item if necessary.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-16 17:24:07 -05:00
Christian König 6800e2ea2e drm/amdgpu: stop calling amdgpu_gpu_reset from the flip code
We don't return -EDEADLK any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-16 17:23:31 -05:00
Christian König 9b3896686f drm/amdgpu: remove fence reset detection leftovers
wait_event() never returns before the fence was signaled.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-16 17:22:16 -05:00
Felix Kuehling fa5b500030 drm/amdgpu: Fix race condition in MMU notifier release
The release notifier can get called a second time from
mmu_notifier_unregister depending on a race between
__mmu_notifier_release and amdgpu_mn_destroy. Use
mmu_notifier_unregister_no_release to avoid this.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-02-16 17:17:14 -05:00
Lukas Wunner 477d9f0ea6 drm/radeon: Fix WARN_ON if DRM_DP_AUX_CHARDEV is enabled
Rafael Antognolli's new DRM_DP_AUX_CHARDEV feature causes a WARN_ON
if drm_dp_aux->dev == drm_connector->kdev and drm_dp_aux_unregister()
is called after drm_connector_unregister(). radeon is the only driver
affected by this besides i915. (amdgpu calls drm_dp_aux_unregister()
before drm_connector_unregister().)

Cc: Rafael Antognolli <rafael.antognolli@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:56:06 -05:00
Alex Deucher 549300ceae drm/amdgpu/vi: move uvd tiling config setup into uvd code
Split uvd and gfx programming.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:53:14 -05:00
Alex Deucher c458fe9425 drm/amdgpu/vi: move sdma tiling config setup into sdma code
Split sdma and gfx programming.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:53:04 -05:00
Alex Deucher 76ed6cb017 drm/amdgpu/cik: move uvd tiling config setup into uvd code
Split uvd and gfx programming.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:52:53 -05:00
Alex Deucher 2b3a765d83 drm/amdgpu/cik: move sdma tiling config setup into sdma code
Split sdma and gfx programming.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:52:43 -05:00
Alex Deucher d93f3ca706 drm/amdgpu/gfx7: rework gpu_init()
Split the sw and hw parts into separate functions.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:52:03 -05:00
Alex Deucher 8f8e00c17e drm/amdgpu/gfx: clean up harvest configuration (v2)
Read back harvest configuration from registers and simplify
calculations.  No need to program the raster config registers.
These are programmed as golden registers and the user mode
drivers program them as well.

v2: rebase on Tom's patches

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:47:18 -05:00
Christian König a750b47e49 drm/amdgpu: fix coding style in amdgpu_ctx.c
Don't use pointer arithmetic and fix the indentation.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:42:54 -05:00
Christian König 20874179a2 drm/amdgpu: nuke the kernel context
Not used any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:41:58 -05:00
Christian König c594989cc0 drm/amdgpu: use separate scheduler entity for VCE submissions
This allows us to remove the kernel context and use a better
priority for the submissions.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:41:01 -05:00
Christian König ead833eced drm/amdgpu: use separate scheduler entity for UVD submissions
This allows us to remove the kernel context and use a better
priority for the submissions.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:40:02 -05:00
Christian König 703297c1fe drm/amdgpu: use separate scheduler entitiy for buffer moves
This allows us to remove the global kernel context.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:39:07 -05:00
Christian König 2d55e45a03 drm/amdgpu: use SDMA round robin for VM updates v3
Distribute the load on both rings.

v2: use a loop for the initialization
v3: agd: rebase on upstream

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:38:16 -05:00
Christian König 3ee94136b4 drm/amdgpu: remove is_pte_ring
Not used for anything.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:35:54 -05:00
Christian König 2bd9ccfa75 drm/amdgpu: use per VM entity for page table updates (v2)
Updates from different VMs can be processed independently.

v2: agd: rebase on upstream

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:35:16 -05:00
Christian König c41d271d75 drm/amdgpu: remove the userptr rmn->lock
Avoid a lock inversion problem by just using the mmap_sem to
protect the entries of the intervall tree.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
2016-02-12 15:32:07 -05:00
Harry Wentland e7813d0cd8 drm/amd/include: Update dce 8 headers for dal
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:31:47 -05:00
Tom St Denis 5cb60bf697 drm/amdgpu/gfx7: Fix whitespace
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:31:04 -05:00
Tom St Denis 7edd6b2faa drm/amdgpu/gfx7: Simplify wptr/rptr functions
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:30:26 -05:00
Tom St Denis 6d1d683181 drm/amdgpu/gfx7: LOC reduction in gfx_v7_0_setup_rb
Reduce for loop with bitmask to simple complement and mask

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:29:47 -05:00
Tom St Denis d3a7207bdb drm/amdgpu/gfx7: Simplify bitmask creation
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:27:46 -05:00
Tom St Denis 840a20d31b drm/amdgpu/gfx7: Reduce linecount in table init
Replaces switch statements with direct assignments to
reduce line count significantly.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:27:34 -05:00
Rex Zhu fa9e699105 drm/amd/powerplay: add powerplay valid check to avoid null point.
In case CONFIG_DRM_AMD_POWERPLAY is defined and amdgpu.powerplay=0.
some functions in powrplay can also be called by DAL. and the input parameter is *adev.
if just check point not NULL was not enough and will lead to NULL point error.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 16:21:12 -05:00
Eric Yang 0f18563aaa drm/amd/powerplay: Enable low mem pstate when cancel_high
Signed-off-by: Eric Yang <eric.yang2@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 16:19:29 -05:00
Eric Yang 5952c75b41 drm/amd/powerplay: Use correct clock in cz_apply_state_adjust_rules
Signed-off-by: Eric Yang <eric.yang2@amd.com>
Reviewed-by: Eagle Yeh <eagle.yeh@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 16:17:01 -05:00
Rex Zhu ff5e20c2a0 drm/amd/powerplay: get real display device num by cgs interface
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 16:16:23 -05:00
Vitaly Prosyak 58c3ce23c9 drm/amd/powerplay: Use engine clock limit calculated by dal
Use min required system clock calculated by dal

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 16:14:57 -05:00
David Rokhvarg 155f1127ce drm/amd/powerplay: Make declarations of functions exposed to DAL type-safe.
Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 16:13:59 -05:00
Rex Zhu f1232c6136 drm/amd/powerplay: implement functions in carrizo for DAL.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 16:13:25 -05:00
Rex Zhu e273b04117 drm/amd/powerplay: export interface to DAL.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 16:12:23 -05:00
Rex Zhu 47329134ae drm/amd/powerplay: change struct name.
amd_pp_dal_clock_info to amd_pp_simple_clock_info.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 16:11:04 -05:00
Harry Wentland 781095f903 drm/amd: Adding IVSRC register headers
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 16:09:04 -05:00
Vitaly Prosyak 6bd9e877ce drm/amdgpu: Move MMIO flip out of spinlocked region
Prior actual  MMIO flip we need to acquire DAL mutex to guard
our target state which get modified on reset mode.
Assign page flip status before actual flip to handle
the possible race condition with interrupt.

Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 16:08:55 -05:00
Harry Wentland 9ddf940f5d drm/amdgpu: Don't crash system if we can't get crtc
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 16:08:40 -05:00
Christian König e86f9ceee1 drm/amdgpu: move sync into job object
No need to keep that for every IB.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:24 -05:00
Christian König 9f2ade33e6 drm/amdgpu: send VCE IB tests directly to the ring again
We need the IB test for GPU resets as well and
the scheduler should be stoped then.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:24 -05:00
Christian König d7af97dbcc drm/amdgpu: send UVD IB tests directly to the ring again
We need the IB test for GPU resets as well and
the scheduler should be stoped then.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:23 -05:00
Christian König 0856cab1a6 drm/amdgpu: rename amdgpu_sched.c to amdgpu_job.c
That's probably a better matching name.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:23 -05:00
Christian König d71518b5aa drm/amdgpu: cleanup in kernel job submission
Add a job_alloc_with_ib helper and proper job submission.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:22 -05:00
Christian König a0332b56f6 drm/amdgpu: send SDMA/GFX IB tests directly to the ring again
There is no point in sending them through the scheduler.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:22 -05:00
Christian König ec72b8006c drm/amdgpu: directly return fence from ib_schedule
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:21 -05:00
Christian König b07c60c065 drm/amdgpu: move ring from IBs into job
We can't submit to multiple rings at the same time anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:20 -05:00
Christian König 9e5d53094c drm/amdgpu: make pad_ib a ring function v3
The padding depends on the firmware version and we need that for BO moves as
well, not only for VM updates.

v2: new approach of making pad_ib a ring function
v3: fix typo in macro name

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:20 -05:00
Christian König 4c0b242cf2 drm/amdgpu: cleanup user fence handling in the CS
Don't keep that around twice.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:19 -05:00
Christian König 50838c8cc4 drm/amdgpu: add proper job alloc/free functions
And use them in the CS instead of allocating IBs and jobs separately.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:18 -05:00
Christian König 4acabfe379 drm/amdgpu: fix num_ibs check
Specifying no IBs on command submission is invalid, stop crashing
badly when somebody tries it.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:18 -05:00