Commit Graph

219 Commits

Author SHA1 Message Date
Olof Johansson d6e245acc9 arm64: tegra: Device tree fixes for v5.2-rc1
This contains one patch to disable the recently added XUSB support on
 Jetson TX2 which is reported to cause boot and CPU hotplug failures in
 some cases and doesn't allow the core power rail to be switched off.
 
 Furthermore there are some changes to enable IOMMU support on more
 devices. This is needed in order to prevent these devices from breaking
 with the policy change in the ARM SMMU driver to break insecure devices
 that is currently headed for v5.2.
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Merge tag 'tegra-for-5.2-arm64-dt-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/late

arm64: tegra: Device tree fixes for v5.2-rc1

This contains one patch to disable the recently added XUSB support on
Jetson TX2 which is reported to cause boot and CPU hotplug failures in
some cases and doesn't allow the core power rail to be switched off.

Furthermore there are some changes to enable IOMMU support on more
devices. This is needed in order to prevent these devices from breaking
with the policy change in the ARM SMMU driver to break insecure devices
that is currently headed for v5.2.

* tag 'tegra-for-5.2-arm64-dt-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Disable XUSB support on Jetson TX2
  arm64: tegra: Enable SMMU translation for PCI on Tegra186
  arm64: tegra: Fix insecure SMMU users for Tegra186

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-05-16 10:55:23 -07:00
Thierry Reding 7278358407 arm64: tegra: Disable XUSB support on Jetson TX2
The recently introduced XUSB support for Jetson TX2 is causing boot, CPU
hotplug and suspend/resume failures according to several reports.

Temporarily work around this by disabling the XUSB controller and XUSB
pad controller nodes in device tree, while we figure out what's causing
this.

Reported-by: Bitan Biswas <bbiswas@nvidia.com>
Reported-by: Jonathan Hunter <jonathanh@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-05-08 14:42:57 +02:00
Thierry Reding f2a465e718 arm64: tegra: Enable SMMU translation for PCI on Tegra186
Commit 954a03be03 ("iommu/arm-smmu: Break insecure users by disabling
bypass by default") intentionally breaks all devices using the SMMU in
bypass mode. This breaks, among other things, PCI support on Tegra186.
Fix this by populating the iommus property and friends for the PCIe
controller.

Fixes: 954a03be03 ("iommu/arm-smmu: Break insecure users by disabling bypass by default")
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-05-08 14:42:52 +02:00
Jonathan Hunter dfdbf16c50 arm64: tegra: Fix insecure SMMU users for Tegra186
Commit 954a03be03 ("iommu/arm-smmu: Break insecure users by disabling
bypass by default") intentionally breaks all devices using the SMMU in
bypass mode. This is breaking various devices on Tegra186 which include
the ethernet, BPMP and HDA device. Fix this by populating the iommus
property for these devices with their stream ID.

Fixes: 954a03be03 ("iommu/arm-smmu: Break insecure users by disabling bypass by default")
Signed-off-by: Jonathan Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-05-08 14:42:51 +02:00
Robin Murphy c8e3993dd5 dt-bindings: hwmon (pwm-fan) Remove dead "cooling-*-state" properties
The old "cooling-{min,max}-state" properties for thermal bindings were
ratified to "cooling-{min,max}-level" by commit eb168b70de ("of:
thermal: Fix inconsitency between cooling-*-state and cooling-*-level"),
which were later removed entirely by commit e04907dbc2 ("dt-bindings:
thermal: Remove "cooling-{min|max}-level" properties").

The pwm-fan binding, however, was apparently in-flight in parallel with
that ratification, and so managed to introduce an example of the old
properties which escaped the scope of the later cleanup and has thus
continued to be dutifully copied for new boards despite being useless.
Clean up these remaining undocumented anachronisms to minimise any
further confusion.

Acked-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-04-28 12:54:31 -07:00
Thierry Reding 2f03e39b5b arm64: tegra: Remove regulator hacks on Jetson TX2
Various regulators were marked as always-on for Jetson TX2. At this
point, all of the regulators are properly hooked up, so this workaround
is no longer required.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17 16:48:44 +02:00
Thierry Reding 72f8ae3f8d arm64: tegra: Enable XUSB on P2771
Enable the relevant pads for XUSB support on P2771-0000 and hook up the
USB supply voltage regulators to the ports.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17 16:48:44 +02:00
Thierry Reding 8bfde5183e arm64: tegra: Add XUSB and pad controller on Tegra186
Adds the XUSB pad and XUSB controllers on Tegra186.

Reviewed-by: JC Kuo <jckuo@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17 16:48:43 +02:00
Thierry Reding 6772cd0eac arm64: tegra: Add NVIDIA Jetson Nano Developer Kit support
The Jetson Nano Developer Kit is a Tegra X1 based development board. It
is similar to Jetson TX1 but it is not pin compatible. It features 4 GB
of LPDDR4, an SPI NOR flash for early boot firmware and an SD card slot
used for storage.

HDMI 2.0 or DP 1.2 are available for display, four USB ports (3 USB 2.0
and 1 USB 3.0) can be used to attach a variety of peripherals and a PCI
Ethernet controller provides onboard network connectivity. An M.2 Key-E
slot with PCIe x1 adds additional possibilities.

A 40-pin header on the board can be used to extend the capabilities and
exposed interfaces of the Jetson Nano.

Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17 16:25:18 +02:00
Thierry Reding fa941e695e arm64: tegra: smaug: Move PLL power supplies to XUSB pad controller
The XUSB pad controller is responsible for supplying power to the PLLs
used to drive the various USB, PCI and SATA pads. Move the PLL power
supplies from the PCIe and XUSB controllers to the XUSB pad controller
to make sure they are available when needed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17 16:25:15 +02:00
Thierry Reding 8f68dcd74d arm64: tegra: jetson-tx1: Move PLL power supplies to XUSB pad controller
The XUSB pad controller is responsible for supplying power to the PLLs
used to drive the various USB, PCI and SATA pads. Move the PLL power
supplies from the PCIe and XUSB controllers to the XUSB pad controller
to make sure they are available when needed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17 16:25:14 +02:00
Sowjanya Komatineni c4307836cb arm64: tegra: Enable command queue for Tegra186 SDMMC4
The workaround for a hardware bug preventing this from working has been
merged now, so command queue support can be enabled again for Tegra186.

Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-12 17:22:52 +02:00
Sowjanya Komatineni e9b001960c arm64: tegra: Fix default tap and trim values
Default tap and trim values are incorrect for Tegra186 SDMMC4. This
patch fixes them.

Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-12 17:22:07 +02:00
Jon Hunter 7320733094 arm64: tegra: Add supply for temperature sensor on P2888
The VCC supply property is not populated for the temperature sensor on
the P2888 board and so the following warning is observed on boot ...

 lm90 0-004c: 0-004c supply vcc not found, using dummy regulator

On the P2888 board, the VCC supply for the temperature sensor is
connected to the 'vdd_1v8ls' rail. Add the 'vcc-supply' property for
the temperature sensor to prevent this warning message from occurring.

Fixes: 8b457812f5 ('arm64: tegra: Add temperature sensor on P2888')
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-12 17:21:50 +02:00
Sameer Pujar 10ece0c14e arm64: tegra: Enable aconnect, ADMA and AGIC on Jetson TX1
These are currently mostly unused because we lack a proper audio driver
on Tegra210. However, enabling them makes sure that at least their probe
code paths are tested at runtime.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-12 17:21:50 +02:00
Joseph Lo 6c00cac1de arm64: tegra: Add L2 cache topology to Tegra210
Add L2 cache and make it the next level of cache for each of the CPUs.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-12 17:21:50 +02:00
Joseph Lo 3056c1ca29 arm64: tegra: Enable CPU idle support for Shield
Enable CPU idle support for Shield platform.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-12 17:21:49 +02:00
Joseph Lo 15e666968f arm64: tegra: Enable CPU idle support for Smaug
Enable CPU idle support for Smaug platform.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-12 17:21:48 +02:00
Joseph Lo d2c19dd714 arm64: tegra: Enable CPU idle support for Jetson TX1
Enable CPU idle support for Jetson TX1 platform.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-12 17:21:48 +02:00
Joseph Lo da77c6d92b arm64: tegra: Add CPU idle states properties for Tegra210
Add idle states properties for generic ARM CPU idle driver. This
includes a cpu-sleep state which is the power down state of CPU cores.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-12 17:21:48 +02:00
Joseph Lo d9931a1869 arm64: tegra: Fix timer node for Tegra210
Fix timer node to make it work with Tegra210 timer driver.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-12 17:21:46 +02:00
Jonathan Hunter 9395874219 arm64: tegra: Disable CQE Support for SDMMC4 on Tegra186
Enabling CQE support on Tegra186 Jetson TX2 has introduced a regression
that is causing accesses to the file-system on the eMMC to fail. Errors
such as the following have been observed ...

 mmc2: running CQE recovery
 mmc2: mmc_select_hs400 failed, error -110
 print_req_error: I/O error, dev mmcblk2, sector 8 flags 80700
 mmc2: cqhci: CQE failed to exit halt state

For now disable CQE support for Tegra186 until this issue is resolved.

Fixes: dfd3cb6feb arm64: tegra: Add CQE Support for SDMMC4
Signed-off-by: Jonathan Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-03-25 17:12:20 +01:00
Linus Torvalds da2577fe63 sound updates for 5.1
We had again a busy development cycle with many new drivers as well as
 lots of core improvements / cleanups.  Let's go for highlights:
 
 ALSA core:
 - PCM locking scheme was refactored for reducing a global rwlock
 - PCM suspend is handled in the device type PM ops now; lots of
   explicit calls were reduced by this action
 - Cleanups about PCM buffer preallocation calls
 - Kill NULL device object in memory allocations
 - Lots of procfs API cleanups
 
 ASoC core:
 - Support for only powering up channels that are actively being used
 - Cleanups / fixes of topology API
 
 ASoC drivers:
 - MediaTek BTCVSD for a Bluetooth radio chip, which is the first such
   driver we've had upstream!
 - Quite a few improvements to simplify the generic card drivers,
   especially the merge of the SCU cards into the main generic drivers
 - Lots of fixes for probing on Intel systems to follow more standard
   styles
 - A big refresh and cleanup of the Samsung drivers
 - New drivers: Asahi Kasei Microdevices AK4497, Cirrus Logic CS4341
   and CS35L26, Google ChromeOS embedded controllers, Ingenic JZ4725B,
   MediaTek BTCVSD, MT8183 and MT6358, NXP MICFIL, Rockchip RK3328,
   Spreadtrum DMA controllers, Qualcomm WCD9335, Xilinx S/PDIF and PCM
   formatters
 
 ALSA drivers:
 - Improvements of Tegra HD-audio controller driver for supporting new
   chips
 - HD-audio codec quirks for ALC294 S4 resume, ASUS laptop, Chrome
   headset button support and Dell workstations
 - Improved DSD support on USB-audio
 - Quirk for MOTU MicroBook II USB-audio
 - Support for Fireface UCX support and Solid State Logic Duende
   Classic/Mini
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Merge tag 'sound-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "We had again a busy development cycle with many new drivers as well as
  lots of core improvements / cleanups. Let's go for highlights:

  ALSA core:

   - PCM locking scheme was refactored for reducing a global rwlock

   - PCM suspend is handled in the device type PM ops now; lots of
     explicit calls were reduced by this action

   - Cleanups about PCM buffer preallocation calls

   - Kill NULL device object in memory allocations

   - Lots of procfs API cleanups

  ASoC core:

   - Support for only powering up channels that are actively being used

   - Cleanups / fixes of topology API

  ASoC drivers:

   - MediaTek BTCVSD for a Bluetooth radio chip, which is the first such
     driver we've had upstream!

   - Quite a few improvements to simplify the generic card drivers,
     especially the merge of the SCU cards into the main generic drivers

   - Lots of fixes for probing on Intel systems to follow more standard
     styles

   - A big refresh and cleanup of the Samsung drivers

   - New drivers: Asahi Kasei Microdevices AK4497, Cirrus Logic CS4341
     and CS35L26, Google ChromeOS embedded controllers, Ingenic JZ4725B,
     MediaTek BTCVSD, MT8183 and MT6358, NXP MICFIL, Rockchip RK3328,
     Spreadtrum DMA controllers, Qualcomm WCD9335, Xilinx S/PDIF and PCM
     formatters

  ALSA drivers:

   - Improvements of Tegra HD-audio controller driver for supporting new
     chips

   - HD-audio codec quirks for ALC294 S4 resume, ASUS laptop, Chrome
     headset button support and Dell workstations

   - Improved DSD support on USB-audio

   - Quirk for MOTU MicroBook II USB-audio

   - Support for Fireface UCX support and Solid State Logic Duende
     Classic/Mini"

* tag 'sound-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (461 commits)
  ALSA: usb-audio: Add quirk for MOTU MicroBook II
  ASoC: stm32: i2s: skip useless write in slave mode
  ASoC: stm32: i2s: fix race condition in irq handler
  ASoC: stm32: i2s: remove useless callback
  ASoC: stm32: i2s: fix dma configuration
  ASoC: stm32: i2s: fix stream count management
  ASoC: stm32: i2s: fix 16 bit format support
  ASoC: stm32: i2s: fix IRQ clearing
  ASoC: qcom: Kconfig: fix dependency for sdm845
  ASoC: Intel: Boards: Add Maxim98373 support
  ASoC: rsnd: gen: fix SSI9 4/5/6/7 busif related register address
  ALSA: firewire-motu: fix construction of PCM frame for capture direction
  ALSA: bebob: use more identical mod_alias for Saffire Pro 10 I/O against Liquid Saffire 56
  ALSA: hda: Extend i915 component bind timeout
  ASoC: wm_adsp: Improve logging messages
  ASoC: wm_adsp: Add support for multiple compressed buffers
  ASoC: wm_adsp: Refactor compress stream initialisation
  ASoC: wm_adsp: Reorder some functions for improved clarity
  ASoC: wm_adsp: Factor out stripping padding from ADSP data
  ASoC: cs35l36: Fix an IS_ERR() vs NULL checking bug
  ...
2019-03-06 14:10:46 -08:00
Sameer Pujar 11ce430830 arm64: tegra: custom name for hda sound card
"nvidia,model" property is added to pass custom name for hda sound card.
This is parsed in hda driver and used for card name. This aligns with the
way with which sound cards are named in general.

This patch populates above for jetson-tx1, jetson-tx2 and jetson-xavier.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2019-02-22 10:46:37 +01:00
Arnd Bergmann 1228c051ba arm64: tegra: Device tree changes for v5.1-rc1
This contains a couple of fixes to existing device trees, enables CPU
 frequency scaling on various Tegra210 boards, enables the TCU as debug
 serial port on Jetson Xavier, adds various improvements for SDMMC on
 Tegra210, Tegra186 and Tegra194 boards and finally adds initial support
 for the NVIDIA Shield TV.
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Merge tag 'tegra-for-5.1-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

arm64: tegra: Device tree changes for v5.1-rc1

This contains a couple of fixes to existing device trees, enables CPU
frequency scaling on various Tegra210 boards, enables the TCU as debug
serial port on Jetson Xavier, adds various improvements for SDMMC on
Tegra210, Tegra186 and Tegra194 boards and finally adds initial support
for the NVIDIA Shield TV.

* tag 'tegra-for-5.1-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (25 commits)
  arm64: tegra: Update compatible for Tegra186 I2C
  arm64: tegra: Update compatible for Tegra210 I2C
  arm64: tegra: Support 200 MHz for SDMMC on Tegra194
  arm64: tegra: Add CQE Support for SDMMC4
  arm64: tegra: Add SDMMC auto-calibration settings
  arm64: tegra: Mark TCU as primary serial port on Tegra194 P2888
  arm64: tegra: Add nodes for TCU on Tegra194
  arm64: tegra: Enable DFLL clock on Smaug
  arm64: tegra: Add CPU power rail regulator on Smaug
  arm64: tegra: Enable DFLL clock on Jetson TX1
  arm64: tegra: Add pinmux for PWM-based DFLL support on P2597
  arm64: tegra: Add CPU clocks on Tegra210
  arm64: tegra: Add DFLL clock on Tegra210
  arm64: tegra: p2771-0000: Use TEGRA186_ prefix for GPIO names
  arm64: tegra: p3310: Use TEGRA186_ prefix for GPIO names
  arm64: tegra: p2597: Sort nodes by unit-address
  arm64: tegra: p2972: Sort nodes properly
  arm64: tegra: Add regulators for Tegra210 Darcy
  arm64: tegra: Add pinmux for Darcy board
  arm64: tegra: Add gpio-keys nodes for Darcy
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 15:52:12 +01:00
Sowjanya Komatineni 250a36c06f arm64: tegra: Update compatible for Tegra186 I2C
Update I2C Device node compatible string to be appropriate.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-02-07 19:03:58 +01:00
Sowjanya Komatineni 140723b981 arm64: tegra: Update compatible for Tegra210 I2C
Update I2C device node compatible string to be appropriate.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-02-07 19:03:58 +01:00
Sowjanya Komatineni 351648d0cc arm64: tegra: Support 200 MHz for SDMMC on Tegra194
Change the SDMMC clock source to support a maximum frequency of 200 MHz
on Tegra194.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-02-07 19:03:57 +01:00
Sowjanya Komatineni dfd3cb6feb arm64: tegra: Add CQE Support for SDMMC4
Add CQE Support for Tegra186 and Tegra194 SDMMC4 controller

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-02-07 19:03:57 +01:00
Sowjanya Komatineni 4e0f122991 arm64: tegra: Add SDMMC auto-calibration settings
Add SDMMC initial pad offsets used by auto calibration process.

Add SDMMC fixed drive strengths for Tegra210, Tegra186 and
Tegra194 which are used when calibration timeouts.

Fixed drive strengths are based on Pre SI Analysis of the pads.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-02-07 19:03:57 +01:00
Mikko Perttunen 6ab6a4d220 arm64: tegra: Mark TCU as primary serial port on Tegra194 P2888
The Tegra Combined UART is the proper primary serial port on P2888,
so use it.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-02-07 19:03:57 +01:00
Mikko Perttunen a38570c22e arm64: tegra: Add nodes for TCU on Tegra194
Add nodes required for communication through the Tegra Combined UART.
This includes the AON HSP instance, addition of shared interrupts
for the TOP0 HSP instance, and finally the TCU node itself. Also
mark the HSP instances as compatible to tegra194-hsp, as the hardware
is not identical but is compatible to tegra186-hsp.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-02-07 19:03:57 +01:00
Joseph Lo d4eb7653a8 arm64: tegra: Enable DFLL clock on Smaug
Enable DFLL clock for Smaug board.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-02-07 19:03:56 +01:00
Joseph Lo f9c8bcc002 arm64: tegra: Add CPU power rail regulator on Smaug
Add CPU power rail regulator for Smaug board.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-02-07 19:03:56 +01:00
Joseph Lo a1304d352c arm64: tegra: Enable DFLL clock on Jetson TX1
Enable DFLL clock for Jetson TX1 platform.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-02-07 19:03:09 +01:00
Joseph Lo a5e98b0b37 arm64: tegra: Add pinmux for PWM-based DFLL support on P2597
Add pinmux for PWM-based DFLL support.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-02-07 19:03:09 +01:00
Joseph Lo 43b9b402f4 arm64: tegra: Add CPU clocks on Tegra210
Add CPU clocks for Tegra210.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-02-07 19:03:09 +01:00
Joseph Lo 2ceed59366 arm64: tegra: Add DFLL clock on Tegra210
Add essential DFLL clock properties for Tegra210.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-02-07 19:03:01 +01:00
Rob Herring 31af04cd60 arm64: dts: Remove inconsistent use of 'arm,armv8' compatible string
The 'arm,armv8' compatible string is only for software models. It adds
little value otherwise and is inconsistently used as a fallback on some
platforms. Remove it from those platforms.

This fixes warnings generated by the DT schema.

Reported-by: Michal Simek <michal.simek@xilinx.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Acked-by: Antoine Tenart <antoine.tenart@bootlin.com>
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Chanho Min <chanho.min@lge.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Wei Xu <xuwei5@hisilicon.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Chunyan Zhang <zhang.lyra@gmail.com>
Acked-by: Robert Richter <rrichter@cavium.com>
Acked-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-01-30 17:34:36 +01:00
Thierry Reding d428f35d95 arm64: tegra: p2771-0000: Use TEGRA186_ prefix for GPIO names
The new prefix allows the GPIOs to be uniquely identified on a per-chip
basis, which makes it easier to distinguish Tegra186 specific GPIOs from
those of later chips such as Tegra194 which supports a very different
set of GPIOs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-01-25 13:45:49 +01:00
Thierry Reding caca0482e7 arm64: tegra: p3310: Use TEGRA186_ prefix for GPIO names
The new prefix allows the GPIOs to be uniquely identified on a per-chip
basis, which makes it easier to distinguish Tegra186 specific GPIOs from
those of later chips such as Tegra194 which supports a very different
set of GPIOs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-01-25 13:45:28 +01:00
Thierry Reding be4f0dd347 arm64: tegra: p2597: Sort nodes by unit-address
Some of these nodes got inserted in the wrong place. Restore ordering
by unit-address.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-01-25 13:41:02 +01:00
Thierry Reding 5eef17ee76 arm64: tegra: p2972: Sort nodes properly
At some point during rebases these were shuffled around. Put them in the
right order again (sorted by unit-address).

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-01-25 13:40:25 +01:00
Mark Zhang 51e5e0182c arm64: tegra: Add regulators for Tegra210 Darcy
Add regulators to the Tegra210 Darcy DTS file including support for
the MAX77620 PMIC.

Signed-off-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-01-25 13:37:05 +01:00
Mark Zhang 6ec2c7161f arm64: tegra: Add pinmux for Darcy board
Add pinmux node for Tegra210 Darcy board.

Signed-off-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-01-25 13:37:05 +01:00
Mark Zhang 7152879d38 arm64: tegra: Add gpio-keys nodes for Darcy
Add gpio-keys nodes for the power button.

Signed-off-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-01-25 13:37:05 +01:00
Mark Zhang dd03aeef17 arm64: tegra: Add support for NVIDIA Shield TV
Add initial device-tree support for NVIDIA Shield TV (a.k.a. Darcy)
based upon Tegra210 SoC with 3 GiB of LPDDR4 RAM.

Signed-off-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-01-25 13:37:04 +01:00
Thierry Reding 968ebd8427 arm64: tegra: Use GIC_SPI for PMIC interrupt on Smaug
Instead of hardcoding the value (0), reuse the symbolic name from
dt-bindings/interrupt-controller/arm-gic.h.

Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-01-25 13:36:33 +01:00
Joseph Lo dcdeec57c3 arm64: tegra: Fix IRQ type of PMIC on Smaug
Fix IRQ type of PMIC which should be configured as high-level trigger.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-01-25 13:02:22 +01:00
Joseph Lo 46e4b2272e arm64: tegra: Fix register range of apbmisc on Tegra210
Fix the register range of apbmisc, that originally inherited from
Tegra124.

Reported-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-01-25 13:01:14 +01:00