Commit Graph

10 Commits

Author SHA1 Message Date
David Lechner 4eff0bebf4 clk: davinci: Fix link errors when not all SoCs are enabled
This fixes linker errors due to undefined symbols when one or more of
the TI DaVinci SoCs is not enabled in the kernel config.

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20180525181150.17873-10-david@lechnology.com
2018-05-30 12:48:49 -07:00
David Lechner 17d8bacf19 clk: davinci: da850-pll: change PLL0 to CLK_OF_DECLARE
PLL0 on davinci/da850-type device needs to be registered early in boot
because it is needed for clocksource/clockevent. Change the driver
to use CLK_OF_DECLARE for this special case.

Reviewed-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20180525181150.17873-8-david@lechnology.com
2018-05-30 12:48:39 -07:00
David Lechner 76c9dd9dbd clk: davinci: pll: allow dev == NULL
This modifies the TI Davinci PLL clock driver to allow for the case
when dev == NULL. On some (most) SoCs that use this driver, the PLL
clock needs to be registered during early boot because it is used
for clocksource/clkevent and there will be no platform device available.

Signed-off-by: David Lechner <david@lechnology.com>
Reviewed-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20180525181150.17873-7-david@lechnology.com
2018-05-30 12:48:35 -07:00
David Lechner 6ef35851a0 clk: davinci: Add platform information for TI DM646x PLL
This adds platform-specific declarations for the PLL clocks on TI
DM646x based systems.

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-03-20 10:16:26 -07:00
David Lechner d67c13eaf7 clk: davinci: Add platform information for TI DM644x PLL
This adds platform-specific declarations for the PLL clocks on TI
DM644x based systems.

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-03-20 10:16:26 -07:00
David Lechner 650bba61fc clk: davinci: Add platform information for TI DM365 PLL
This adds platform-specific declarations for the PLL clocks on TI
DM365 based systems.

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-03-20 10:16:26 -07:00
David Lechner dcdd19b269 clk: davinci: Add platform information for TI DM355 PLL
This adds platform-specific declarations for the PLL clocks on TI
DM355 based systems.

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-03-20 10:16:26 -07:00
David Lechner 55b3caed2b clk: davinci: Add platform information for TI DA850 PLL
This adds platform-specific declarations for the PLL clocks on TI DA850/
OMAP-L138/AM18XX SoCs.

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-03-20 10:16:26 -07:00
David Lechner c92765fdb8 clk: davinci: Add platform information for TI DA830 PLL
This adds platform-specific declarations for the PLL clocks on TI DA830/
OMAP-L137/AM17XX SoCs.

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-03-20 10:16:26 -07:00
David Lechner 2d17269151 clk: davinci: New driver for davinci PLL clocks
This adds a new driver for mach-davinci PLL clocks. This is porting the
code from arch/arm/mach-davinci/clock.c to the common clock framework.
Additionally, it adds device tree support for these clocks.

The ifeq ($(CONFIG_COMMON_CLK), y) in the Makefile is needed to prevent
compile errors until the clock code in arch/arm/mach-davinci is removed.

Note: although there are similar clocks for TI Keystone we are not able
to share the code for a few reasons. The keystone clocks are device tree
only and use legacy one-node-per-clock bindings. Also the register
layouts are a bit different, which would add even more if/else mess
to the keystone clocks. And the keystone PLL driver doesn't support
setting clock rates.

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-03-20 10:16:26 -07:00