Commit Graph

479 Commits

Author SHA1 Message Date
Magnus Damm bb46f6f3f3 pinctrl: sh-pfc: r8a7795: Add support for INTC-EX IRQ pins
Most pins on the r8a7795 SoC can be configured in GPIO mode for
interrupt and GPIO functionality, while a couple of them can also
be routed to the INTC-EX hardware block (formerly known as IRQC).

On r8a7795 the INTC-EX hardware handles pins IRQ0 -> IRQ5 and
this patch adds support for them to the PFC driver as "intc_ex_irqN".

Tested on r8a7795 Salvator-X with an external loop back adapter on
EXIO_D that connects pin 9 (IRQ2/GP2_02) and pin 26 (ExA22/GP2_06).

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-18 09:30:57 +01:00
Ryo Kataoka 73cfc55ae0 pinctrl: sh-pfc: r8a7794: Add audio clock pin groups
Add the audio clock pin groups to the R8A7794 PFC driver.

[Sergei:  fixed pin group names to reflect the reality, fixed pin names in
the comments to *_pins[], lowercased the separator comment, resolved rejects,
added the changelog, renamed the patch.]

Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-18 09:30:53 +01:00
Ryo Kataoka a79ef339dd pinctrl: sh-pfc: r8a7794: Add SSI pin groups
Add the SSI pin groups to the R8A7794 PFC driver.

[Sergei: fixed inconsistent alternate pin group naming, split SSI5/6 pin
groups into data/control ones, moved SSI7 data B group to its proper place,
fixed  pin names in  the comments to *_pins[], extended Cogent Embedded's
copyright, added the changelog, renamed the patch.]

Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-18 09:30:47 +01:00
Takeshi Kihara 76250a6c89 pinctrl: sh-pfc: r8a7795: Add USB2.0 host support
This patch adds USB[0-2] (USB2.0 host) pinmux support to r8a7795 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-08 16:50:31 +01:00
Geert Uytterhoeven a5d2dade55 pinctrl: sh-pfc: r8a7795: Remove bits SEL_VSP_1 and SEL_VSP_0
Cfr. Manual Errata for Rev 0.50 of the R-Car Gen3 datasheet.

This has no user-visible impact, as the definitions were not really
used.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-08 16:50:09 +01:00
Geert Uytterhoeven 00edf542a9 pinctrl: sh-pfc: r8a7795: Rename SSI_{WS,SCK}0129 to SSI_{WS,SCK}01239
Cfr. Manual Errata for Rev 0.50 of the R-Car Gen3 datasheet.

This has no user-visible impact, as the string used for configuration
("ssi01239_ctrl") was already correct.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-08 16:50:09 +01:00
Geert Uytterhoeven e01678e35f pinctrl: sh-pfc: Rename PINMUX_IPSR_DATA() to PINMUX_IPSR_GPSR()
This macro describes a pinmux configuration that needs configuration in
both a Peripheral Function Select Register (IPSR) and in a
GPIO/Peripheral Function Select Register 1 (GPSR). Reflect that in the
macro name for clarity.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2016-02-08 16:50:08 +01:00
Geert Uytterhoeven cbc983f85c pinctrl: sh-pfc: Improve pinmux macros documentation
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2016-02-08 16:47:27 +01:00
Linus Torvalds 58cf279aca GPIO bulk updates for the v4.5 kernel cycle:
Infrastructural changes:
 
 - In struct gpio_chip, rename the .dev node to .parent to better reflect
   the fact that this is not the GPIO struct device abstraction. We will
   add that soon so this would be totallt confusing.
 
 - It was noted that the driver .get_value() callbacks was
   sometimes reporting negative -ERR values to the gpiolib core, expecting
   them to be propagated to consumer gpiod_get_value() and gpio_get_value()
   calls. This was not happening, so as there was a mess of drivers
   returning negative errors and some returning "anything else than zero"
   to indicate that a line was active. As some would have bit 31 set to
   indicate "line active" it clashed with negative error codes. This is
   fixed by the largeish series clamping values in all drivers with
   !!value to [0,1] and then augmenting the code to propagate error codes
   to consumers. (Includes some ACKed patches in other subsystems.)
 
 - Add a void *data pointer to struct gpio_chip. The container_of() design
   pattern is indeed very nice, but we want to reform the struct gpio_chip
   to be a non-volative, stateless business, and keep states internal to
   the gpiolib to be able to hold on to the state when adding a proper
   userspace ABI (character device) further down the road. To achieve this,
   drivers need a handle at the internal state that is not dependent on
   their struct gpio_chip() so we add gpiochip_add_data() and
   gpiochip_get_data() following the pattern of many other subsystems.
   All the "use gpiochip data pointer" patches transforms drivers to this
   scheme.
 
 - The Generic GPIO chip header has been merged into the general
   <linux/gpio/driver.h> header, and the custom header for that removed.
   Instead of having a separate mm_gpio_chip struct for these generic
   drivers, merge that into struct gpio_chip, simplifying the code and
   removing the need for separate and confusing includes.
 
 Misc improvements:
 
 - Stabilize the way GPIOs are looked up from the ACPI legacy
   specification.
 
 - Incremental driver features for PXA, PCA953X, Lantiq (patches from the
   OpenWRT community), RCAR, Zynq, PL061, 104-idi-48
 
 New drivers:
 
 - Add a GPIO chip to the ALSA SoC AC97 driver.
 
 - Add a new Broadcom NSP SoC driver (this lands in the pinctrl dir, but
   the branch is merged here too to account for infrastructural changes).
 
 - The sx150x driver now supports the sx1502.
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Merge tag 'gpio-v4.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO updates from Linus Walleij:
 "Here is the bulk of GPIO changes for v4.5.

  Notably there are big refactorings mostly by myself, aimed at getting
  the gpio_chip into a shape that makes me believe I can proceed to
  preserve state for a proper userspace ABI (character device) that has
  already been proposed once, but resulted in the feedback that I need
  to go back and restructure stuff.  So I've been restructuring stuff.
  On the way I ran into brokenness (return code from the get_value()
  callback) and had to fix it.  Also, refactored generic GPIO to be
  simpler.

  Some of that is still waiting to trickle down from the subsystems all
  over the kernel that provide random gpio_chips, I've touched every
  single GPIO driver in the kernel now, oh man I didn't know I was
  responsible for so much...

  Apart from that we're churning along as usual.

  I took some effort to test and retest so it should merge nicely and we
  shook out a couple of bugs in -next.

  Infrastructural changes:

   - In struct gpio_chip, rename the .dev node to .parent to better
     reflect the fact that this is not the GPIO struct device
     abstraction.  We will add that soon so this would be totallt
     confusing.

   - It was noted that the driver .get_value() callbacks was sometimes
     reporting negative -ERR values to the gpiolib core, expecting them
     to be propagated to consumer gpiod_get_value() and gpio_get_value()
     calls.  This was not happening, so as there was a mess of drivers
     returning negative errors and some returning "anything else than
     zero" to indicate that a line was active.  As some would have bit
     31 set to indicate "line active" it clashed with negative error
     codes.  This is fixed by the largeish series clamping values in all
     drivers with !!value to [0,1] and then augmenting the code to
     propagate error codes to consumers.  (Includes some ACKed patches
     in other subsystems.)

   - Add a void *data pointer to struct gpio_chip.  The container_of()
     design pattern is indeed very nice, but we want to reform the
     struct gpio_chip to be a non-volative, stateless business, and keep
     states internal to the gpiolib to be able to hold on to the state
     when adding a proper userspace ABI (character device) further down
     the road.  To achieve this, drivers need a handle at the internal
     state that is not dependent on their struct gpio_chip() so we add
     gpiochip_add_data() and gpiochip_get_data() following the pattern
     of many other subsystems.  All the "use gpiochip data pointer"
     patches transforms drivers to this scheme.

   - The Generic GPIO chip header has been merged into the general
     <linux/gpio/driver.h> header, and the custom header for that
     removed.  Instead of having a separate mm_gpio_chip struct for
     these generic drivers, merge that into struct gpio_chip,
     simplifying the code and removing the need for separate and
     confusing includes.

  Misc improvements:

   - Stabilize the way GPIOs are looked up from the ACPI legacy
     specification.

   - Incremental driver features for PXA, PCA953X, Lantiq (patches from
     the OpenWRT community), RCAR, Zynq, PL061, 104-idi-48

  New drivers:

   - Add a GPIO chip to the ALSA SoC AC97 driver.

   - Add a new Broadcom NSP SoC driver (this lands in the pinctrl dir,
     but the branch is merged here too to account for infrastructural
     changes).

   - The sx150x driver now supports the sx1502"

* tag 'gpio-v4.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (220 commits)
  gpio: generic: make bgpio_pdata always visible
  gpiolib: fix chip order in gpio list
  gpio: mpc8xxx: Do not use gpiochip_get_data() in mpc8xxx_gpio_save_regs()
  gpio: mm-lantiq: Do not use gpiochip_get_data() in ltq_mm_save_regs()
  gpio: brcmstb: Allow building driver for BMIPS_GENERIC
  gpio: brcmstb: Set endian flags for big-endian MIPS
  gpio: moxart: fix build regression
  gpio: xilinx: Do not use gpiochip_get_data() in xgpio_save_regs()
  leds: pca9532: use gpiochip data pointer
  leds: tca6507: use gpiochip data pointer
  hid: cp2112: use gpiochip data pointer
  bcma: gpio: use gpiochip data pointer
  avr32: gpio: use gpiochip data pointer
  video: fbdev: via: use gpiochip data pointer
  gpio: pch: Optimize pch_gpio_get()
  Revert "pinctrl: lantiq: Implement gpio_chip.to_irq"
  pinctrl: nsp-gpio: use gpiochip data pointer
  pinctrl: vt8500-wmt: use gpiochip data pointer
  pinctrl: exynos5440: use gpiochip data pointer
  pinctrl: at91-pio4: use gpiochip data pointer
  ...
2016-01-17 12:32:01 -08:00
Linus Walleij 7cb093c4bc pinctrl: sh-pfc: use gpiochip data pointer
This makes the driver use the data pointer added to the gpio_chip
to store a pointer to the state container instead of relying on
container_of().

Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-05 14:15:04 +01:00
Julia Lawall d0b3ed4160 pinctrl: sh-pfc: add missing of_node_put
for_each_child_of_node performs an of_node_get on each iteration, so a
goto out of the loop requires an of_node_put.

A simplified version of the semantic patch that fixes this problem is as
follows (http://coccinelle.lip6.fr):

// <smpl>
@@
local idexpression n;
expression e,e1;
identifier l;
@@

 for_each_child_of_node(e1,n) {
   ...
(
   of_node_put(n);
|
   e = n
|
   return n;
|
+  of_node_put(n);
?  goto l;
)
   ...
 }
l: ... when != n
// </smpl>

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-22 13:45:53 +01:00
Linus Walleij 6077e4effd Merge branch 'sh-pfc-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel 2015-12-22 09:48:44 +01:00
Linus Walleij 0529357f10 Linux 4.4-rc6
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Merge tag 'v4.4-rc6' into devel

Linux 4.4-rc6
2015-12-21 09:36:21 +01:00
Linus Walleij 4dccc93f1e Linux 4.4-rc5
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Merge tag 'v4.4-rc5' into devel

Linux 4.4-rc5
2015-12-17 14:57:46 +01:00
Sergei Shtylyov 59508084e1 pinctrl: sh-pfc: r8a7791: add EtherAVB pin groups
Add the EtherAVB pin groups to the R8A7791 PFC driver.

Also add the copyright for all the Cogent Embedded's past work on this file.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-16 11:23:38 +01:00
Takeshi Kihara 34dc4e16af pinctrl: sh-pfc: r8a7795: Add SATA support
This patch adds SATA0 pinmux support to r8a7795 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[uli: adjusted for new PFC driver]
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-16 11:23:37 +01:00
Takeshi Kihara 20cacae155 pinctrl: sh-pfc: r8a7795: Add SDHI support
Add SDHI[0-3] pinmux support to r8a7795 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-16 11:23:37 +01:00
Geert Uytterhoeven ed66700c03 pinctrl: sh-pfc: r8a7794: Add SCIF_CLK support
Add pins, groups, and a function for SCIF_CLK, which is the external
clock source for the Baud Rate Generator for External Clock (BRG) on
(H)SCIF.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-16 11:18:16 +01:00
Geert Uytterhoeven 53ec9ccd1c pinctrl: sh-pfc: r8a7790: Add SCIF_CLK support
Add pins, groups, and a function for SCIF_CLK, which is the external
clock source for the Baud Rate Generator for External Clock (BRG) on
(H)SCIF.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-16 11:18:12 +01:00
Geert Uytterhoeven 57a9d1acd0 pinctrl: sh-pfc: r8a7779: Add SCIF_CLK support
Add pins, groups, and a function for SCIF_CLK, which is the external
clock source for the Baud Rate Generator for External Clock (BRG) on
SCIF.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-16 11:18:07 +01:00
Geert Uytterhoeven f27200f9dc pinctrl: sh-pfc: r8a7795: Add SCIF_CLK support
Add pins, groups, and a function for SCIF_CLK, which is the external
clock source for the Baud Rate Generator for External Clock (BRG) on
(H)SCIF.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-08 14:18:45 +01:00
Geert Uytterhoeven a4c8a6d2f6 pinctrl: sh-pfc: r8a7791: Add SCIF_CLK support
Add pins, groups, and a function for SCIF_CLK, which is the external
clock source for the Baud Rate Generator for External Clock (BRG) on
(H)SCIF.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-08 14:18:41 +01:00
Geert Uytterhoeven ae9335dc0c pinctrl: sh-pfc: sh73a0: Add MSIOF support
Add pins, groups, and a function for the 4 MSIOF devices.

Note that the pin function name of MSIOF3 is named BBIF1.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-08 14:18:41 +01:00
Geert Uytterhoeven b363d81972 pinctrl: sh-pfc: sh73a0: Correct comment for LCD2 data pins
The 12 data pins of LCD2 are numbered 0..11, not 0..12.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-08 14:18:40 +01:00
Geert Uytterhoeven 944e798890 pinctrl: sh-pfc: r8a7740: Correct comment for LCD1 data pins
The 12 data pins of LCD1 are numbered 0..11, not 0..12.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-08 14:18:40 +01:00
Geert Uytterhoeven 188289ad90 pinctrl: sh-pfc: emev2: Correct comment for CFI data pins
The 8 data pins of the Compact Flash Interface are numbered 0..7, not
0..8.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-08 14:18:39 +01:00
Geert Uytterhoeven e7419b81ff pinctrl: sh-pfc: r8a7795: Add MSIOF pins, groups, and functions
Extracted from a big patch by Takeshi Kihara.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Correct MSIOF3 TXD_A/RXD_A pins]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-08 14:18:35 +01:00
Geert Uytterhoeven 8d4df57378 pinctrl: sh-pfc: r8a7795: Add pinmux data for single-function pins
Pins that (1) can be configured as either GPIO or a single peripheral
function, and (2) that don't need configuration in an IPSRx register,
should still be listed in the pinmux_data[] array.

Else selecting the peripheral function fails with e.g.:

    sh-pfc e6060000.pfc: cannot locate data/mark enum_id for mark 1281

(mark 1281 is MSIOF0_SCK_MARK).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-08 14:18:29 +01:00
Geert Uytterhoeven 8795841bd6 pinctrl: sh-pfc: sh7734: Use PINMUX_SINGLE() instead of raw PINMUX_DATA()
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-08 14:10:52 +01:00
Geert Uytterhoeven ab2d12cbe9 pinctrl: sh-pfc: r8a7779: Use PINMUX_SINGLE() instead of raw PINMUX_DATA()
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-08 14:10:51 +01:00
Geert Uytterhoeven 79e72c535c pinctrl: sh-pfc: r8a7778: Use PINMUX_SINGLE() instead of raw PINMUX_DATA()
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-08 14:10:50 +01:00
Geert Uytterhoeven d81d8717c6 pinctrl: sh-pfc: emev2: Use PINMUX_SINGLE() instead of raw PINMUX_DATA()
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-08 14:10:49 +01:00
Geert Uytterhoeven 48111b79b7 pinctrl: sh-pfc: sh7734: Add missing cfg macro parameter to fix build
When building for SH7734:

    drivers/pinctrl/sh-pfc/pfc-sh7734.c:586:1: error: macro "_GP_DATA" passed 5 arguments, but takes just 4
    drivers/pinctrl/sh-pfc/pfc-sh7734.c:586:2: error: '_GP_DATA' undeclared here (not in a function)
    drivers/pinctrl/sh-pfc/pfc-sh7734.c:586:1: error: macro "_GP_DATA" passed 5 arguments, but takes just 4
    drivers/pinctrl/sh-pfc/pfc-sh7734.c:586:1: error: macro "_GP_DATA" passed 5 arguments, but takes just 4
    ...
    drivers/pinctrl/sh-pfc/pfc-sh7734.c:2389:1: error: macro "_GP_INOUTSEL" passed 5 arguments, but takes just 4
    drivers/pinctrl/sh-pfc/pfc-sh7734.c:2389:53: error: '_GP_INOUTSEL' undeclared here (not in a function)
    drivers/pinctrl/sh-pfc/pfc-sh7734.c:2389:2: warning: initialization makes integer from pointer without a cast [enabled by default]
    drivers/pinctrl/sh-pfc/pfc-sh7734.c:2389:2: warning: (near initialization for '(anonymous)[0]') [enabled by default]
    ...
    drivers/pinctrl/sh-pfc/pfc-sh7734.c:2416:1: error: macro "_GP_INDT" passed 5 arguments, but takes just 4
    drivers/pinctrl/sh-pfc/pfc-sh7734.c:2416:47: error: '_GP_INDT' undeclared here (not in a function)
    drivers/pinctrl/sh-pfc/pfc-sh7734.c:2416:2: warning: initialization makes integer from pointer without a cast [enabled by default]
    drivers/pinctrl/sh-pfc/pfc-sh7734.c:2416:2: warning: (near initialization for '(anonymous)[0]') [enabled by default]
    ...

Add the missing "cfg" macro parameters to the sh7734-specific
_GP_DATA(), _GP_INOUTSEL(), and _GP_INDT() macros to fix this.

Fixes: 22768fc60a ("pinctrl: sh-pfc: Add macros defining GP ports with config flags")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-01 11:13:04 +01:00
Kuninori Morimoto 2d24fe675a pinctrl: sh-pfc: Share/reuse same PORT_GP_x() macros
Many SoC needs each PORT_GP_x() macros, but we can share/reuse
same one.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-11-30 13:41:35 +01:00
Geert Uytterhoeven a56069c46c pinctrl: sh-pfc: r8a7795: Add HSCIF pins, groups, and functions
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-30 13:41:34 +01:00
Geert Uytterhoeven fd1aa743b0 pinctrl: sh-pfc: r8a7795: Rename SEL_SCIF to SEL_SATA
Cfr. Manual Errata for Rev 0.50 of the R-Car Gen3 datasheet.

This has no user-visible impact.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-30 13:41:34 +01:00
Geert Uytterhoeven b8856085c3 pinctrl: sh-pfc: r8a7795: Make PORT_GP_x() macros consistent
On r8a7795, PORT_GP_x() is a macro for defining GPIOs 0..x.
In all other sh-pfc code, PORT_GP_x() is a macro for defining GPIOs
0..(x-1).

Make the r8a7795 macro definitions consistent with the rest of the
sh-pfc codebase.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2015-11-30 13:41:33 +01:00
Geert Uytterhoeven 61a483ff80 pinctrl: sh-pfc: r8a7794: Use PINMUX_SINGLE() instead of raw PINMUX_DATA()
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2015-11-30 13:41:32 +01:00
Geert Uytterhoeven bc3341ddae pinctrl: sh-pfc: r8a7791: Use PINMUX_SINGLE() instead of raw PINMUX_DATA()
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2015-11-30 13:41:32 +01:00
Geert Uytterhoeven 01af9ecbd7 pinctrl: sh-pfc: r8a7790: Use PINMUX_SINGLE() instead of raw PINMUX_DATA()
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2015-11-30 13:41:31 +01:00
Geert Uytterhoeven dcd803bebc pinctrl: sh-pfc: Add PINMUX_SINGLE()
Add a macro to describe a pinmux configuration for a single-function
pin.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2015-11-30 13:41:31 +01:00
Linus Walleij 58383c7842 gpio: change member .dev to .parent
The name .dev in a struct is normally reserved for a struct device
that is let us say a superclass to the thing described by the struct.
struct gpio_chip stands out by confusingly using a struct device *dev
to point to the parent device (such as a platform_device) that
represents the hardware. As we want to give gpio_chip:s real devices,
this is not working. We need to rename this member to parent.

This was done by two coccinelle scripts, I guess it is possible to
combine them into one, but I don't know such stuff. They look like
this:

@@
struct gpio_chip *var;
@@
-var->dev
+var->parent

and:

@@
struct gpio_chip var;
@@
-var.dev
+var.parent

and:

@@
struct bgpio_chip *var;
@@
-var->gc.dev
+var->gc.parent

Plus a few instances of bgpio that I couldn't figure out how
to teach Coccinelle to rewrite.

This patch hits all over the place, but I *strongly* prefer this
solution to any piecemal approaches that just exercise patch
mechanics all over the place. It mainly hits drivers/gpio and
drivers/pinctrl which is my own backyard anyway.

Cc: Haavard Skinnemoen <hskinnemoen@gmail.com>
Cc: Rafał Miłecki <zajec5@gmail.com>
Cc: Richard Purdie <rpurdie@rpsys.net>
Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Cc: Alek Du <alek.du@intel.com>
Cc: Jaroslav Kysela <perex@perex.cz>
Cc: Takashi Iwai <tiwai@suse.com>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Jiri Kosina <jkosina@suse.cz>
Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no>
Acked-by: Jacek Anaszewski <j.anaszewski@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-19 09:24:35 +01:00
Geert Uytterhoeven 660c40bd98 pinctrl: sh-pfc: Remove obsolete r8a7778 platform_device_id entry
Since the removal of the r8a7778 legacy SoC code in commit
4baadb9e05 ("ARM: shmobile: r8a7778: remove obsolete setup code"),
r8a7778 is only supported in generic DT-only ARM multi-platform builds.
The driver doesn't need to match platform devices by name anymore, hence
remove the corresponding platform_device_id entry.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-20 16:11:27 +02:00
Geert Uytterhoeven 5eb6fc210e pinctrl: sh-pfc: Remove obsolete r8a7779 platform_device_id entry
Since the removal of the r8a7779 legacy SoC code in commit
c99cd90d98 ("ARM: shmobile: r8a7779: Remove legacy SoC code"),
r8a7779 is only supported in generic DT-only ARM multi-platform builds.
The driver doesn't need to match platform devices by name anymore, hence
remove the corresponding platform_device_id entry.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-20 16:11:26 +02:00
Geert Uytterhoeven 69af775a18 pinctrl: sh-pfc: Stop including <linux/platform_data/gpio-rcar.h>
This header file will be removed soon.

Copy the helper macro RCAR_GP_PIN(), which is used by the pinctrl
drivers only, to sh_pfc.h, and drop the #include.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-20 16:03:40 +02:00
Geert Uytterhoeven b8b47d678a pinctrl: sh-pfc: Rename .gpio_data[] to .pinmux_data[]
The sh_pfc_soc_info.gpio_data[] array contains not only GPIO data, but
also various other pinmux-related data (functions and marks).
Every single driver already calls its local array pinmux_data[].
Hence rename the sh_pfc_soc_info member to "pinmux_data".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2015-10-20 16:03:30 +02:00
Ulrich Hecht ae7465a097 pinctrl: sh-pfc: r8a7778: Add bias (pull-up) pinconf support
On this SoC there is no simple mapping of GP pins to pull-up register
bits, so we need a table.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-20 16:03:28 +02:00
Ulrich Hecht 22768fc60a pinctrl: sh-pfc: Add macros defining GP ports with config flags
PORT_GP_CFG_1 and PORT_GP_CFG_32 work like their non-CFG counterparts
but accept an extra argument with config flags.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-20 16:03:26 +02:00
Koji Matsuoka 0f7711aa30 pinctrl: sh-pfc: r8a7794: Add VIN pin groups
Add VIN0/1 pin groups to R8A7794 PFC driver.

Sergei:  rebased, renamed, added changelog, gathered 12  VIN1 data pins into
a single pin group, added "vin1_data10" pin group, used 'union vin_data' and
VIN_DATA_PIN_GROUP() macro to describe VIN1 pins, reversed the order of  the
VIN1 pin groups, removed unneeded empty lines, fixed  VIN1 separator comment.

Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-20 16:03:16 +02:00
Sergei Shtylyov 423caa5253 pinctrl: sh-pfc: r8a779[01]: Move 'union vin_data' to shared header file
R8A7790/1 PFC  drivers use almost identical  'union vin_data' and completely
identical VIN_DATA_PIN_GROUP() macro; we thus can  move them into the shared
header file...

Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-20 16:03:10 +02:00
Takeshi Kihara 819fd4bfcc pinctrl: sh-pfc: r8a7795: add EtherAVB support
This patch adds EthernetAVB

Based on a much lager patch by Takeshi Kihara which was
originally posted by Kuninori Morimoto.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[horms: extracted from a larger patch;
        corrected swapped {MATCH,CAPTURE_A} pins]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02 09:54:41 +02:00
Kuninori Morimoto 9b132ba3e3 pinctrl: sh-pfc: r8a7795: add Audio SSI pin support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02 09:54:41 +02:00
Kuninori Morimoto c33a7fe399 pinctrl: sh-pfc: r8a7795: add Audio clock pin support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02 09:54:40 +02:00
Kuninori Morimoto 2544ef7230 pinctrl: sh-pfc: r8a7795: add I2C pin support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02 09:54:40 +02:00
Geert Uytterhoeven ff8459a506 pinctrl: sh-pfc: r8a7795: add SCIFx support
This patch adds SCIF0/1/2/3/4/5

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[Morimoto-san: Updated]
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02 09:54:39 +02:00
Takeshi Kihara 0b0ffc96db pinctrl: sh-pfc: Initial R8A7795 PFC support
Add PFC base support for the R8A7795 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[Morimoto-san: updated]
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02 09:54:39 +02:00
Kuninori Morimoto 5451d09259 pinctrl: sh-pfc: remove unused PINMUX_IPSR_MODSEL_DATA()
Now, all PINMUX_IPSR_MODSEL_DATA() are replased to PINMUX_IPSR_MSEL()
Let's remove unused PINMUX_IPSR_MODSEL_DATA()

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02 09:54:38 +02:00
Kuninori Morimoto 759151401c pinctrl: sh-pfc: r8a7779: use PINMUX_IPSR_MSEL()
Now, PINMUX_IPSR_MSEL() and PINMUX_IPSR_MODSEL_DATA() are same.

Current PFC driver is very difficult to read, because macro names are
using different length.

	PINMUX_IPSR_NOGP(ispr, ...)
	PINMUX_IPSR_DATA(ipsr, ...)
	PINMUX_IPSR_NOGM(ispr, ...)
	PINMUX_IPSR_NOFN(ipsr, ...)
	PINMUX_IPSR_MSEL(ipsr, ...)
	PINMUX_IPSR_MODSEL_DATA(ipsr, ...)

It can be readable if we can use PINMUX_IPSR_MSEL() instead
of PINMUX_IPSR_MODSEL_DATA()

	PINMUX_IPSR_NOGP(ispr, ...)
	PINMUX_IPSR_DATA(ipsr, ...)
	PINMUX_IPSR_NOGM(ispr, ...)
	PINMUX_IPSR_NOFN(ipsr, ...)
	PINMUX_IPSR_MSEL(ipsr, ...)

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02 09:54:38 +02:00
Kuninori Morimoto af5132dd12 pinctrl: sh-pfc: r8a7790: use PINMUX_IPSR_MSEL()
Now, PINMUX_IPSR_MSEL() and PINMUX_IPSR_MODSEL_DATA() are same.

Current PFC driver is very difficult to read, because macro names are
using different length.

	PINMUX_IPSR_NOGP(ispr, ...)
	PINMUX_IPSR_DATA(ipsr, ...)
	PINMUX_IPSR_NOGM(ispr, ...)
	PINMUX_IPSR_NOFN(ipsr, ...)
	PINMUX_IPSR_MSEL(ipsr, ...)
	PINMUX_IPSR_MODSEL_DATA(ipsr, ...)

It can be readable if we can use PINMUX_IPSR_MSEL() instead
of PINMUX_IPSR_MODSEL_DATA()

	PINMUX_IPSR_NOGP(ispr, ...)
	PINMUX_IPSR_DATA(ipsr, ...)
	PINMUX_IPSR_NOGM(ispr, ...)
	PINMUX_IPSR_NOFN(ipsr, ...)
	PINMUX_IPSR_MSEL(ipsr, ...)

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02 09:54:37 +02:00
Kuninori Morimoto 13ce3c39d0 pinctrl: sh-pfc: r8a7791: use PINMUX_IPSR_MSEL()
Now, PINMUX_IPSR_MSEL() and PINMUX_IPSR_MODSEL_DATA() are same.

Current PFC driver is very difficult to read, because macro names are
using different length.

	PINMUX_IPSR_NOGP(ispr, ...)
	PINMUX_IPSR_DATA(ipsr, ...)
	PINMUX_IPSR_NOGM(ispr, ...)
	PINMUX_IPSR_NOFN(ipsr, ...)
	PINMUX_IPSR_MSEL(ipsr, ...)
	PINMUX_IPSR_MODSEL_DATA(ipsr, ...)

It can be readable if we can use PINMUX_IPSR_MSEL() instead
of PINMUX_IPSR_MODSEL_DATA()

	PINMUX_IPSR_NOGP(ispr, ...)
	PINMUX_IPSR_DATA(ipsr, ...)
	PINMUX_IPSR_NOGM(ispr, ...)
	PINMUX_IPSR_NOFN(ipsr, ...)
	PINMUX_IPSR_MSEL(ipsr, ...)

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02 09:54:37 +02:00
Kuninori Morimoto adedb87fb6 pinctrl: sh-pfc: r8a7794: use PINMUX_IPSR_MSEL()
Now, PINMUX_IPSR_MSEL() and PINMUX_IPSR_MODSEL_DATA() are same.

Current PFC driver is very difficult to read, because macro names are
using different length.

	PINMUX_IPSR_NOGP(ispr, ...)
	PINMUX_IPSR_DATA(ipsr, ...)
	PINMUX_IPSR_NOGM(ispr, ...)
	PINMUX_IPSR_NOFN(ipsr, ...)
	PINMUX_IPSR_MSEL(ipsr, ...)
	PINMUX_IPSR_MODSEL_DATA(ipsr, ...)

It can be readable if we can use PINMUX_IPSR_MSEL() instead
of PINMUX_IPSR_MODSEL_DATA()

	PINMUX_IPSR_NOGP(ispr, ...)
	PINMUX_IPSR_DATA(ipsr, ...)
	PINMUX_IPSR_NOGM(ispr, ...)
	PINMUX_IPSR_NOFN(ipsr, ...)
	PINMUX_IPSR_MSEL(ipsr, ...)

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02 09:54:36 +02:00
Kuninori Morimoto 3d8c120be3 pinctrl: sh-pfc: sh7734: use PINMUX_IPSR_MSEL()
Now, PINMUX_IPSR_MSEL() and PINMUX_IPSR_MODSEL_DATA() are same.

Current PFC driver is very difficult to read, because macro names are
using different length.

	PINMUX_IPSR_NOGP(ispr, ...)
	PINMUX_IPSR_DATA(ipsr, ...)
	PINMUX_IPSR_NOGM(ispr, ...)
	PINMUX_IPSR_NOFN(ipsr, ...)
	PINMUX_IPSR_MSEL(ipsr, ...)
	PINMUX_IPSR_MODSEL_DATA(ipsr, ...)

It can be readable if we can use PINMUX_IPSR_MSEL() instead
of PINMUX_IPSR_MODSEL_DATA()

	PINMUX_IPSR_NOGP(ispr, ...)
	PINMUX_IPSR_DATA(ipsr, ...)
	PINMUX_IPSR_NOGM(ispr, ...)
	PINMUX_IPSR_NOFN(ipsr, ...)
	PINMUX_IPSR_MSEL(ipsr, ...)

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02 09:54:36 +02:00
Kuninori Morimoto 2b67bccb47 pinctrl: sh-pfc: modify PINMUX_IPSR_MSEL() macro order
The difference between PINMUX_IPSR_MSEL() and PINMUX_IPSR_MODSEL_DATA()
are FN_xxx order, and PINMUX_IPSR_MSEL() is used only from r8a7778.
Now it r8a7778 works correctly with PINMUX_IPSR_MODSEL_DATA() order.
This means we can merge PINMUX_IPSR_MSEL() and PINMUX_IPSR_MODSEL_DATA().

Current PFC driver is very difficult to read, because macro names are
using different length. Especially PINMUX_IPSR_MODSEL_DATA() is well
used macro

	PINMUX_IPSR_NOGP(ispr, ...)
	PINMUX_IPSR_DATA(ipsr, ...)
	PINMUX_IPSR_NOGM(ispr, ...)
	PINMUX_IPSR_NOFN(ipsr, ...)
	PINMUX_IPSR_MSEL(ipsr, ...)
	PINMUX_IPSR_MODSEL_DATA(ipsr, ...)

It can be readable if we can merge
PINMUX_IPSR_MSEL() and PINMUX_IPSR_MODSEL_DATA()

	PINMUX_IPSR_NOGP(ispr, ...)
	PINMUX_IPSR_DATA(ipsr, ...)
	PINMUX_IPSR_NOGM(ispr, ...)
	PINMUX_IPSR_NOFN(ipsr, ...)
	PINMUX_IPSR_MSEL(ipsr, ...)

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02 09:54:35 +02:00
Laurent Pinchart 4adeabd042 pinctrl: sh-pfc: Remove hardcoded IRQ numbers
Now that all ARM-based Renesas SoCs use multiplatform kernels only the
hardcoded IRQ numbers can be dropped as they're dynamically allocated.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02 09:54:35 +02:00
Geert Uytterhoeven 90d066130f pinctrl: sh-pfc: Get rid of CONFIG_ARCH_SHMOBILE_LEGACY
Shmobile is all multiplatform these days, so get rid of the reference to
CONFIG_ARCH_SHMOBILE_LEGACY.

Move the legacy code to do the non-DT mapping between GPIOs and pins
inside the existing #ifdef CONFIG_SUPERH section.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02 09:54:34 +02:00
Geert Uytterhoeven 9e21461453 pinctrl: sh-pfc: r8a7791/r8a7793: Correct SCIFB1_B SCK MOD_SEL value
When using serial port SCIFB1_B, transmit works, but nothing is
received.

Receive fails because the SCIFB1_SCK_B settings configure the wrong
value for the sel_scifb1 field in the Module Select Register (MOD_SEL),
due to an ambiguity in the R-Car M2-W and M2-N datasheets.

Tested on r8a7791/koelsch using pins 53 (TXD) and 72 (RXD) on EXIO
Connector A.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02 09:54:34 +02:00
Geert Uytterhoeven 48a7b99d75 pinctrl: sh-pfc: r8a7794: Remove bogus SCIF0 SCK pin data
SCIF0 on R-Car E2 does not have an SCK pin.

"SCIF_CLK" is the (H)SCIF baud rate generation clock pin, which is not
yet supported.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02 09:54:33 +02:00
Geert Uytterhoeven 56f891b46d pinctrl: sh-pfc: Confine legacy function GPIOs to SH
Legacy function GPIOs are no longer used on ARM since commit
a27c5cd1a0 ("sh-pfc: sh73a0: Remove function GPIOs").
Extract its setup code into a separate function, and make all function
GPIO related code and data depend on CONFIG_SUPERH.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2015-10-02 09:54:33 +02:00
Geert Uytterhoeven 57106e5ca5 pinctrl: sh-pfc: Remove empty gpio_function_free()
gpio_chip.free() is optional, and can just be left unimplemented.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02 09:54:32 +02:00
Geert Uytterhoeven 18fab3995e pinctrl: sh-pfc: Stop calling gpiochip_add_pin_range() on DT platforms
On platforms where the PFC/GPIO controller is instantiated from DT, the
mapping between GPIOs and pins is set up using the "gpio-ranges"
property in DT.

Hence stop setting up the mapping from C code on DT platforms.
This code is still used for SH or ARM-legacy platforms.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2015-10-02 09:53:16 +02:00
Linus Torvalds 88a99886c2 This is the bulk of pin control changes for the v4.3 development
cycle
 
 Core changes:
 
 - It is possible configure groups in debugfs.
 
 - Consolidation of chained IRQ handler install/remove replacing
   all call sites where irq_set_handler_data() and
   irq_set_chained_handler() were done in succession with a
   combined call to irq_set_chained_handler_and_data(). This
   series was created by Thomas Gleixner after the problem was
   observed by Russell King.
 
 - Tglx also made another series of patches switching
   __irq_set_handler_locked() for irq_set_handler_locked() which
   is way cleaner.
 
 - Tglx also wrote a good bunch of patches to make use of
   irq_desc_get_xxx() accessors and avoid looking up irq_descs
   from IRQ numbers. The goal is to get rid of the irq number
   from the handlers in the IRQ flow which is nice.
 
 Driver feature enhancements:
 
 - Power management support for the SiRF SoC Atlas 7.
 
 - Power down support for the Qualcomm driver.
 
 - Intel Cherryview and Baytrail: switch drivers to use raw
   spinlocks in IRQ handlers to play nice with the realtime
   patch set.
 
 - Rework and new modes handling for Qualcomm SPMI-MPP.
 
 - Pinconf power source config for SH PFC.
 
 New drivers and subdrivers:
 
 - A new driver for Conexant Digicolor CX92755.
 
 - A new driver for UniPhier PH1-LD4, PH1-Pro4, PH1-sLD8,
   PH1-Pro5, ProXtream2 and PH1-LD6b SoC pin control support.
 
 - Reverse-egineered the S/PDIF settings for the Allwinner
   sun4i driver.
 
 - Support for Qualcomm Technologies QDF2xxx ARM64 SoCs
 
 - A new Freescale i.mx6ul subdriver.
 
 Cleanup:
 
 - Remove platform data support in a number of SH PFC
   subdrivers.
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Merge tag 'pinctrl-v4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v4.3 development
  cycle.

  Like with GPIO it's a lot of stuff.  If my subsystems are any sign of
  the overall tempo of the kernel v4.3 will be a gigantic diff.

[ It looks like 4.3 is calmer than 4.2 in most other subsystems, but
  we'll see - Linus ]

  Core changes:

   - It is possible configure groups in debugfs.

   - Consolidation of chained IRQ handler install/remove replacing all
     call sites where irq_set_handler_data() and
     irq_set_chained_handler() were done in succession with a combined
     call to irq_set_chained_handler_and_data().  This series was
     created by Thomas Gleixner after the problem was observed by
     Russell King.

   - Tglx also made another series of patches switching
     __irq_set_handler_locked() for irq_set_handler_locked() which is
     way cleaner.

   - Tglx also wrote a good bunch of patches to make use of
     irq_desc_get_xxx() accessors and avoid looking up irq_descs from
     IRQ numbers.  The goal is to get rid of the irq number from the
     handlers in the IRQ flow which is nice.

  Driver feature enhancements:

   - Power management support for the SiRF SoC Atlas 7.

   - Power down support for the Qualcomm driver.

   - Intel Cherryview and Baytrail: switch drivers to use raw spinlocks
     in IRQ handlers to play nice with the realtime patch set.

   - Rework and new modes handling for Qualcomm SPMI-MPP.

   - Pinconf power source config for SH PFC.

  New drivers and subdrivers:

   - A new driver for Conexant Digicolor CX92755.

   - A new driver for UniPhier PH1-LD4, PH1-Pro4, PH1-sLD8, PH1-Pro5,
     ProXtream2 and PH1-LD6b SoC pin control support.

   - Reverse-egineered the S/PDIF settings for the Allwinner sun4i
     driver.

   - Support for Qualcomm Technologies QDF2xxx ARM64 SoCs

   - A new Freescale i.mx6ul subdriver.

  Cleanup:

   - Remove platform data support in a number of SH PFC subdrivers"

* tag 'pinctrl-v4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (95 commits)
  pinctrl: at91: fix null pointer dereference
  pinctrl: mediatek: Implement wake handler and suspend resume
  pinctrl: mediatek: Fix multiple registration issue.
  pinctrl: sh-pfc: r8a7794: add USB pin groups
  pinctrl: at91: Use generic irq_{request,release}_resources()
  pinctrl: cherryview: Use raw_spinlock for locking
  pinctrl: baytrail: Use raw_spinlock for locking
  pinctrl: imx6ul: Remove .owner field
  pinctrl: zynq: Fix typos in smc0_nand_grp and smc0_nor_grp
  pinctrl: sh-pfc: Implement pinconf power-source param for voltage switching
  clk: rockchip: add pclk_pd_pmu to the list of rk3288 critical clocks
  pinctrl: sun4i: add spdif to pin description.
  pinctrl: atlas7: clear ugly branch statements for pull and drivestrength
  pinctrl: baytrail: Serialize all register access
  pinctrl: baytrail: Drop FSF mailing address
  pinctrl: rockchip: only enable gpio clock when it setting
  pinctrl/mediatek: fix spelling mistake in dev_err error message
  pinctrl: cherryview: Serialize all register access
  pinctrl: UniPhier: PH1-Pro5: add I2C ch6 pin-mux setting
  pinctrl: nomadik: reflect current input value
  ...
2015-09-04 10:22:09 -07:00
Shinobu Uehara 580a7ee933 pinctrl: sh-pfc: r8a7794: add USB pin groups
Add USB0/1 pin groups to R8A7794 PFC driver.

Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
[Sergei: rebased, renamed, added changelog.]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-26 13:40:25 +02:00
Ben Hutchings 5b9eaa5659 pinctrl: sh-pfc: Implement pinconf power-source param for voltage switching
The pfc in the R8A7790 (and probably others in the R-Car gen 2 family)
supports switching SDHI signals between 3.3V and 1.8V nominal voltage,
and the SD driver should do that when switching to and from UHS modes.

Add a flag for pins that have configurable I/O voltage and SoC
operations to get and set the nominal voltage.  Implement the pinconf
power-source parameter using these operations.

Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-24 10:44:54 +02:00
Sergei Shtylyov 61bb3aef92 sh-pfc: fix sparse GPIOs for R-Car SoCs
The PFC driver causes the kernel to hang on the R-Car gen2 SoC based  boards
when the CPU_ALL_PORT() macro is fixed to reflect the reality, i.e. when the
GPIO space becomes actually sparse.  This happens because the _GP_GPIO() macro
includes  an indexed initializer which causes the "holes" (array entries filled
with all 0s) between the groups  of the existing GPIOs; and the driver can't
cope with that.  There seems to  be no reason to use the indexed initializer,
so we can remove the index specifier and so avoid the "holes".

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-20 11:01:52 +02:00
Geert Uytterhoeven 03c42c3e52 pinctrl: sh-pfc: Remove obsolete r8a7740 platform_device_id entry
Since the removal of the r8a7740 legacy SoC code in commit
44d88c754e ("ARM: shmobile: Remove legacy SoC code for R-Mobile
A1"), r8a7740 is only supported in generic DT-only ARM multi-platform
builds.  The driver doesn't need to match platform devices by name
anymore, hence remove the corresponding platform_device_id entry.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-16 11:40:10 +02:00
Geert Uytterhoeven d009fa3b2b pinctrl: sh-pfc: r8a7740: Remove obsolete multi-platform check
Since the removal of the r8a7740 legacy SoC code in commit
44d88c754e ("ARM: shmobile: Remove legacy SoC code for R-Mobile
A1"), r8a7740 is only supported in generic ARM multi-platform builds.
Hence CONFIG_ARCH_MULTIPLATFORM is always set, and the check can be
removed.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-16 11:39:17 +02:00
Geert Uytterhoeven 39ad6ff12c pinctrl: sh-pfc: Remove obsolete sh73a0 platform_device_id entry
Since the removal of the sh73a0 legacy SoC code in commit
9a9863987b ("ARM: shmobile: Remove legacy SoC code for SH-Mobile
AG5"), sh73a0 is only supported in generic DT-only ARM multi-platform
builds.  The driver doesn't need to match platform devices by name
anymore, hence remove the corresponding platform_device_id entry.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-16 11:38:28 +02:00
Geert Uytterhoeven 9f21c67da6 pinctrl: sh-pfc: sh73a0: Remove obsolete multi-platform check
Since the removal of the sh73a0 legacy SoC code in commit
9a9863987b ("ARM: shmobile: Remove legacy SoC code for SH-Mobile
AG5"), sh73a0 is only supported in generic ARM multi-platform builds.
Hence CONFIG_ARCH_MULTIPLATFORM is always set, and the check can be
removed.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-16 11:37:38 +02:00
Geert Uytterhoeven c7977ec4a3 pinctrl: sh-pfc: Convert to platform_get_*()
If the pin function controller (which can be a GPIO controller) is
instantiated before the interrupt controllers, due to the ordering in
the DTS, the irq domains for the interrupt controllers referenced by its
"interrupts-extended" property cannot be found yet:

    irq: no irq domain found for /interrupt-controller@e61c0000 !

As the sh-pfc driver accesses the platform device's resources directly,
it cannot find the (optional) IRQ resources, and thinks no interrupts
are available. This may lead to failures later, when GPIOs are used as
interupts:

    gpio-keys keyboard: Unable to claim irq 0; error -22
    gpio-keys: probe of keyboard failed with error -22

To fix this, add support for deferred probing to sh-pfc, by converting
the driver from direct platform device resource access to using the
platform_get_resource() and platform_get_irq() helpers.

Note that while this fixes the root cause worked around by commit
e4ba0a9bdd ("ARM: shmobile: r8a73a4: Move pfc node to work around
probe ordering bug"), I strongly recommend against reverting the
workaround now, as this would lead to lots of probe deferrals in drivers
relying on pinctrl. This may be reconsidered once the DT code starts
taking into account phandle dependencies during device instantation.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-16 11:37:11 +02:00
Laurent Pinchart 16ccaf5bb5 pinctrl: sh-pfc: Accept standard function, pins and groups properties
The "function", "pins" and "groups" pinmux and pinctrl properties have
been standardized. Support them in addition to the custom "renesas,*"
properties. New-style and old-style properties can't be mixed in DT.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-16 11:36:52 +02:00
Laurent Pinchart 441f77dcf8 sh-pfc: r8a7791: remove non-existing GPIO pins
GPIO banks 1 and 7 are missing pins 26 to 31. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-16 09:39:02 +02:00
Laurent Pinchart b5599df20f sh-pfc: r8a7790: remove non-existing GPIO pins
GPIO banks 1 and 2 are missing pins 30 and 31. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-16 09:39:01 +02:00
Shinobu Uehara 7ac91bda80 pinctrl: sh-pfc: r8a7794: add SDHI pin groups
Add SDHI0/1/2 pin groups to R8A7794 PFC driver.

Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
[Sergei: renamed SD data pins to match the driver, rebased, renamed, added
changelog.]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-16 10:55:09 +02:00
Shinobu Uehara f1f74b640c pinctrl: sh-pfc: r8a7794: add MMCIF pin groups
Add MMCIF pin groups to R8A7794 PFC driver.

Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
[Sergei: rebased, renamed, added changelog.]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-16 10:54:01 +02:00
Hisashi Nakamura 43c4436e2f pinctrl: sh-pfc: add R8A7794 PFC support
Add PFC support for  the  R8A7794 SoC  including pin groups for some
on-chip devices such as ETH, I2C, INTC, MSIOF, QSPI, [H]SCIF...

Sergei: squashed together several patches, fixed the MLB_CLK typo,
added IRQ4.. IRQ9 pin groups, fixed IRQn comments, added ETH B pin
group names, removed stray new line and fixed typos in the  comments
in the pinmux_config_regs[] initializer, removed the platform device
ID, took into account limited number of signals in the GPIO1/5/6
controllers, added reasonable and removed unreasonable
copyrights, modified the bindings document, renamed, added changelog.

Changes in version 5:
- resolved rejects, refreshed the patch;
- added Laurent Pinchart's ACK.

Changes in version 4:
- reused the PORT_GP_26() macro to #define PORT_GP_28().

Changes in version 3:
- removed the platform device ID;
- added PORT_GP_26() and PORT_GP_28() macros, used them for GPIO1/5/6 in the
  CPU_ALL_PORT() macro.

Changes in version 2:
- rebased the patch.

Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-16 10:53:20 +02:00
Masahiro Yamada 323de9efdf pinctrl: make pinctrl_register() return proper error code
Currently, pinctrl_register() just returns NULL on error, so the
callers can not know the exact reason of the failure.

Some of the pinctrl drivers return -EINVAL, some -ENODEV, and some
-ENOMEM on error of pinctrl_register(), although the error code
might be different from the real cause of the error.

This commit reworks pinctrl_register() to return the appropriate
error code and modifies all of the pinctrl drivers to use IS_ERR()
for the error checking and PTR_ERR() for getting the error code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Lee Jones <lee@kernel.org>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Ray Jui <rjui@broadcom.com>
Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Hongzhou Yang <hongzhou.yang@mediatek.com>
Acked-by: Wei Chen <Wei.Chen@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 14:49:52 +02:00
Geert Uytterhoeven 5b441eba3a pinctrl: Spelling s/reseved/reserved/
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-01 15:49:53 +02:00
Yoshihiro Shimoda f9784298e2 pinctrl: sh-pfc: r8a7791: Add PWM pin groups and functions
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-19 16:01:50 +02:00
Yoshihiro Shimoda 5c89c15b74 pinctrl: sh-pfc: r8a7790: Add PWM pin groups and functions
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-19 16:01:25 +02:00
Geert Uytterhoeven e8e36d2f18 pinctrl: sh-pfc: r8a73a4: Remove obsolete multi-platform check
As of commit 9d07d414d4 ("ARM: shmobile: r8a73a4: ape6evm: Remove
legacy platform"), r8a73a4 is only supported in generic ARM
multi-platform builds.  Hence CONFIG_ARCH_MULTIPLATFORM is always set,
and the check can be removed.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-12 13:17:44 +02:00
Ulrich Hecht cb0ba73d09 pinctrl: sh-pfc: Enable building of r8a7793 PFC support
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-12 13:17:43 +02:00
Ulrich Hecht 19e1e98fbf pinctrl: sh-pfc: Add r8a7793 support
Regarding pin control, r8a7791 and r8a7793 are identical, so it is
sufficient to add an sh_pfc_soc_info structure to enable r8a7793 support.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-12 13:17:42 +02:00
Geert Uytterhoeven 992161965f pinctrl: sh-pfc: r8a7740: Fix typo SCIFAB in comment
The last serial port is called "SCIFB", not "SCIFAB".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-12 13:17:42 +02:00
Geert Uytterhoeven 592be8d3c1 pinctrl: sh-pfc: Remove r8a73a4 platform_device_id entry
As of commit 9d07d414d4 ("ARM: shmobile: r8a73a4: ape6evm: Remove
legacy platform"), r8a73a4 is only supported in generic DT-only ARM
multi-platform builds.  The driver doesn't need to match platform
devices by name anymore, hence remove the corresponding
platform_device_id entry.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-12 13:17:40 +02:00
Sergei Shtylyov 19ef697d1e sh-pfc: r8a7790: add EtherAVB pin groups
Add EtherAVB pin groups to R8A7790 PFC driver.

Based on original patch by Mitsuhiro Kimura <mitsuhiro.kimura.kc@renesas.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-04-07 15:21:26 +02:00
Geert Uytterhoeven 9895afae1b pinctrl: sh-pfc: Remove r8a7790 platform_device_id entry
The r8a7790 platform is now DT-only, the driver doesn't need to match
platform devices by name anymore. Remove the corresponding
platform_device_id entry.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-18 02:18:33 +01:00
Geert Uytterhoeven 889439cddc pinctrl: sh-pfc: Remove emev2 platform_device_id entry
The emev2 platform is now DT-only, the driver doesn't need to match
platform devices by name anymore. Remove the corresponding
platform_device_id entry.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-18 02:16:53 +01:00
Geert Uytterhoeven 1f34de05e7 pinctrl: sh-pfc: Use u32 to store register addresses
Currently all PFC registers lie in low 32-bit address space. Hence use
u32 instead of unsigned long to store PFC register addresses in pinctrl
tables.  All calculations of virtual addresses use a phys_addr_t
intermediate, so we know where to add an offset if the 32-bit assumption
ever becomes false.

While this doesn't impact 32-bit builds, it would save ca. 7 KiB on a
64-bit shmobile_defconfig kernel.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-18 02:15:40 +01:00
Geert Uytterhoeven 17c7cbb0e7 pinctrl: sh-pfc: Use reg_width instead of reg as sentinel
All other loops over sh_pfc_soc_info.data_regs[] use
pinmux_data_reg.regwidth as the sentinel, which is safer as zero is
never a valid regwidth value (reg could be zero if we start using it to
store an offset).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-18 02:14:45 +01:00
Geert Uytterhoeven cef28a2894 pinctrl: sh-pfc: Use unsigned int for register/field widths and offsets
As register and field widths and offsets are in the range 1..32, use
unsigned int (mostly replacing unsigned long) to store them in local
variables and for passing them around.

Move to one variable per line, move variables to the beginning of the
block where they are used, and drop superfluous initializations while we
are at it.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-18 02:13:47 +01:00