Commit Graph

9 Commits

Author SHA1 Message Date
Stephen Boyd 10bfcfea9b ARM: dts: qcom: Label serial nodes for aliasing and stdout-path
Add a label to the serial nodes that are being used for the
console.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-09-09 14:56:42 -05:00
Linus Torvalds 7dcca3e92a Merge git://www.linux-watchdog.org/linux-watchdog
Pull watchdog updates from Wim Van Sebroeck:
 "This contains following changes:

   - Octeon: convert to watchdog-API and apply some fixes
   - Cadence wdt: remove dependency on ARCH
   - add DT bindings for qcom + msm
   - bcm281xx: Remove use of seq_printf return value
   - stmp3xxx_rtc_wdt + pnx4008_wdt: fix broken email addresses"

* git://www.linux-watchdog.org/linux-watchdog:
  watchdog: stmp3xxx_rtc_wdt: fix broken email address
  watchdog: pnx4008_wdt: fix broken email address
  watchdog: octeon: use fixed length string for register names
  watchdog: octeon: fix some trivial coding style issues
  watchdog: octeon: convert to WATCHDOG_CORE API
  watchdog: cadence: Remove Kconfig dependency on ARCH
  ARM: msm: add watchdog entries to DT timer binding doc
  ARM: qcom: add description of KPSS WDT for IPQ8064
  watchdog: qcom: use timer devicetree binding
  watchdog: bcm281xx: Remove use of seq_printf return value
2015-04-22 11:22:55 -07:00
Mathieu Olivari 4ba1c98b55 ARM: qcom: add description of KPSS WDT for IPQ8064
Add the watchdog related entries to the Krait Processor Sub-system
(KPSS) timer IPQ8064 devicetree section. Also, add a fixed-clock
description of SLEEP_CLK, which will do for now.

Signed-off-by: Josh Cartwright <joshc@codeaurora.org>
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
2015-04-22 15:28:11 +02:00
Kenneth Westfield f49cadeb48 arm: dts: qcom: Add LPASS Audio HW to IPQ8064 device tree
Model the Qualcomm Technologies LPASS hardware for the ipq806x SOC.

Signed-off-by: Kenneth Westfield <kwestfie@codeaurora.org>
Acked-by: Banajit Goswami <bgoswami@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-04-03 13:33:49 -07:00
Kumar Gala 1e1177bf4c arm: dts: qcom: Add LCC nodes
Add the node for the LPASS clock controller found on a few qcom
SoCs so that the clock driver can probe.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
[sboyd@codeaurora.org: Added apq8064 and msm8960 nodes]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-04-03 13:33:47 -07:00
Andy Gross 4d9b766bfe arm: dts: qcom: Add TCSR support for IPQ8064
This patch adds TCSR support for use by the GSBI to automatically
configure ADM CRCI values based on the GSBI port configuration.

Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-04-03 13:33:44 -07:00
Stephen Boyd bb901bd659 ARM: dts: qcom: Correct IPQ8064 tlmm interrupt
The interrupt is 16, not 32 (which it would be if we include PPIs
in the count of interrupts).

Cc: Andy Gross <agross@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Andy Gross <agross@codeaurora.org>
Tested-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
2015-01-19 12:11:41 -06:00
Kumar Gala e512448f6e ARM: dts: qcom: Add SATA support on IPQ8064/AP148
Add SATA PHY and SATA AHCI controller nodes to device tree to enable
generic ahci support on the IPQ8064/AP148 board.

Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-10-16 02:44:47 -05:00
Kumar Gala 68de308b1c ARM: qcom: Add initial IPQ8064 SoC and AP148 device trees
Add basic IPQ8064 SoC include device tree and support for basic booting on
the AP148 Reference board with support for UART, I2C, and SPI.

Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-08-21 11:43:34 -05:00