Commit Graph

19 Commits

Author SHA1 Message Date
Gregory CLEMENT 7ea8250406 clk: mvebu: Add the xtal clock for Armada 3700 SoC
This clock is the parent of all the Armada 3700 clocks. It is a fixed
rate clock which depends on the gpio configuration read when resetting
the SoC.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-08-15 14:07:04 -07:00
Thomas Petazzoni d3da3eaef7 clk: mvebu: new driver for Armada CP110 system controller
The Armada CP110 system controller provides, amongst other things, a
number of clocks for the platform: a small number of core clocks, and
then a number of gatable clocks, derived from some of the core
clocks. Those clocks are configured via registers of the CP110 System
Controller.

The CP110 is the other core HW block (next to the AP806) used in the
Marvel Armada 7K and 8K SoCs.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
[sboyd@codeaurora.org: Silence some checkpatch noise]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-05-06 15:27:02 -07:00
Thomas Petazzoni 89a426b196 clk: mvebu: new driver for Armada AP806 system controller
The Armada AP806 system controller, amongst other things, provides a
number of clocks for the platform: the CPU cluster clocks, whose
frequencies are found by reading the Sample At Reset register, one
fixed clock, and another clock derived from the fixed clock, which is
the one used by most peripherals in AP806.

The AP806 is one of the two core HW blocks used in the Marvell 7K/8K
SoCs.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
[sboyd@codeaurora.org: Silence some checkpatch noise]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-05-06 15:13:56 -07:00
Kevin Smith 1594d568c6 clk: mvebu: Move corediv config to mvebu config
The core clock does not depend on corediv, so enabling corediv
based on the clock is not really correct.  Move the corediv
config option from the clock driver Kconfig to the mvebu Kconfig
so that it can be enabled by the MACH option instead.

This also enables corediv on Armada 375 and 38X, which was
previously missing.

Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-02-25 15:05:53 -08:00
Kevin Smith bd3677ff31 clk: mvebu: Remove corediv clock from Armada XP
There is no corediv clock on Armada XP, so this is unnecessary.

Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-02-25 15:05:47 -08:00
Thomas Petazzoni 8da6f3c166 clk: mvebu: add Marvell Armada 39x driver
This commit adds a new clock driver for the Marvell Armada 39x family
of processors. This driver is fairly similar to the ones already used
on other Marvell EBU processors, with the following main differences:

 * Different set of ratios
 * Different set of core clocks
 * Configurable reference clock in frequency

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-03-04 15:18:53 +01:00
Thomas Petazzoni 66ecbfea76 clk: mvebu: add Orion5x clock driver
This commit adds a core clock driver for the Orion5x SoC, with support
for the tclk, the CPU frequency and the DDR frequency. All the details
about the Sample-At-Reset register were extracted from the U-Boot
sources for Orion5x.

Note that Orion5x does not have gatable clocks, so this core clock
driver is sufficient to support clocking on Orion5x platforms.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: https://lkml.kernel.org/r/1398202002-28530-5-git-send-email-thomas.petazzoni@free-electrons.com
Cc: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-04-26 01:03:55 +00:00
Gregory CLEMENT 0e85aeced4 clk: mvebu: add clock support for Armada 380/385
Add the clock support for the new SoCs Armada 380 and Armada 385:
core clocks and gating clocks.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-02-17 02:34:05 +00:00
Gregory CLEMENT 41d3c64f8c clk: mvebu: add clock support for Armada 375
Add the clock support for the new SoC Armada 375: core clocks and
gating clocks.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-02-17 02:34:01 +00:00
Ezequiel Garcia a2473b6c82 clk: mvebu: Add Core Divider clock
This commit introduces a new group of clocks present in Armada 370/XP
SoCs (called "Core Divider" clocks) and add a provider for them.
The only clock supported for now is the NAND clock (ndclk), but the
infrastructure to add the rest is already set.

Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-11-24 17:29:25 +00:00
Sebastian Hesselbarth ea7e0bd7e7 clk: mvebu: disintegrate obsolete file
Switch from function-centric to soc-centric clock drivers now makes
a bunch of files obsolete. This deletes all files and Kconfig options
that are not required anymore.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-29 19:28:29 +00:00
Sebastian Hesselbarth 68be12bda2 clk: mvebu: add Armada XP SoC-centric clock init
This is moving core clock and clock gating init for Armada XP to
its own file and adds a Kconfig option. Also init functions are added
and declared so they get called on of_clk_init.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-29 19:20:59 +00:00
Sebastian Hesselbarth 6b72333d5b clk: mvebu: add Armada 370 SoC-centric clock init
This is moving core clock and clock gating init for Armada 370 to
its own file and adds a Kconfig option. Also init functions are added
and declared so they get called on of_clk_init.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-29 19:20:51 +00:00
Sebastian Hesselbarth e89406c957 clk: mvebu: add Kirkwood SoC-centric clock init
This is moving core clock and clock gating init for Kirkwood to its
own file and adds a Kconfig option. Also init functions are added and
declared so they get called on of_clk_init.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-29 19:20:38 +00:00
Sebastian Hesselbarth 5d8401668e clk: mvebu: add Dove SoC-centric clock init
This is moving core clock and clock gating init for Dove to its own
file and adds a Kconfig option. Also init functions are added and
declared so they get called on of_clk_init.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-29 19:20:30 +00:00
Sebastian Hesselbarth a45184099a clk: mvebu: add common clock functions for core clk and clk gating
Based on the current common functions for core clocks and clock
gating control, new common functions are joined in a single file.
Given the opportunity, names of functions and structs are unified,
and also a Kconfig entry is added.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-29 19:20:22 +00:00
Sebastian Hesselbarth f97d0d7aa8 clk: mvebu: add clock gating control provider for DT
This driver allows to provide DT clocks for clock gates found on
Marvell Dove and Kirkwood SoCs. The clock gates are referenced by
the phandle index of the corresponding bit in the clock gating control
register to ease lookup in the datasheet.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2012-11-20 14:43:24 +01:00
Gregory CLEMENT ab8ba01b3f clk: mvebu: add armada-370-xp CPU specific clocks
Add Armada 370/XP specific CPU clocks

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2012-11-20 14:35:42 +01:00
Sebastian Hesselbarth 97fa4cf442 clk: mvebu: add mvebu core clocks.
This driver allows to provide DT clocks for core clocks found on
Marvell Kirkwood, Dove & 370/XP SoCs. The core clock frequencies and
ratios are determined by decoding the Sample-At-Reset registers.

Although technically correct, using a divider of 0 will lead to
div_by_zero panic. Let's use a ratio of 0/1 instead to fail later
with a zero clock.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by Gregory CLEMENT <gregory.clement@free-electrons.com>
2012-11-20 14:34:08 +01:00