Add Gigabit Ethernet mode to GEM cadence IP and enable RGMII connection.
Signed-off-by: Patrice Vilchez <patrice.vilchez@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Tested-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This patch does two things:
* Use macb struct members and remove at91_ether ones
* Alloc DMA buffers on netdev start and dealloc on stop
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
This rips out the at91_ether phy handling and ethtool stuff
and replace it with equivalent stuff from macb.
The only thing lost is the phy irq support from at91_ether,
but this can be added to macb and then benefit all users.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
This will make it easier to share code between the drivers and
eventually merge them into one driver.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Allow the device tree to provide the mac address and the phy mode.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
[nicolas.ferre@atmel.com: change "compatible" node property, doc and DT hwaddr]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
[jamie@jamieiles.com: add "gem" compatibility strings and doc]
Acked-by: Jamie Iles<jamie@jamieiles.com>
Acked-by: David S. Miller <davem@davemloft.net>
GEM has configurable receive buffer sizes so requires this to be
programmed up. Any size < 2048 and a multiple of 64 bytes is permitted.
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: David S. Miller <davem@davemloft.net>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Tested-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Some GEM implementations may support DMA bus widths up to 128 bits. We
can get the maximum supported DMA bus width from the design
configuration register so use that to program the device up.
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: David S. Miller <davem@davemloft.net>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Tested-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
GEM devices have a different number of statistics registers and they
are at a different offset to MACB devices. Make the statistics
collection method dependent on device type.
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: David S. Miller <davem@davemloft.net>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Tested-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
GEM devices support larger clock divisors and have a different
range of divisors. Program the MDIO clock divisors based on the
device type.
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: David S. Miller <davem@davemloft.net>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Tested-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The Cadence GEM is based on the MACB Ethernet controller but has a few
small changes with regards to register and bitfield placement. This
patch detects the presence of a GEM by reading the module ID register
and setting a flag appropriately.
This handles the new HW address, USRIO and hash register base register
locations in GEM.
v3: - convert to macb_is_gem() inline rather than storing a boolean
flag
- handle rx_overrun stats for gem
Acked-by: David S. Miller <davem@davemloft.net>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Tested-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Move the Atmel driver into drivers/net/ethernet/cadence/ and
make the necessary Kconfig and Makefile changes.
CC: Nicolas Ferre <nicolas.ferre@atmel.com>
CC: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Acked-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Patrice Vilchez