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4 Commits

Author SHA1 Message Date
Ralf Baechle 5808184f1b MIPS: uasm: Add OR instruction. 
This is needed for the fix of the M3 workaround.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2010-04-12 17:26:20 +01:00
David Daney 58b9e2239f MIPS: Add SYSCALL to uasm. 
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/976/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2010-04-12 17:26:14 +01:00
David Daney 32546f38fa MIPS: Add TLBR and ROTR to uasm. 
The soon to follow Read Inhibit/eXecute Inhibit patch needs TLBR and
ROTR support in uasm.  We also add a UASM_i_ROTR macro.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/953/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2010-02-27 12:53:25 +01:00
Florian Fainelli 3482d713a9 MIPS: Move arch/mips/mm/uasm.h to arch/mips/include/asm/uasm.h 
Signed-off-by: Florian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
To: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/887/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2010-02-27 12:53:19 +01:00