Commit Graph

42 Commits

Author SHA1 Message Date
Olof Johansson a51dcd297d Renesas ARM Based SoC Updates for v4.18
* SoC
   - Change platform dependency to ARCH_RENESAS
 
     Geert Uytterhoeven says "The Renesas Fine Display Processor driver is
     used on Renesas R-Car SoCs only.  Since commit 9b5ba0df4e ("ARM:
     shmobile: Introduce ARCH_RENESAS") is ARCH_RENESAS a more appropriate
     platform dependency than the legacy ARCH_SHMOBILE, hence use the
     former.
 
     This will allow to drop ARCH_SHMOBILE on ARM and ARM64 in the near
     future."
 
   - Add the to Kconfig RZ/N1D (r9a06g032) SoC
 
     In preparation for upstream support of this SoC
 
   - Identify R-Car E3 (r8a77990) SoC
 
   - Identify and add minimal support for RZ/G1C (r8a77470) SoC
 
 * R-Car SYSC
   - Add support for R-Car E3 (r8a77990) SoC
 
     Shimoda-san says this adds:
     + "Cortex-A53 CPU{0,1}, Cortex-A53 SCU, Cortex-R7, A3VC,
        A2VC1 and 3DG-{A,B} power domain areas..."
 
     + "workaround for 3DG-{A,B} of R-Car E3 ES1.0 because
        the SoC has a restriction about the order."
 
   - Remove unused inclusion of <linux/sys_soc.h>,
 
   - Make r8a77995_areas[] const.
 
 * R-Car Reset
 
   - Add support for R-Car E3 (r8a77990) SoC
 
     This driver is needed for the clock driver to work
 
 * Debug-LL
 
   - Add support for RZ/G1C (r8a77470) SoC
 
     RZ/G1C uses SCIF1 for the debug console
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlr+qd0ACgkQ189kaWo3
 T76ogQ//XbXLPdjG7qNVoBfM3ILyWGlr3KKZ+29UBCVpfGcbQAEqCr1bB1hHvZUP
 CS8Hq9Bw5fFBD1/mRTF9BW27wJTxqAj+ZcWf2b0+lCfdz0KZQdtXckTpvwAW4V6V
 aizz08cbDAXs4SeGfRYAFNe3OmiryHEnTr3V6PTzGypDpkKSemKhhWMlxdxLtWL0
 FfdC6Q5vFDjEXbF58yvFM7uVJy0GMBYh9CG6cbFham1dSMjlns/Gd1FBMftOjLqC
 BlxfVKP8Ju+NKZDTZInZeYwOhgAqFldwdqO8UQxyXYKqFlvpvhGasaD1J2HaVfIV
 nMVR9Ih9btd+0ob7Oe+hvQsXZedLk0wbYqIpMu3BN+1ynu525VtP+TqvnKRtFkBO
 vFnps69tQ5FEnb7V0toa3k2dNsLbFZlbZQ6cvklRyWY+5uvbXioYZnN84UGQdBhj
 u+vz+Pdoyakr/o3zwrJ9s/AhBdKSgxtxXgqmiW4xXCAeykqkPUDyfx5ALyYtD/vG
 XuC4PR5XDg1PGIzqU37gk34PG8I+G4ybbMdcL7KZeKknFHppBM4242gre9VJ580K
 TJTcCg9LW4f8Tqa6CpNboj+X36PjLl611XcZdFGvHMl28V267VtDFWAIeljBIh1p
 Xau0jvz6Yxt08/zdQ29N7piJ0Oc6Vt9ZwwdKlwseNPLQJhmJv6w=
 =xLPA
 -----END PGP SIGNATURE-----

Merge tag 'renesas-soc-for-v4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

Renesas ARM Based SoC Updates for v4.18

* SoC
  - Change platform dependency to ARCH_RENESAS
    This will allow to drop ARCH_SHMOBILE on ARM and ARM64 in the near
    future.
  - Add the to Kconfig RZ/N1D (r9a06g032) SoC
  - Identify R-Car E3 (r8a77990) SoC
  - Identify and add minimal support for RZ/G1C (r8a77470) SoC

* R-Car SYSC
  - Add support for R-Car E3 (r8a77990) SoC
  - Remove unused inclusion of <linux/sys_soc.h>,
  - Make r8a77995_areas[] const.

* R-Car Reset
  - Add support for R-Car E3 (r8a77990) SoC

* Debug-LL
  - Add support for RZ/G1C (r8a77470) SoC

* tag 'renesas-soc-for-v4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  soc: renesas: r8a77990-sysc: Add workaround for 3DG-{A,B}
  soc: renesas: rcar-sysc: Add support for R-Car E3 power areas
  arm: shmobile: Add the RZ/N1D (R9A06G032) to the shmobile Kconfig
  arm: shmobile: Change platform dependency to ARCH_RENESAS
  soc: renesas: r8a77995-sysc: Cleanups
  soc: renesas: rcar-rst: Add support for R-Car E3
  soc: renesas: Add r8a77990 SYSC PM Domain Binding Definitions
  soc: renesas: identify R-Car E3
  ARM: debug-ll: Add support for r8a77470
  ARM: shmobile: Add the RZ/N1 arch to the shmobile Kconfig
  ARM: shmobile: r8a77470: basic SoC support
  soc: renesas: rcar-sysc: Add r8a77470 support
  soc: renesas: rcar-rst: Add support for RZ/G1C
  soc: renesas: Identify RZ/G1C

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-05-26 14:39:59 -07:00
Mylène Josserand cad160ed0a ARM: shmobile: Convert file to use cntvoff
Now that a common function is available for CNTVOFF's
initialization, let's convert shmobile-apmu code to use
this function.

Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-05-08 14:57:17 +02:00
Biju Das 0c1d543b75 ARM: shmobile: r8a77470: basic SoC support
Add minimal support for the RZ/G1C (R8A77470) SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-04-16 16:01:24 +02:00
Geert Uytterhoeven 3fd45a136f ARM: shmobile: rcar-gen2: Make sure CNTVOFF is initialized on CA7/15
On Cortex-A7, the arch timer CNTVOFF register is uninitialized.
Ideally it should be initialized by the boot loader, but it isn't.

For the boot CPU, CNTVOFF is initialized by Linux since commit
9ce3fa6816 ("ARM: shmobile: rcar-gen2: Add CA7 arch_timer
initialization for r8a7794").
For secondary CPU cores, no such initialization is done.

Hence when enabling SMP on r8a7794, the kernel log is spammed with:

    WARNING: Underflow in clocksource 'arch_sys_counter' observed, time update ignored.
	     Please report this, consider using a different clocksource, if possible.
	     Your kernel is probably still fine.

As Marc Zyngier pointed out that Cortex-A15 and Cortex-A7 are similar with
respect to CNTVOFF, we have been very lucky this just worked on R-Car
Gen2 SoCs with Cortex-A15 cores.

To fix this:
  - Move the existing inline asm code to initialize CNTVOFF to an
    assembler source file (adding comments and replacing hardcoded
    constants by definitions in the process), so it can be reused,
  - Perform the initialization of CNTVOFF on the boot CPU (Cortex-A15 or
    Cortex-A7) on all R-Car Gen2 and RZ/G1 parts,
  - Wrap the standard secondary_startup() routine inside a routine which
    initializes CNTVOFF.

Based on patches by Hisashi Nakamura in the BSP.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-09-18 08:10:44 +02:00
Geert Uytterhoeven cd66fa4e02 ARM: shmobile: rcar-gen2: Correct arch timer frequency on RZ/G1E
According to the datasheet, the frequency of the ARM architecture timer
on RZ/G1E depends on the frequency of the ZS clock, just like on R-Car
E2 and V2H.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 17:23:58 +02:00
Geert Uytterhoeven cdcdfaad8a ARM: shmobile: rcar-gen2: Add support for CPG/MSSR bindings
When using the new CPG/MSSR bindings, there is no longer a
"renesas,rcar-gen2-cpg-clocks" node, and the code to obtain the external
clock crystal frequency falls back to a default of 20 MHz.
While this is correct for all upstream R-Car Gen2 and RZ/G1 boards, this
is not necessarily the case for out-of-tree third party boards.

Add support for finding the external clock crystal oscillator on RZ/G1M,
and on R-Car H2, M2-W, and M2-N using the new CPG/MSSR bindings, through
the corresponding "renesas,r8a77xx-cpg-mssr" nodes.

Note that this is not needed on R-Car V2H and E2, and on RZ/G1E, as on
those SoCs the arch_timer and generic counter clock is derived from the
ZS clock instead.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 16:30:51 +02:00
Daniel Lezcano ba5d08c0ea clocksource/drivers: Rename clocksource_probe to timer_probe
The function name is now renamed to 'timer_probe' for consistency with
the CLOCKSOURCE_OF_DECLARE => TIMER_OF_DECLARE change.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-14 11:59:16 +02:00
Geert Uytterhoeven 70def3e536 ARM: shmobile: rcar-gen2: Remove unused rcar_gen2_read_mode_pins()
After
  1. commit 9f5ce39ddb ("ARM: shmobile: rcar-gen2: Obtain extal
     frequency from DT"),
  2. commit 80951f04c3 ("ARM: shmobile: rcar-gen2: Stop passing
     mode pins state to clock driver"),
  3. and handling of debug resource reset,
there are no more users of rcar_gen2_read_mode_pins() left.
Remove the function and its support definitions.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-01-03 10:50:45 +01:00
Linus Torvalds e79ab194d1 ARM: SoC platform updates for v4.10
These are updates for platform specific code on 32-bit ARM machines,
 essentially anything that can not (yet) be expressed using DT files.
 
 Noteworthy changes include:
 
 - Added support for the TI DRA71x family of SoCs in mach-omap2,
   this is an new variant of the the DRA72x/DRA74x automotive
   infotainment chips we already supported for a while.
 
 - Added support for the ST STM32F746 SoC, the first Cortex-M7
   based microcontroller we support, related to the smaller
   STM32F4 family.
 
 - Renesas adds support for r8a7743 and r8a7745 in mach-shmobile,
   see http://elinux.org/RZ-G
 
 - SMP is now supported on the OX820 platform
 
 - A lot of code in mach-omap2 gets removed as a follow-up to
   removing support for board files in the previous release
 
 - Davinci has some new work to improve USB support
 
 - For i.MX, the performance monitor now supports profiling the
   memory controller using 'perf'
 
 Conflicts:
 arch/arm/mach-shmobile/setup-rcar-gen2.c: rcar_gen2_clocks_init()
 is gone, calling of_clk_init(NULL) is sufficient now.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIVAwUAWFMS9WCrR//JCVInAQIG+Q/7BElvubqO/Cc/VEAyoB5iF9OB9wPD2t5p
 O0KwtrTtzqJZJNGTmPiesR4DMZH07O1XoW8HqvBPeXtB7/t0tmOegwK+WABbpkSE
 ZQgUjtrIGwteJXYqU2BbhooO8G6mEsfWaqdGX8ZiIk40fPhMN6536lG+JA8DV7uv
 ckAPHCZkIf34lDtwljN97Cvj1TT9lBFp04bx7alKqfg1IMV+iMSxvSRHuuFlxRCk
 kzwVXDmFlZLmueU2KbQXTuOUrvehIGlZ/X5QWlxfrjwCwnOvr54p8WDoVWu2UkHm
 Dc8BVfsBny8mCZJRzfDD1S0PD0mWn1msdOhRb4VRzsC9DnRI4qbL0/Hstu8A7yUQ
 kBtMyVtFTzvRSclABbHHN6Mnm37AyNwSIKIB8h2U1m7YHqZGwHLaflVT5sf3tl7m
 4arTVqHtR8oSU5G5a2FTznMM2rfIx4LcCBbLQxWqzmO4Qrh4j6t7c2i7+VTfFAja
 0bToLgTArKK/cep6PWeBnMH14nzlXoKtBf2T8qwQPuAmLKy9E0ZduLKZ01B/nqrj
 OXcsnG0OUuqU4RgbIaDssRU4ohKIk8JcAl60TdRFhzj+/LTbeMaWVwbWuQS+iHd3
 zfzGUoUIhElx0vHt6ghR0BYQadszb1z9V0NEs3UM0v5cWlNodX//3okH8lZmSW6w
 +fO4dSnIKIA=
 =BF6Y
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform updates from Arnd Bergmann:
 "These are updates for platform specific code on 32-bit ARM machines,
  essentially anything that can not (yet) be expressed using DT files.

  Noteworthy changes include:

   - Added support for the TI DRA71x family of SoCs in mach-omap2, this
     is an new variant of the the DRA72x/DRA74x automotive infotainment
     chips we already supported for a while.

   - Added support for the ST STM32F746 SoC, the first Cortex-M7 based
     microcontroller we support, related to the smaller STM32F4 family.

   - Renesas adds support for r8a7743 and r8a7745 in mach-shmobile, see
     http://elinux.org/RZ-G

   - SMP is now supported on the OX820 platform

   - A lot of code in mach-omap2 gets removed as a follow-up to removing
     support for board files in the previous release

   - Davinci has some new work to improve USB support

   - For i.MX, the performance monitor now supports profiling the memory
     controller using 'perf'"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (95 commits)
  ARM: davinci: da830-evm: use gpio descriptor for mmc pins
  ARM: davinci: da850-evm: use gpio descriptor for mmc pins
  ARM: davinci: hawk: use gpio descriptor for mmc pins
  ARM: ARTPEC-6: add select MFD_SYSCON to MACH_ARTPEC6
  ARM: davinci: da8xx: Fix ohci device name
  ARM: oxnas: Add OX820 config and makefile entry
  ARM: oxnas: Add OX820 SMP support
  ARM: davinci: PM: fix build when da850 not compiled in
  ARM: orion5x: remove legacy support of ls-chl
  ARM: integrator: drop EBI access use syscon
  ARM: BCM5301X: Add back handler ignoring external imprecise aborts
  ARM: davinci: PM: support da8xx DT platforms
  ARM: davinci: PM: cleanup: remove references to pdata
  ARM: davinci: PM: rework init, remove platform device
  ARM: Kconfig: Introduce MACH_STM32F746 flag
  ARM: mach-stm32: Add a new SOC - STM32F746
  ARM: shmobile: document SK-RZG1E board
  ARM: shmobile: r8a7745: basic SoC support
  ARM: imx: mach-imx6ul: add imx6ull support
  ARM: zynq: Reserve correct amount of non-DMA RAM
  ...
2016-12-15 15:39:02 -08:00
Sergei Shtylyov 47802fd7c7 ARM: shmobile: r8a7745: basic SoC support
Add minimal support for the RZ/G1E (R8A7745) SoC.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-15 10:33:39 +01:00
Geert Uytterhoeven 80951f04c3 ARM: shmobile: rcar-gen2: Stop passing mode pins state to clock driver
Now the R-Car Gen2 CPG clock driver obtains the state of the mode pins
from the R-Car RST driver, there's no longer a need to pass this state
explicitly. Hence we can just call of_clk_init() instead.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2016-11-02 20:44:07 +01:00
Laurent Pinchart a0c4e2ccb3 ARM: shmobile: Consolidate R8A7743 and R8A779[234] machine definitions
The four SoCs use identical machine operations, consolidate them into
two machine definitions in a single file.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-02 10:15:33 +01:00
Simon Horman e11fc79521 ARM: shmobile: only call rcar_gen2_clocks_init() if present
The RZ/G1M (r8a7743) uses the R-Car Gen2 core, but not the R-Car Gen2 clock
driver. This is a harbinger of a transition for R-Car Gen2 SoCs. As the
process to get all the required pieces in place is somewhat complex it
seems useful to try to disentangle dependencies where possible.

The approach here is to temporarily disable calling rcar_gen2_clocks_init()
if no R-Car Gen2 SoC are configured and thus the symbol will not be
present.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-11-02 10:15:07 +01:00
Geert Uytterhoeven 2477a356dd ARM: shmobile: rcar-gen2: Correct arch timer frequency on R-Car V2H
According to the datasheet, the frequency of the ARM architecture timer
on R-Car V2H depends on the frequency of the ZS clock, just like on
R-Car E2.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-06-29 14:42:03 +02:00
Geert Uytterhoeven 9f5ce39ddb ARM: shmobile: rcar-gen2: Obtain extal frequency from DT
On some R-Car Gen2 SoCs, the frequency of the ARM architecture timer
depends on the frequency of the external clock crystal.  Currently the
latter is determined indirectly from the state of the mode pins, which
is a relic predating DT.

Obtain the external clock crystal frequency from DT instead, removing
the dependency on the mode pins.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-06-29 14:42:02 +02:00
Linus Torvalds 33c1f638a0 The clk changes for this release cycle are mostly dominated by
new device support in terms of LoC, but there has been some cleanup
 in the core as well as the usual minor clk additions to various
 drivers.
 
 Core:
 
  - parent tracking has been simplified
 
  - CLK_IS_ROOT is now a no-op flag, cleaning up drivers has started
 
  - of_clk_init() doesn't consider disabled DT nodes anymore
 
  - clk_unregister() had an error path bug squashed
 
  - of_clk_get_parent_count() has been fixed to only return unsigned ints
 
  - HAVE_MACH_CLKDEV is removed now that the last arch user (ARM) is gone
 
 New Drivers:
 
  - NXP LPC18xx creg
 
  - QCOM IPQ4019 GCC
 
  - TI dm814x ADPLL
 
  - i.MX6QP
 
 Updates:
 
  - Cyngus audio clks found on Broadcom iProc devices
 
  - Non-critical fixes for BCM2385 PLLs
 
  - Samsung exynos5433 updates for clk id errors, HDMI support,
    suspend/resume simplifications
 
  - USB, CAN, LVDS, and FCP clks on shmobile devices
 
  - sunxi got support for more clks on new SoCs and went through a minor
    refactoring/rewrite to use a simpler factor clk construct
 
  - rockchip added some more clk ids and added suport for fraction dividers
 
  - QCOM GDSCs in msm8996
 
  - A new devm helper to make adding custom actions simpler (acked by Greg)
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABCAAGBQJW8fPZAAoJENidgRMleOc9sc0P/2b4k8FiFwjMXiiXI1rcEjiz
 ZjeVxzyAcwBiYoL8a2XONd+pihjLNcAbDbjk8SGUzmKDDz7elQbrhby/6o1dPlW/
 fQEQFa8Xa8zhZgidO1AFc1DmIcPg/u/Z58wHbjIcqDjvzKA63213Ud34NJsRtF6y
 +EJrIUZiTtj5q1pJgDmqlOv6ImmQtgW/AN51vNXCNNCyS9OsSgQm0DK5/f485HNc
 2y5NE5hpijso69HFet5chuT3DiDLz/0dxmgCm/w9CRRzkHxYl3lxV/v07B+rZBo5
 cWplFfvJqX7PvQtcP0sPPzZUfGT/vOeTboWprQwI4R3RObS18xLqlq6DEvOTmnqW
 Jh+9uNBq4+kwSz5GcYjpwvj7+W0FPgIaBVRHrEW9qeXkgDpYloPtnEt8C8GmO6Bt
 O0bgIzETq9mnRTA+VesIfjmTa4IYRDDUoDwGTw5CnW3jaZmtYJh8GhgZulMfPfyK
 vfWQkY2OesXFwct0rU8tFiswTPeTRgXqL3AsPYjTPAHx1kfBpvfOQTCzzT7eSBr7
 jykd9EXsXrYb/rpIxW7j6KjPpaWu+EouK06wc4TIBGrrWVTIV0ZvybzOBgf0FnpS
 UDx87OyQb8x9TDMrfKf6bmJyly8y1dXkutFYY4XKIGUydlXIf0kn7AnIXW6SR7mX
 fTEdLFMZ03ViCojtah5r
 =bZFY
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "The clk changes for this release cycle are mostly dominated by new
  device support in terms of LoC, but there has been some cleanup in the
  core as well as the usual minor clk additions to various drivers.

  Core:
   - parent tracking has been simplified
   - CLK_IS_ROOT is now a no-op flag, cleaning up drivers has started
   - of_clk_init() doesn't consider disabled DT nodes anymore
   - clk_unregister() had an error path bug squashed
   - of_clk_get_parent_count() has been fixed to only return unsigned ints
   - HAVE_MACH_CLKDEV is removed now that the last arch user (ARM) is gone

  New Drivers:
   - NXP LPC18xx creg
   - QCOM IPQ4019 GCC
   - TI dm814x ADPLL
   - i.MX6QP

  Updates:
   - Cyngus audio clks found on Broadcom iProc devices
   - Non-critical fixes for BCM2385 PLLs
   - Samsung exynos5433 updates for clk id errors, HDMI support,
     suspend/resume simplifications
   - USB, CAN, LVDS, and FCP clks on shmobile devices
   - sunxi got support for more clks on new SoCs and went through a
     minor refactoring/rewrite to use a simpler factor clk construct
   - rockchip added some more clk ids and added suport for fraction
     dividers
   - QCOM GDSCs in msm8996
   - A new devm helper to make adding custom actions simpler (acked by Greg)"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (197 commits)
  clk: bcm2835: fix check of error code returned by devm_ioremap_resource()
  clk: renesas: div6: use RENESAS for #define
  clk: renesas: Rename header file renesas.h
  clk: max77{686,802}: Remove CLK_IS_ROOT
  clk: versatile: Remove CLK_IS_ROOT
  clk: sunxi: Remove use of variable length array
  clk: fixed-rate: Remove CLK_IS_ROOT
  clk: qcom: Remove CLK_IS_ROOT
  doc: dt: add documentation for lpc1850-creg-clk driver
  clk: add lpc18xx creg clk driver
  clk: lpc32xx: fix compilation warning
  clk: xgene: Add missing parenthesis when clearing divider value
  clk: mb86s7x: Remove CLK_IS_ROOT
  clk: x86: Remove clkdev.h and clk.h includes
  clk: x86: Remove CLK_IS_ROOT
  clk: mvebu: Remove CLK_IS_ROOT
  clk: renesas: move drivers to renesas directory
  clk: si5{14,351,70}: Remove CLK_IS_ROOT
  clk: scpi: Remove CLK_IS_ROOT
  clk: s2mps11: Remove CLK_IS_ROOT
  ...
2016-03-23 06:06:45 -07:00
Simon Horman 09c32427c9 clk: renesas: Rename header file renesas.h
This is part of an ongoing process to migrate from ARCH_SHMOBILE to
ARCH_RENESAS the motivation for which being that RENESAS seems to be a more
appropriate name than SHMOBILE for the majority of Renesas ARM based SoCs.

Along with the above mentioned Kconfig changes it seems appropriate
to also rename files.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-03-15 18:12:14 -07:00
Geert Uytterhoeven 0c16907054 ARM: shmobile: rcar-gen2: Make rcar_gen2_dma_contiguous static
make C=1:

    arch/arm/mach-shmobile/setup-rcar-gen2.c:186:12: warning: symbol 'rcar_gen2_dma_contiguous' was not declared. Should it be static?

Make it static, and move it inside the function to avoid a "defined but
not used" warning if CONFIG_DMA_CMA=n.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-04 15:09:20 +01:00
Marc Zyngier 3722ed2380 clocksource: cosmetic: Drop OF 'dependency' from symbols
Seeing the 'of' characters in a symbol that is being called from
ACPI seems to freak out people. So let's do a bit of pointless
renaming so that these folks do feel at home.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Hanjun Guo <hanjun.guo@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-10-01 02:18:39 +02:00
Geert Uytterhoeven d62ba10c31 ARM: shmobile: R-Car Gen2: CONFIG_ARCH_SHMOBILE_MULTI is always set
Since commit e042681894 ("ARM: shmobile: r8a7790: Remove legacy
code"), all R-Car Gen2 SoCs are supported by multiplatform kernels only.
As CONFIG_ARCH_SHMOBILE_MULTI is always set for shmobile multiplatform
kernels, we can remove related #ifdefs in code specific to R-Car Gen2
SoCs.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-06 09:29:46 +09:00
Linus Torvalds e6c81cce56 ARM: SoC platform updates for v4.1
Our SoC branch usually contains expanded support for new SoCs and other core
 platform code. In this case, that includes:
 
 - Support for the new Annapurna Labs "Alpine" platform
 - A rework greatly simplifying adding new platform support to the MCPM
   subsystem (Multi-cluster power management)
 - Cpuidle and PM improvements for Exynos3250
 - Misc updates for Renesas, OMAP, Meson, i.MX. Some of these could have
   gone in other branches but ended up here for various reasons.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVNzfWAAoJEIwa5zzehBx3idcP/Rt042tqb0bian/4M1Ud1aQ7
 AMRd4oU5MfWAlzaGPeMBS+b1eo/eENj6wyWsvBQIByZN76ImlUXtxsx0U0frLrVg
 mWVo9zOLRuoE6yyq329zZgg1IM1RtRIruS6zucKsHgKtq0DcjhYGGUH0ZVZk/rKI
 RLtRK8U6Jr0lnpu1TDE5mii7GCCZlEl5dG+J3w5ewC9y7RLRlM09xjK/Zsj0QOqY
 JvMOIaHuHMT6l7BQ6QajtVxTeGECOJ3YDqC6mDHCVD7f3v88+7H5C20xNGPK921w
 tLfB5qOojnj+kKZRPhi8EGnRzKwrBq6/mE5CvvigTCGlAEUOzy7PFSY9oNE80QeL
 6mUdPTuZuqz7ZEIF0kj8I0AkB6k8B+aYfqA9mqM5yGpa11HvZZGfP7CwI4izoe6+
 sT++0OeDPwbsMyRxZjqNQLs4QYaKGYMP4NCgA17zz5ToRCQZy7e5hd2GYzaRouyi
 kTpR9FbxwDcBIwTcA3F7oJ90BEMJ0tvGz/Al11UQpzPePhTwQt2yB5bRZyK/RYIU
 x8k8RHArG3fmS89D4aOViL3sy/zoUBedx4UfAo6jVbrvoZGALQL23KHdqBqDiPmP
 sMRj/sSr+0h9nJCVNM6I/OUD4/IrpFGaeX9V7rpEsHVe7j83eV7Q2wNRPyVTgxdn
 jS8TS0FNAXIv8FO9EoNH
 =tcGs
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform updates from Olof Johansson:
 "Our SoC branch usually contains expanded support for new SoCs and
  other core platform code.  In this case, that includes:

   - support for the new Annapurna Labs "Alpine" platform

   - a rework greatly simplifying adding new platform support to the
     MCPM subsystem (Multi-cluster power management)

   - cpuidle and PM improvements for Exynos3250

   - misc updates for Renesas, OMAP, Meson, i.MX.  Some of these could
     have gone in other branches but ended up here for various reasons"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (53 commits)
  ARM: alpine: add support for generic pci
  ARM: Exynos: migrate DCSCB to the new MCPM backend abstraction
  ARM: vexpress: migrate DCSCB to the new MCPM backend abstraction
  ARM: vexpress: DCSCB: tighten CPU validity assertion
  ARM: vexpress: migrate TC2 to the new MCPM backend abstraction
  ARM: MCPM: move the algorithmic complexity to the core code
  ARM: EXYNOS: allow cpuidle driver usage on Exynos3250 SoC
  ARM: EXYNOS: add AFTR mode support for Exynos3250
  ARM: EXYNOS: add code for setting/clearing boot flag
  ARM: EXYNOS: fix CPU1 hotplug on Exynos3250
  ARM: S3C64XX: Use fixed IRQ bases to avoid conflicts on Cragganmore
  ARM: cygnus: fix const declaration bcm_cygnus_dt_compat
  ARM: DRA7: hwmod: Fix the hwmod class for GPTimer4
  ARM: DRA7: hwmod: Add data for GPTimers 13 through 16
  ARM: EXYNOS: Remove left over 'extra_save'
  ARM: EXYNOS: Constify exynos_pm_data array
  ARM: EXYNOS: use static in suspend.c
  ARM: EXYNOS: Use platform device name as power domain name
  ARM: EXYNOS: add support for async-bridge clocks for pm_domains
  ARM: omap-device: add missed callback for suspend-to-disk
  ...
2015-04-22 09:08:39 -07:00
Geert Uytterhoeven 8883e72da3 ARM: shmobile: R-Car Gen2: CONFIG_COMMON_CLK is always set
Since commit e042681894 ("ARM: shmobile: r8a7790: Remove legacy
code"), all R-Car Gen2 SoCs are supported by multiplatform kernels only.
As CONFIG_COMMON_CLK is always set for multiplatform kernels, we can
remove related #ifdefs in code specific to R-Car Gen2 SoCs.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-03-12 08:43:34 +09:00
Magnus Damm 744cadba1a ARM: shmobile: No R-Car Gen2 CMA reservation when HIGHMEM=n
Allow R-Car Gen2 platforms to boot with CMA enabled
and HIGHMEM disabled. This patch adds code to check
if the R-Car Gen2 specific memory reservation window
is included in the kernel memory range or not. When
HIGHMEM is disabled the R-Car Gen2 reservation area is
outside the kernel memory range and in such case the
memory reservation is simply skipped over.

Without this patch the kernel boot hangs when CMA is
enabled and HIGHMEM is disabled on the r8a7791 Koelsch
hardware platform:

    WARNING: CPU: 1 PID: 1 at mm/cma.c:113 cma_init_reserved_areas+0x88/0x1d4()
    ...
    WARNING: CPU: 1 PID: 1 at mm/cma.c:121 cma_init_reserved_areas+0xf8/0x1d4()
    ...
    Unable to handle kernel NULL pointer dereference at virtual address 00000160
    pgd = c0003000
    [00000160] *pgd=80000040004003, *pmd=00000000
    Internal error: Oops: 206 [#1] SMP ARM
    Modules linked in:
    CPU: 1 PID: 1 Comm: swapper/0 Tainted: G        W
3.19.0-rc4-koelsch-01450-g7f9b6075ce12c3ea-dirty #735
    Hardware name: Generic R8A7791 (Flattened Device Tree)
    task: edc553c0 ti: edc56000 task.ti: edc56000
    PC is at set_pfnblock_flags_mask+0x54/0xa0
    LR is at 0x440

In the current shmobile_defconfig HIGHMEM is enabled
while CMA is disabled, so to trigger this the kernel
configuration for both CMA and HIGHMEM needs to be
adjusted.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-02-24 07:13:54 +09:00
Linus Torvalds 878ba61aa9 ARM: SoC platform changes
New and updated SoC support. Also included are some cleanups where the
 platform maintainers hadn't separated cleanups from new developent in
 separate branches.
 
 Some of the larger things worth pointing out:
 
 - A large set of changes from Alexandre Belloni and Nicolas Ferre
   preparing at91 platforms for multiplatform and cleaning up quite a
   bit in the process.
 - Removal of CSR's "Marco" SoC platform that never made it out to the
   market. We love seeing these since it means the vendor published
   support before product was out, which is exactly what we want!
 
 New platforms this release are:
 
 - Conexant Digicolor (CX92755 SoC)
 - Hisilicon HiP01 SoC
 - CSR/sirf Atlas7 SoC
 - ST STiH418 SoC
 - Common code changes for Nvidia Tegra132 (64-bit SoC)
 
 We're seeing more and more platforms having a harder time labelling
 changes as cleanups vs new development -- which is a good sign that
 we've come quite far on the cleanup effort. So over time we might start
 combining the cleanup and new-development branches more.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJU4uiiAAoJEIwa5zzehBx3LtoQAIP4eInJAumhB67MexzWGIBx
 eOsloBRMEBrjBQdSYsdsypN6T61WjDu1aieCxEGzIqitcMa59AIyyzglmlXy3UmV
 XQuSnIBag2fsOqrvqd+c6ewzAMxm2/Nbi3+zjzApkf27NDlBLhEjxuK6pAAf4Yw9
 gyWqB9g0d4V06XdqRInRvyyVfMu6fdApHLnadtjcMdiorQGd1bcOE1sQYygy6N6e
 d6vGvyKSv4ygyDG9//njzm6C5OnmHliimMToeuDC2Scel69RM97EnMXys988CqUH
 0Ru7XANEujtHXSOBYOyCv1kk4V5NguGzlfepe23oidOew8MjUdyRvKrwUiMt3AnT
 SVqcZ9UU5wjJC6j+iADh+E7zww2H0rA6vFRzXy297dDuLg2C2ONFljBj/tIKGc71
 ++gLc6LRn7UmSyK98JMzkxDhmnnPn8w2O0M5GdabAqzZSfHlL1juW9ljp9Al5P6y
 apLRzqMGjEoyC4huXvB3XVfrxGfepe5pco6wVlwmF3ilwf7iHnfuHONC1aw2mPRO
 aOKiS+0gHWL3rNZtZQtyW7Ws0I2HJFip2CWIloBK1/2ntEoh51PH7jGw8iu/6jTk
 //DCXqPBNXcLqonB9CHJZ/EWt0wup0BcHyLjlWX7iEjsdP/QJXrDgnrV3qdHibbh
 AJASjs0YVDcdvRsRStlg
 =szd9
 -----END PGP SIGNATURE-----

Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform changes from Olof Johansson:
 "New and updated SoC support.  Also included are some cleanups where
  the platform maintainers hadn't separated cleanups from new developent
  in separate branches.

  Some of the larger things worth pointing out:

   - A large set of changes from Alexandre Belloni and Nicolas Ferre
     preparing at91 platforms for multiplatform and cleaning up quite a
     bit in the process.

   - Removal of CSR's "Marco" SoC platform that never made it out to the
     market.  We love seeing these since it means the vendor published
     support before product was out, which is exactly what we want!

  New platforms this release are:

   - Conexant Digicolor (CX92755 SoC)
   - Hisilicon HiP01 SoC
   - CSR/sirf Atlas7 SoC
   - ST STiH418 SoC
   - Common code changes for Nvidia Tegra132 (64-bit SoC)

  We're seeing more and more platforms having a harder time labelling
  changes as cleanups vs new development -- which is a good sign that
  we've come quite far on the cleanup effort.  So over time we might
  start combining the cleanup and new-development branches more"

* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (124 commits)
  ARM: at91/trivial: unify functions and machine names
  ARM: at91: remove at91_dt_initialize and machine init_early()
  ARM: at91: change board files into SoC files
  ARM: at91: remove at91_boot_soc
  ARM: at91: move alternative initial mapping to board-dt-sama5.c
  ARM: at91: merge all SOC_AT91SAM9xxx
  ARM: at91: at91rm9200: set idle and restart from rm9200_dt_device_init()
  ARM: digicolor: select syscon and timer
  ARM: zynq: Simplify SLCR initialization
  ARM: zynq: PM: Fixed simple typo.
  ARM: zynq: Setup default gpio number for Xilinx Zynq
  ARM: digicolor: add low level debug support
  ARM: initial support for Conexant Digicolor CX92755 SoC
  ARM: OMAP2+: Add dm816x hwmod support
  ARM: OMAP2+: Add clock domain support for dm816x
  ARM: OMAP2+: Add board-generic.c entry for ti81xx
  ARM: at91: pm: remove warning to remove SOC_AT91SAM9263 usage
  ARM: at91: remove unused mach/system_rev.h
  ARM: at91: stop using HAVE_AT91_DBGUx
  ARM: at91: fix ordering of SRAM and PM initialization
  ...
2015-02-17 09:27:54 -08:00
Olof Johansson 28111dda37 Third Round of Renesas ARM Based SoC Fixes for v3.19
* Instantiate GIC from C board code in legacy builds on r8a7790 and r8a73a4
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJUytABAAoJENfPZGlqN0++qrkP/R2n+rHBNvZTW4p88IZcZ37O
 7zRXCkcXLHHVfKp8XHEMrhH/Pc7uIonWgq3SIKHDlK9UwAvfOdLPj2CMGm7bN+Ea
 +fgT6Qe1UP9kgbsH1whovsR3CzjLDqxmlhfjTkrmu5UjFNGQuv/iFVkkzViSCDYd
 YkSIYxybAlH3Nd7xxNFG54LzjCPauY2V76JM76/3j24m+zxZverY8sN46PtKryGg
 /toQzuVeimpz4BtObXZAi7Y7eWvvYUtELGshTTGKBmtRhLWGZDrS+60KpMDVoKtK
 f135X2taKm2jIiKPXCPMQTOWsXBls1TuxIGssiIysPU6t5OCSuNd/M1RiKDhZhE3
 J4L4vCMq/Gn2XbYe2+O0PNkLxuWepSZ4VRzALZCPhP48CYGrazP63JWTnjROcC61
 5bxuUtWMUVHF52hEWf6bXEiAEBNZP7u8kBc02drsscQHM/N3SiFcIxK/nGlIVMjy
 Qt01fYR+zZZ2v5OhQHeEe7lBfUMnKA9+QLHR4dJ32oJvyAFiDImLsrEBiVlTDk47
 gYJXmqGp2GWgB1H2mDiopHg+ERsavK9P7FL9juYG3OdvFPFuQwktJDSpN+Y0GZMV
 wRADV2/ylZBw48DidX86TD3gwtV7gP995nHvQJ2nv+/Kjq58uR4AHwn0wVHPldCE
 cDf5IYwdvD0a42id6zb5
 =/Oq9
 -----END PGP SIGNATURE-----

Merge tag 'renesas-soc-fixes3-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes

Merge "Third Round of Renesas ARM Based SoC Fixes for v3.19" from Simon Horman:

* Instantiate GIC from C board code in legacy builds on r8a7790 and r8a73a4

* tag 'renesas-soc-fixes3-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r8a7790: Instantiate GIC from C board code in legacy builds
  ARM: shmobile: r8a73a4: Instantiate GIC from C board code in legacy builds

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-02-01 08:51:12 -08:00
Magnus Damm 77cf5166f2 ARM: shmobile: r8a7790: Instantiate GIC from C board code in legacy builds
As of commit 9a1091ef00 ("irqchip: gic: Support hierarchy irq
domain."), the Lager legacy board support is known to be broken.

The IRQ numbers of the GIC are now virtual, and no longer match the
hardcoded hardware IRQ numbers in the legacy platform board code.

To fix this issue specific to non-multiplatform r8a7790 and Lager:
 1) Instantiate the GIC from platform board code and also
 2) Skip over the DT arch timer as well as
 3) Force delay setup based on DT CPU frequency

With these 3 fixes in place interrupts on Lager are now unbroken.

Partially based on legacy GIC fix by Geert Uytterhoeven, thanks to
him for the initial work.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-01-29 17:52:38 +09:00
Magnus Damm 95abc9de78 ARM: shmobile: Fix is_e2 warning
Fix "is_e2" warning introduced by:

9ce3fa6 ARM: shmobile: rcar-gen2: Add CA7 arch_timer initialization for r8a7794

Only triggers on kernel configurations that have ARCH_ARM_TIMER=n.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-12-21 17:11:19 +09:00
Linus Torvalds 6cd94d5e57 ARM: SoC platform changes for 3.19
New and updated SoC support, notable changes include:
 
 * bcm: brcmstb SMP support
 * bcm: initial iproc/cygnus support
 * exynos: Exynos4415 SoC support
 * exynos: PMU and suspend support for Exynos5420
 * exynos: PMU support for Exynos3250
 * exynos: pm related maintenance
 * imx: new LS1021A SoC support
 * imx: vybrid 610 global timer support
 * integrator: convert to using multiplatform configuration
 * mediatek: earlyprintk support for mt8127/mt8135
 * meson: meson8 soc and l2 cache controller support
 * mvebu: Armada 38x CPU hotplug support
 * mvebu: drop support for prerelease Armada 375 Z1 stepping
 * mvebu: extended suspend support, now works on Armada 370/XP
 * omap: hwmod related maintenance
 * omap: prcm cleanup
 * pxa: initial pxa27x DT handling
 * rockchip: SMP support for rk3288
 * rockchip: add cpu frequency scaling support
 * shmobile: r8a7740 power domain support
 * shmobile: various small restart, timer, pci apmu changes
 * sunxi: Allwinner A80 (sun9i) earlyprintk support
 * ux500: power domain support
 
 Overall, a significant chunk of changes, coming mostly from
 the usual suspects: omap, shmobile, samsung and mvebu, all of
 which already contain a lot of platform specific code in
 arch/arm.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIVAwUAVIcjyGCrR//JCVInAQJJCRAA1Tm+HZGiAiTvXEAcm/T9tIA08uqtawHt
 cqyEAUyrnE8QxE4EhUd2pTw4EunVusqKF5EsDxOzw7b3ukUdLAWZE7bqBOSIJLqn
 hrfsQQ8dXLbyC7T/CHPnBVeM+pn9LiIc9qzpZ0YToiMnHBBI4vKFQntBjd31yoRE
 hN08I6AmDjQolOzzlqR1fuM0uZaKiHIcytdauTt3Vfqgg7FTHcTy3u1kClHTR1Lp
 m/KuDothGpR5OKjSnUQz7EO5V3KJEnaKey8z2xM1a7DLLAvJ6r2+DUaDopv9Dbz1
 W/V3H7fi5tLvillVa8xmlmzqWZbPc1xw8MWqvHZSWIMRZqloAHpC1VWKn0ZuH4SW
 5Bj4ubSrpYjJxjKYfrxtjmuzru3A2jWBNTSP5A4nsny0C3AUsXkfRmRS0VNdegF8
 sUdQ1MF8vEMpQT3QPH88+ccFHeIgqbcayhKqLPf7r8q0kwlym5N7Y2amU2A/O6qz
 +324r+yzfSA70VgJZ5EhXxWVDOPB4Lc8EtoWnH6T/kjncIMwzEsbEbyB3X1OaREW
 pVn3PNo06VjHLYoiHX+8G99pOFR/JZvaQs6jGCXLs+Orjp5WfP+kafkWqcB5GAKU
 Pfd3AQsl6rKAITdu0XsTdPiICNS4CmBiWYPepQsTa3pQaNgB7fwZNQKelNRIdGc+
 dF1lnQ7CXLQ=
 =lFoH
 -----END PGP SIGNATURE-----

Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform changes from Arnd Bergmann:
 "New and updated SoC support, notable changes include:

   - bcm:
        brcmstb SMP support
        initial iproc/cygnus support
   - exynos:
        Exynos4415 SoC support
        PMU and suspend support for Exynos5420
        PMU support for Exynos3250
        pm related maintenance
   - imx:
        new LS1021A SoC support
        vybrid 610 global timer support
   - integrator:
        convert to using multiplatform configuration
   - mediatek:
        earlyprintk support for mt8127/mt8135
   - meson:
        meson8 soc and l2 cache controller support
   - mvebu:
        Armada 38x CPU hotplug support
        drop support for prerelease Armada 375 Z1 stepping
        extended suspend support, now works on Armada 370/XP
   - omap:
        hwmod related maintenance
        prcm cleanup
   - pxa:
        initial pxa27x DT handling
   - rockchip:
        SMP support for rk3288
        add cpu frequency scaling support
   - shmobile:
        r8a7740 power domain support
        various small restart, timer, pci apmu changes
   - sunxi:
        Allwinner A80 (sun9i) earlyprintk support
   - ux500:
        power domain support

  Overall, a significant chunk of changes, coming mostly from the usual
  suspects: omap, shmobile, samsung and mvebu, all of which already
  contain a lot of platform specific code in arch/arm"

* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (187 commits)
  ARM: mvebu: use the cpufreq-dt platform_data for independent clocks
  soc: integrator: Add terminating entry for integrator_cm_match
  ARM: mvebu: add SDRAM controller description for Armada XP
  ARM: mvebu: adjust mbus controller description on Armada 370/XP
  ARM: mvebu: add suspend/resume DT information for Armada XP GP
  ARM: mvebu: synchronize secondary CPU clocks on resume
  ARM: mvebu: make sure MMU is disabled in armada_370_xp_cpu_resume
  ARM: mvebu: Armada XP GP specific suspend/resume code
  ARM: mvebu: reserve the first 10 KB of each memory bank for suspend/resume
  ARM: mvebu: implement suspend/resume support for Armada XP
  clk: mvebu: add suspend/resume for gatable clocks
  bus: mvebu-mbus: provide a mechanism to save SDRAM window configuration
  bus: mvebu-mbus: suspend/resume support
  clocksource: time-armada-370-xp: add suspend/resume support
  irqchip: armada-370-xp: Add suspend/resume support
  ARM: add lolevel debug support for asm9260
  ARM: add mach-asm9260
  ARM: EXYNOS: use u8 for val[] in struct exynos_pmu_conf
  power: reset: imx-snvs-poweroff: add power off driver for i.mx6
  ARM: imx: temporarily remove CONFIG_SOC_FSL from LS1021A
  ...
2014-12-09 14:38:28 -08:00
Laurent Pinchart 335204dfb8 ARM: shmobile: Remove FSF address from copyright headers
The information is already included in the COPYING file in the kernel
sources root directory, we don't want to modify all source files when
the FSF will move to a new address, and I'm tired of seeing the related
checkpatch.pl warnings.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-27 09:48:07 +09:00
Ulrich Hecht 9ce3fa6816 ARM: shmobile: rcar-gen2: Add CA7 arch_timer initialization for r8a7794
On E2, the arch timer is hooked up to a different clock, and the CA7's arch
timer CNTVOFF register must be initialized.

Based on work by Hisashi Nakamura.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-27 09:17:05 +09:00
Vincent Stehlé 14a5e92614 ARM: shmobile: rcar-gen2: update call to dma_contiguous_reserve_area
Commit 5ea3b1b2f8 'cma: add placement specifier for "cma=" kernel parameter'
adds a new 'fixed' parameter to dma_contiguous_reserve_area(). Update
rcar_gen2_reserve() accordingly.

This fixes the following compilation error:

  arch/arm/mach-shmobile/setup-rcar-gen2.c: In function ‘rcar_gen2_reserve’:
  arch/arm/mach-shmobile/setup-rcar-gen2.c:182:10: error: too few arguments to function ‘dma_contiguous_reserve_area’

Signed-off-by: Vincent Stehlé <vincent.stehle@laposte.net>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-06-23 09:15:58 +09:00
Geert Uytterhoeven ea2a0d581a ARM: shmobile: rcar-gen2: Remove useless copied section for LongTrail
Open Firmware in the CHRP LongTrail does not support plugging in ARM CPUs
in its PPC 603e/604e-compatible CPU socket ;-)

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-06-17 19:33:22 +09:00
Geert Uytterhoeven b69f47c00f ARM: shmobile: rcar-gen2: Use "1ULL" instead of "(u64)1"
Casts are evil

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-06-17 19:33:22 +09:00
Geert Uytterhoeven 83850b04ae ARM: shmobile: rcar-gen2: Update for of_get_flat_dt_prop() update
Commit 9d0c4dfedd ("of/fdt: update
of_get_flat_dt_prop in prep for libfdt") changed the function prototypes
of of_get_flat_dt_prop():
  - The return type was made const,
  - The last parameter was changed from "unsigned long *" to "int *".
and dt_mem_next_cell():
  - The second parameter was made const.

This causes the following compiler warnings:

arch/arm/mach-shmobile/setup-rcar-gen2.c: In function 'rcar_gen2_scan_mem':
arch/arm/mach-shmobile/setup-rcar-gen2.c:125:15: warning: initialization discards 'const' qualifier from pointer target type [enabled by default]
arch/arm/mach-shmobile/setup-rcar-gen2.c:142:2: warning: passing argument 3 of 'of_get_flat_dt_prop' from incompatible pointer type [enabled by default]
include/linux/of_fdt.h:53:20: note: expected 'int *' but argument is of type 'long unsigned int *'
arch/arm/mach-shmobile/setup-rcar-gen2.c:142:6: warning: assignment discards 'const' qualifier from pointer target type [enabled by default]
arch/arm/mach-shmobile/setup-rcar-gen2.c:144:3: warning: passing argument 3 of 'of_get_flat_dt_prop' from incompatible pointer type [enabled by default]
include/linux/of_fdt.h:53:20: note: expected 'int *' but argument is of type 'long unsigned int *'
arch/arm/mach-shmobile/setup-rcar-gen2.c:144:7: warning: assignment discards 'const' qualifier from pointer target type [enabled by default]
arch/arm/mach-shmobile/setup-rcar-gen2.c:152:3: warning: passing argument 2 of 'dt_mem_next_cell' from incompatible pointer type [enabled by default]
include/linux/of_fdt.h:69:12: note: expected 'const __be32 **' but argument is of type '__be32 **'
arch/arm/mach-shmobile/setup-rcar-gen2.c:153:3: warning: passing argument 2 of 'dt_mem_next_cell' from incompatible pointer type [enabled by default]
include/linux/of_fdt.h:69:12: note: expected 'const __be32 **' but argument is of type '__be32 **'

Update the variable types in rcar_gen2_scan_mem() to fix this.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Magnus Damm <damm+renesas@opensource.se>
[horms+renesas@verge.net.au: rebased]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-06-17 19:33:22 +09:00
Magnus Damm f8e819352d ARM: shmobile: Add shared R-Car Gen2 CMA reservation code
Add R-Car Gen2 CMA memory reservation code that can be
shared between multiple SoCs and boards. At this point
r8a7790 and r8a7791 are supported.

The top 256MiB of the legacy 32-bit physical memory space
is assigned to a separate CMA area that may be assigned
to various devices later on.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
[horms+renesas@verge.net.au: rebased]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-06-17 19:33:22 +09:00
Magnus Damm 62872989bd ARM: shmobile: Move rcar-gen2.h, cleanup r8a7790 case
Change location of rcar-gen2.h so it can be used as #include "rcar-gen2.h"
instead of the old style #include <mach/rcar-gen2.h>. Also clean up
the r8a7790 case to follow the same style as r8a7791.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-06-17 17:09:40 +09:00
Magnus Damm fd44aa5e57 ARM: shmobile: Move common.h
Change location for common.h so it can be used as #include "common.h"
instead of the old style #include <mach/common.h>.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-06-17 17:09:39 +09:00
Geert Uytterhoeven 835d737d66 ARM: shmobile: rcar-gen2: Cache Mode Monitor Register Value
The MD pins are sampled at reset time, hence the read value will always be
the same, and we can avoid the overhead of ioremapping the register on
every read.

Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-04-14 11:28:42 +09:00
Magnus Damm e7509f6eca ARM: shmobile: Remove __init from rcar_gen2_read_mode_pins()
Remove __init from rcar_gen2_read_mode_pins() to allow
it to be used after boot. For instance the R-Car Gen2
MD21 check is needed even in the case of CPU Hotplug.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-02-24 08:55:48 +09:00
Laurent Pinchart 4b5c211f9f ARM: shmobile: rcar-gen2: Initialize CCF before clock sources
When CONFIG_COMMON_CLOCK is enabled, call rcar_gen2_clocks_init() in the
timer init function to initialize the common clock framework before
initializing the clock sources. This will take care of clock
initialization when the r8a779[01] boards will be switched to
multiplatform kernels.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-19 16:34:05 +09:00
Ben Dooks 0fe35077a9 ARM: rcar-gen2: Do not setup timer in non-secure mode
If the system has been started in non-secure mode, then the ARM generic
timer is not configurable during the kernel initialisation. Currently
the only thing we can check for is if the timer has been correctly
configured during the boot process.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Reviewed-by: Ian Molton <ian.molton@codethink.co.uk>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-12 21:58:58 +09:00
Magnus Damm 50c517d92e ARM: shmobile: Break out R-Car Gen2 setup code
Move arch timer workaround code and boot mode pin
handling from setup-r8a7790.c to setup-rcar-gen2.c.

With this in place the same code can be used on
other R-Car Generation 2 devices such as r8a7791.

Signed-off-by: Magnus Damm <damm@opensource.se>
[horms+renesas@verge.net.au trivial rebase of board-lager.c
 for introduction of lager_add_standard_devices()]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-10-08 09:52:25 +09:00