Most of these relate to endianness problems, and are purely cosmetic.
But a couple of them were legit -- listen interval parsing and some of
the rate selection code would malfunction on BE systems.
There's still one cosmetic warning remaining, in the (admittedly) ugly
code in cw1200_spi.c. It's there because the hardware needs 16-bit SPI
transfers, but many SPI controllers only operate 8 bits at a time.
If there's a cleaner way of handling this, I'm all ears.
Signed-off-by: Solomon Peachy <pizza@shaftnet.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
goto after return is wrong.
The other code in this block needs to set an
error value then goto an error release block.
This one doesn't need to release anything and
was likely a copy/paste remainder.
Signed-off-by: Joe Perches <joe@perches.com>
Acked-By: Solomon Peachy <pizza@shaftnet.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This avoids problems when building on SPARC targets due to the driver
calling the bus abstraction layer 'sbus'. Not that any SBUS-sporting
SPARC targets are likely to have an SDIO controller, but this is the
correct thing to do.
See http://kisskb.ellerman.id.au/kisskb/buildresult/8846508/
Signed-off-by: Solomon Peachy <pizza@shaftnet.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>