Commit Graph

106705 Commits

Author SHA1 Message Date
Sebastian Ott d94260832d s390/pci: unify pci_iomap symbol exports
Since commit 8cfc99b583 ("s390: add pci_iomap_range") we use
EXPORT_SYMBOL for pci_iomap but EXPORT_SYMBOL_GPL for pci_iounmap.
Change the related functions to use EXPORT_SYMBOL like the asm-generic
variants do.

Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-02-27 17:50:07 +01:00
Sebastian Ott 1803ba2d7a s390/pci: fix [un]map_resources sequence
Commit 8cfc99b583 ("s390: add pci_iomap_range") introduced counters
to keep track of the number of mappings created. This revealed that
we don't have our internal mappings in order when using hotunplug or
resume from hibernate. This patch addresses both issues.

Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-02-27 17:50:04 +01:00
Juergen Gross b8f05c8803 x86/xen: correct bug in p2m list initialization
Commit 054954eb05 ("xen: switch to
linear virtual mapped sparse p2m list") introduced an error.

During initialization of the p2m list a p2m identity area mapped by
a complete identity pmd entry has to be split up into smaller chunks
sometimes, if a non-identity pfn is introduced in this area.

If this non-identity pfn is not at index 0 of a p2m page the new
p2m page needed is initialized with wrong identity entries, as the
identity pfns don't start with the value corresponding to index 0,
but with the initial non-identity pfn. This results in weird wrong
mappings.

Correct the wrong initialization by starting with the correct pfn.

Cc: stable@vger.kernel.org # 3.19
Reported-by: Stefan Bader <stefan.bader@canonical.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Tested-by: Stefan Bader <stefan.bader@canonical.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
2015-02-27 14:53:19 +00:00
Vineet Gupta 3240dd57e5 ARC: Fix thread_saved_pc()
The old implementation assumed that SP at the time of __switch_to() is
right above pt_regs which is almost certainly not the case as there will
be some stack build up between entry into kernel and leading up to
__switch_to

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-02-27 10:59:34 +05:30
Vineet Gupta 13648b0118 ARC: Fix KSTK_ESP()
/proc/<pid>/maps currently don't annotate stack vma with "[stack]"
This is because KSTK_ESP ie expected to return usermode SP of tsk while
currently it returns the kernel mode SP of a sleeping tsk.

While the fix is trivial, we also need to adjust the ARC kernel stack
unwinder to not use KSTK_SP and friends any more.

Cc: <stable@vger.kernel.org>
Reported-and-suggested-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-02-27 10:48:23 +05:30
Vineet Gupta ceed97ab4f ARC: perf: Enable generic software events
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-02-27 10:15:01 +05:30
Vineet Gupta 3a51d50f42 ARC: Make arc_unwind_core accessible externally
The arc unwinder can also be used for perf callchains.

Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-02-27 10:15:00 +05:30
Chanwoo Choi ace283a04a ARM: EXYNOS: Fix wrong hwirq of RTC interrupt for Exynos3250 SoC
This patch fixes wrong hwirq of RTC irq for Exynos3250 SoC. When entering
suspend state, 'enable_irq_wake fail' happen because of the mismatch of RTC hwirq.

[  429.200937] Freezing user space processes ... (elapsed 0.002 seconds) done.
[  429.203383] Freezing remaining freezable tasks ... (elapsed 0.000 seconds) done.
[  429.209914] Suspending console(s) (use no_console_suspend to debug)
[  429.370685] wake enabled for irq 65
[  429.370837] wake enabled for irq 64
[  429.370868] wake enabled for irq 79
...
[  429.372120] s3c-rtc 10070000.rtc: enable_irq_wake failed

Fixes: a4f582f5c5 (ARM: EXYNOS: Add exynos3250 suspend-to-ram support)

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-02-27 05:58:19 +09:00
Krzysztof Kozlowski ca489c58ef ARM: EXYNOS: Don't use LDREX and STREX after disabling cache coherency
During CPU shutdown the exynos_cpu_power_down() is called after
disabling cache coherency and it uses LDREX and STREX instructions (by
calling of_machine_is_compatible() -> kobject_get() -> kref_get()).

The LDREX and STREX should not be used after disabling the cache
coherency so just use soc_is_exynos().

Fixes: adc548d77c ("ARM: EXYNOS: Use MCPM call-backs to support S2R
on exynos5420")

Reported-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: <stable@vger.kernel.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-02-27 05:50:52 +09:00
Andrzej Hajda 2d2c9a8d0a ARM: dts: add display power domain for exynos5250
The patch adds domain definition and references to it in appropriate devices.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
[mszyprow: rebased onto generic power domains dt bindings]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-02-27 05:29:32 +09:00
Marek Szyprowski c950ea6807 ARM: dts: add 'hdmi' clock to mixer nodes for exynos5250 and exynos5420
Mixed block needs to control hdmi clock to properly perform power on/off
operation, so add 'hdmi' clock also to mixer nodes.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-02-27 05:29:30 +09:00
Tomasz Stanislawski 7daa0be165 ARM: dts: enable hdmi support for exynos4210-universal_c210
This patch adds configuration of hw modules required to enable HDMI
support on Universal C210 board.

Signed-off-by: Tomasz Stanislawski <t.stanislaws@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-02-27 05:29:30 +09:00
Marek Szyprowski 2561658b9c ARM: dts: enable hdmi support for exynos4412-odroid-common
This patch adds nodes specific to Exynos4412 based Odroid X/X2/U2/U3
boards required for enabling HDMI display.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-02-27 05:29:30 +09:00
Marek Szyprowski ec459c0c77 ARM: dts: add dependency between TV and LCD0 power domains for exynos4
TV Mixer needs both TV and LCD0 domains enabled to be fully operational.
This dependency is modelled by making TV power domains a sub-domain of
LCD0 power domain.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-02-27 05:27:28 +09:00
Marek Szyprowski ed80d4cab7 ARM: dts: add hdmi related nodes for exynos4 SoCs
This patch adds entries for HDMI, Mixer and i2c with hdmi-phy modules
found in Exynos 4210 and 4x12 SoCs.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-02-27 05:27:28 +09:00
Marek Szyprowski 0f7807518f ARM: EXYNOS: add support for sub-power domains
This patch adds support for making one power domain a sub-domain of
other domain. This is useful for modeling power dependences for devices
like TV Mixer or Camera ISP, which needs to have more than one power
domain enabled to be operational.

Based on previous work by Amit Daniel Kachhap <amit.daniel@samsung.com>.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-02-27 05:26:57 +09:00
Lukasz Majewski 9843a22360 ARM: dts: Provide dt bindings identical for Exynos TMU
Presented device tree bindings provide data already hardcoded in the
exynos_tmu_data.c file.
After this commit, it should be possible to reuse common thermal core
framework in Exynos SoCs.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-02-27 05:24:54 +09:00
Lukasz Majewski 6562504dfe ARM: dts: Trip points and sensor configuration data for exynos5440
This commit provides information about Exynos5440 device configuration.
Previously this information was available in exynos_tmu_data.c file.
Now it is available in the device tree.
Such approach allows reusing some common code for thermal.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-02-27 05:22:58 +09:00
Lukasz Majewski 328829a6ad ARM: dts: define default thermal-zones for exynos4
Trip points corresponding to the one defined in the exynos_tmu_data.c
for Exynos4 have been included.
This thermal-zones attribute is afterwards reused for Exynos4210,
Exynos4412 and Exynos5250.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-02-27 05:22:58 +09:00
Lukasz Majewski b350de6fa9 ARM: dts: default trip points definition for exynos5420
This code groups in one place default settings of trip points.
It is used in SoCs with multiple instances of TMU sensor.

Separate device tree file prevents from multiple copying of the
same data.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-02-27 05:22:56 +09:00
Lukasz Majewski 09a1247a89 ARM: dts: add TMU default definitions for exynos4412
Exynos 4 and 5 family of SoCs uses almost identical TMU sensor to
measure the on chip temperature. For this reason it is possible to
group TMU configuration parameters in one dts file.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-02-27 05:22:56 +09:00
Lukasz Majewski bf4a0bed36 ARM: dts: Adding CPU cooling binding for Exynos SoCs
Presented patch aims to move data necessary for correct CPU cooling device
configuration from exynos_tmu_data.c to device tree.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-02-27 05:22:56 +09:00
Lukasz Majewski 233e274ac7 ARM: dts: Enable TMU for exynos4412-odriod-common
This commit enables TMU IP block on the Exynos4412 Odroid based
devices such as Odroid U3.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-02-27 05:22:55 +09:00
Lukasz Majewski a59acc17a8 ARM: dts: Add LDO10 for TMU for exynos4412-odroid-common
This patch adds LDO10 regulator node for TMU.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-02-27 05:22:55 +09:00
Lukasz Majewski 907c10fcc5 ARM: dts: Enable TMU for exynos4210-trats
The thermal IP block (Thermal Management Unit) called TMU has been
enabled in this device.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-02-27 05:22:55 +09:00
Marc Zyngier f6242cac10 arm64: Fix text patching logic when using fixmap
Patch 2f896d5866 ("arm64: use fixmap for text patching") changed
the way we patch the kernel text, using a fixmap when the kernel or
modules are flagged as read only.

Unfortunately, a flaw in the logic makes it fall over when patching
modules without CONFIG_DEBUG_SET_MODULE_RONX enabled:

[...]
[   32.032636] Call trace:
[   32.032716] [<fffffe00003da0dc>] __copy_to_user+0x2c/0x60
[   32.032837] [<fffffe0000099f08>] __aarch64_insn_write+0x94/0xf8
[   32.033027] [<fffffe000009a0a0>] aarch64_insn_patch_text_nosync+0x18/0x58
[   32.033200] [<fffffe000009c3ec>] ftrace_modify_code+0x58/0x84
[   32.033363] [<fffffe000009c4e4>] ftrace_make_nop+0x3c/0x58
[   32.033532] [<fffffe0000164420>] ftrace_process_locs+0x3d0/0x5c8
[   32.033709] [<fffffe00001661cc>] ftrace_module_init+0x28/0x34
[   32.033882] [<fffffe0000135148>] load_module+0xbb8/0xfc4
[   32.034044] [<fffffe0000135714>] SyS_finit_module+0x94/0xc4
[...]

This is triggered by the use of virt_to_page() on a module address,
which ends to pointing to Nowhereland if you're lucky, or corrupt
your precious data if not.

This patch fixes the logic by mimicking what is done on arm:
- If we're patching a module and CONFIG_DEBUG_SET_MODULE_RONX is set,
  use vmalloc_to_page().
- If we're patching the kernel and CONFIG_DEBUG_RODATA is set,
  use virt_to_page().
- Otherwise, use the provided address, as we can write to it directly.

Tested on 4.0-rc1 as a KVM guest.

Reported-by: Richard W.M. Jones <rjones@redhat.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Laura Abbott <lauraa@codeaurora.org>
Tested-by: Richard W.M. Jones <rjones@redhat.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2015-02-26 18:34:27 +00:00
Ard Biesheuvel 0eee0fbd41 arm64: crypto: increase AES interleave to 4x
This patch increases the interleave factor for parallel AES modes
to 4x. This improves performance on Cortex-A57 by ~35%. This is
due to the 3-cycle latency of AES instructions on the A57's
relatively deep pipeline (compared to Cortex-A53 where the AES
instruction latency is only 2 cycles).

At the same time, disable inline expansion of the core AES functions,
as the performance benefit of this feature is negligible.

  Measured on AMD Seattle (using tcrypt.ko mode=500 sec=1):

  Baseline (2x interleave, inline expansion)
  ------------------------------------------
  testing speed of async cbc(aes) (cbc-aes-ce) decryption
  test 4 (128 bit key, 8192 byte blocks): 95545 operations in 1 seconds
  test 14 (256 bit key, 8192 byte blocks): 68496 operations in 1 seconds

  This patch (4x interleave, no inline expansion)
  -----------------------------------------------
  testing speed of async cbc(aes) (cbc-aes-ce) decryption
  test 4 (128 bit key, 8192 byte blocks): 124735 operations in 1 seconds
  test 14 (256 bit key, 8192 byte blocks): 92328 operations in 1 seconds

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2015-02-26 18:31:46 +00:00
Feng Kan 6910fa16db arm64: enable PTE type bit in the mask for pte_modify
Caught during Trinity testing. The pte_modify does not allow
modification for PTE type bit. This cause the test to hang
the system. It is found that the PTE can't transit from an
inaccessible page (b00) to a valid page (b11) because the mask
does not allow it. This happens when a big block of mmaped
memory is set the PROT_NONE, then the a small piece is broken
off and set to PROT_WRITE | PROT_READ cause a huge page split.

Signed-off-by: Feng Kan <fkan@apm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2015-02-26 18:30:12 +00:00
Yingjoe Chen 06ff87bae8 arm64: mm: remove unused functions and variable protoypes
The functions __cpu_flush_user_tlb_range and __cpu_flush_kern_tlb_range
were removed in commit fa48e6f780 'arm64: mm: Optimise tlb flush logic
where we have >4K granule'. Global variable cpu_tlb was never used in
arm64.

Remove them.

Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2015-02-26 18:25:38 +00:00
Will Deacon f5e0a12ca2 arm64: psci: move psci firmware calls out of line
An arm64 allmodconfig fails to build with GCC 5 due to __asmeq
assertions in the PSCI firmware calling code firing due to mcount
preambles breaking our assumptions about register allocation of function
arguments:

  /tmp/ccDqJsJ6.s: Assembler messages:
  /tmp/ccDqJsJ6.s:60: Error: .err encountered
  /tmp/ccDqJsJ6.s:61: Error: .err encountered
  /tmp/ccDqJsJ6.s:62: Error: .err encountered
  /tmp/ccDqJsJ6.s:99: Error: .err encountered
  /tmp/ccDqJsJ6.s💯 Error: .err encountered
  /tmp/ccDqJsJ6.s:101: Error: .err encountered

This patch fixes the issue by moving the PSCI calls out-of-line into
their own assembly files, which are safe from the compiler's meddling
fingers.

Reported-by: Andy Whitcroft <apw@canonical.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2015-02-26 18:23:53 +00:00
Nathan Lynch e1b6b6ce55 arm64: vdso: minor ABI fix for clock_getres
The vdso implementation of clock_getres currently returns 0 (success)
whenever a null timespec is provided by the caller, regardless of the
clock id supplied.

This behavior is incorrect.  It should fall back to syscall when an
unrecognized clock id is passed, even when the timespec argument is
null.  This ensures that clock_getres always returns an error for
invalid clock ids.

Signed-off-by: Nathan Lynch <nathan_lynch@mentor.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2015-02-26 18:13:51 +00:00
Geert Uytterhoeven 4a3a6f8669 ARM: multi_v7_defconfig: Enable shmobile platforms
Enable support for shmobile platforms that became multi-platform aware.
Several non-critical drivers and subsystems are built as modules, to keep
kernel size reasonable.

Tested on:
  - r8a73a4/ape6evm:
      - U-Boot fails with "Error: unrecognized/unsupported machine ID",
      - kexec works.
  - r8a7740/armadillo:
      - Hermit boot loader fails (larger image, more memory corruption),
      - kexec works.
  - r8a7791/koelsch,
  - sh73a0/kzm9g:
      - zImage+DTB from U-Boot needs CONFIG_ARM_ATAG_DTB_COMPAT=n,
      - kexec works.
  - am335x/boneblack.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-02-26 16:36:09 +01:00
Christian Borntraeger fb3d1c085c s390: let the compiler do page clearing
The hardware folks told me that for page clearing "when you exactly
know what to do, hand written xc+pfd is usally faster then mvcl for
page clearing, as it saves millicode overhead and parameter parsing
and checking" as long as you dont need the cache bypassing.
Turns out that gcc already does a proper xc,pfd loop.

A small test on z196 that does

buff = mmap(NULL, bufsize,PROT_EXEC|PROT_WRITE|PROT_READ,AP_PRIVATE| MAP_ANONYMOUS,0,0);
for ( i = 0; i < bufsize; i+= 256)
    buff[i] = 0x5;

gets 20% faster (touches every cache line of a page)

and

buff = mmap(NULL, bufsize,PROT_EXEC|PROT_WRITE|PROT_READ,AP_PRIVATE| MAP_ANONYMOUS,0,0);
for ( i = 0; i < bufsize; i+= 4096)
    buff[i] = 0x5;

is within noise ratio (touches one cache line of a page).

As the clear_page is usually called for first memory accesses
we can assume that at least one cache line is used afterwards,
so this change should be always better.
Another benchmark, a make -j 40 of my testsuite in tmpfs with
hot caches on a 32cpu system:

 -- unpatched --       --  patched  --
real     0m1.017s     real     0m0.994s   (~2% faster, but in noise)
user     0m5.339s     user     0m5.016s   (~6% faster)
sys      0m0.691s     sys      0m0.632s   (~8% faster)

Let use the same define to memset as the asm-generic variant

Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-02-26 09:24:49 +01:00
Sebastian Ott f0483044c1 s390/pci: fix possible information leak in mmio syscall
Make sure that even in error situations we do not use copy_to_user
on uninitialized kernel memory.

Cc: stable@vger.kernel.org # 3.19+
Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-02-26 09:24:48 +01:00
Heiko Carstens 72dace969d s390/jump label: improve and fix sanity check
Fix the output of the jump label sanity check and also print the
code pattern that is supposed to be written to the jump label.

Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-02-26 09:24:46 +01:00
Heiko Carstens 6f367769e3 s390/jump label: add missing jump_label_apply_nops() call
When modules are loaded we want to transform the compile time generated
nops into runtime generated nops. Otherwise the jump label sanity check
will detect invalid code when trying to patch code.

Fixes this crash:

Jump label code mismatch at __rds_conn_create+0x3c/0x720
Found:    c0 04 00 00 00 01
Expected: c0 04 00 00 00 00
Kernel panic - not syncing: Corrupted kernel text
CPU: 0 PID: 10 Comm: migration/0 Not tainted 3.19.0-01935-g006610f #14
Call Trace:
<0000000000113260> show_trace+0xf8/0x158)
<000000000011332a> show_stack+0x6a/0xe8
<000000000069fd64> dump_stack+0x7c/0xd8
<0000000000698d54> panic+0xe4/0x288
<00000000006984c6> jump_label_bug.isra.2+0xbe/0xc001
<000000000011200c> __jump_label_transform+0x94/0xc8

Reported-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-02-26 09:24:45 +01:00
Kishon Vijay Abraham I 0717103e65 ARM: DRA7: hwmod_data: Fix hwmod data for pcie
Fixed hwmod data for pcie by having the correct module mode offset.
Previously this module mode offset was part of pcie PHY which was wrong.
Now this module mode offset was moved to pcie hwmod and removed the hwmod data
for pcie phy. While at that renamed pcie_hwmod to pciess_hwmod in order
to match with the name given in TRM.

This helps to get rid of the following warning
"omap_hwmod: pcie1: _wait_target_disable failed"

[Grygorii.Strashko@linaro.org: Found the issue that actually caused
 "omap_hwmod: pcie1: _wait_target_disable failed"]
Signed-off-by: Grygorii Strashko <Grygorii.Strashko@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2015-02-26 00:02:28 -07:00
Peter Ujfalusi 6931795238 ARM: omap2+: omap_hwmod: Set unique lock_class_key per hwmod
Add struct lock_class_key to omap_hwmod struct and use it to set unique
lockdep class per hwmod.
This will ensure that lockdep will know that each omap_hwmod->_lock should
be treated as separate class and will not give false warning about deadlock
or other issues due to nested use of hwmods.
DRA7x's ATL hwmod is one example for this since McASP can select ATL clock
as functional clock, which will trigger nested oh->_lock usage. This will
trigger false warning from lockdep validator as it is dealing with classes
and for it all hwmod clocks are the same class.

Suggested-by: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2015-02-26 00:00:51 -07:00
Arnd Bergmann 6af714b069 Fixes for various omap devices. It's all dts and defconfig
changes for this set:
 
 - Fix wrong DMA properties for dma to avoid them getting
   copied wrong again before we start actually using them
 
 - USB fixes to revert the extcon changes as the driver did not
   get merged yet and cause issues
 
 - Omap5 and dra7 fixes to boot from sata
 
 - Fix few am437x issues for i2c and pinctrl
 
 - Fix beaglebone for hardwared USB configuration
 
 - Defconfig changes for NAND, SATA and TPS62362
 
 - Fix n900 i2c numbering for legacy user space and smc91x
   register offset so it works also for qemu
 
 - Fix incomplete USB configuration for dm816x
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Merge tag 'fixes-v4.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

Fixes for various omap devices. It's all dts and defconfig
changes for this set:

- Fix wrong DMA properties for dma to avoid them getting
  copied wrong again before we start actually using them

- USB fixes to revert the extcon changes as the driver did not
  get merged yet and cause issues

- Omap5 and dra7 fixes to boot from sata

- Fix few am437x issues for i2c and pinctrl

- Fix beaglebone for hardwared USB configuration

- Defconfig changes for NAND, SATA and TPS62362

- Fix n900 i2c numbering for legacy user space and smc91x
  register offset so it works also for qemu

- Fix incomplete USB configuration for dm816x

* tag 'fixes-v4.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: am335x-bone*: usb0 is hardwired for peripheral
  ARM: dts: dra7x-evm: beagle-x15: Fix USB Host
  ARM: omap2plus_defconfig: Fix SATA boot
  ARM: omap2plus_defconfig: Enable OMAP NAND BCH driver
  ARM: dts: dra7: Correct the dma controller's property names
  ARM: dts: omap5: Correct the dma controller's property names
  ARM: dts: omap4: Correct the dma controller's property names
  ARM: dts: omap3: Correct the dma controller's property names
  ARM: dts: omap2: Correct the dma controller's property names
  ARM: dts: am437x-idk: fix sleep pinctrl state
  ARM: omap2plus_defconfig: enable TPS62362 regulator
  ARM: dts: am437x-idk: fix TPS62362 i2c bus
  ARM: dts: n900: Fix offset for smc91x ethernet
  ARM: dts: n900: fix i2c bus numbering
  ARM: dts: Fix USB dts configuration for dm816x
  ARM: dts: OMAP5: Fix SATA PHY node
  ARM: dts: DRA7: Fix SATA PHY node
2015-02-25 17:12:35 +01:00
Sudeep Holla 7934d69abf arm64: Add L2 cache topology to ARM Ltd boards/models
Commit 5d425c1865 ("arm64: kernel: add support for cpu cache
information") adds cacheinfo support for ARM64. Since there's no
architectural way of detecting the cpus that share particular cache,
device tree can be used and the core cacheinfo already supports the
same.

This patch adds the L2 cache topology on Juno board, FVP/RTSM and
foundation models.

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-02-25 17:12:21 +01:00
Ingo Molnar e3eff6fe7d Merge branch 'clockevents/4.0-rc1' of git://git.linaro.org/people/daniel.lezcano/linux into timers/urgent
Pull clockevents driver fixes from Daniel Lezcano:

  - Fix the Kconfig to prevent the asm9260 timer to be compiled with
    allyesconfig with sparc/sparc64 (Daniel Lezcano)

  - Reorder the mtk driver init sequence in order to prevent a potential race
    when the clock is registered before the irq handler is set (Matthias Brugger)

  - Fix a section mismatch for the pxa driver (Robert Jarzmik)

Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-25 14:44:45 +01:00
Daniel Lezcano a8b1b9fc92 clockevents: asm9260: Fix compilation error with sparc/sparc64 allyesconfig
The Kconfig options for the asm9260 timer is wrong as it can be selected by
another platform with allyes config and thus leading to a compilation failure
as some non arch related code is pulled by the compilation.

Fix this by having the platform Kconfig to select the timer as it is done for
the others drivers.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Oleksij Rempel <linux@rempel-privat.de>

Conflicts:
	drivers/clocksource/Kconfig
2015-02-25 10:28:22 +01:00
Robert Nelson 67fd14b3ec ARM: dts: am335x-bone*: usb0 is hardwired for peripheral
Fixes: http://bugs.elinux.org/issues/127

the bb.org community was seeing random reboots before this change.

Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-02-24 10:35:44 -08:00
Roger Quadros addfcde7c4 ARM: dts: dra7x-evm: beagle-x15: Fix USB Host
In commit 87517d26d8 ("ARM: dts: dra7-evm: Add extcon nodes for USB")
we enabled Extcon USB gpio to tackle the USB ID pin and get
peripheral mode to work.

But the extcon-gpio-usb driver [1] didn't make it into v4.0
and this makes the USB driver defer probe indefinitely breaking
USB Host functionality.

As a temporary fix we remove the extcon handle from the
USB controller and add it back when the extcon driver
merges in v4.1.

[1] - https://lkml.org/lkml/2015/2/2/187

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-02-24 10:35:43 -08:00
Roger Quadros acd83a1652 ARM: omap2plus_defconfig: Fix SATA boot
SATA operation depends on PIPE3 PHY and if we want
to boot from SATA drives, we have to have the PIPE3 PHY
driver built-in.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-02-24 10:35:43 -08:00
Roger Quadros f8c360588c ARM: omap2plus_defconfig: Enable OMAP NAND BCH driver
Without this NAND doesn't work on most EVMs.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-02-24 10:35:43 -08:00
Peter Ujfalusi 08d9b327e6 ARM: dts: dra7: Correct the dma controller's property names
According to the Documentation/devicetree/bindings/dma/dma.txt the
dma-channels and dma-requests property should not have '#'.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-02-24 10:35:43 -08:00
Peter Ujfalusi 951c1c04c6 ARM: dts: omap5: Correct the dma controller's property names
According to the Documentation/devicetree/bindings/dma/dma.txt the
dma-channels and dma-requests property should not have '#'.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-02-24 10:35:43 -08:00
Peter Ujfalusi 24ac177049 ARM: dts: omap4: Correct the dma controller's property names
According to the Documentation/devicetree/bindings/dma/dma.txt the
dma-channels and dma-requests property should not have '#'.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-02-24 10:35:43 -08:00
Peter Ujfalusi 7e8d25d596 ARM: dts: omap3: Correct the dma controller's property names
According to the Documentation/devicetree/bindings/dma/dma.txt the
dma-channels and dma-requests property should not have '#'.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-02-24 10:35:43 -08:00
Peter Ujfalusi caa73a4688 ARM: dts: omap2: Correct the dma controller's property names
According to the Documentation/devicetree/bindings/dma/dma.txt the
dma-channels and dma-requests property should not have '#'.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-02-24 10:35:43 -08:00
Felipe Balbi ee5d9cd2b3 ARM: dts: am437x-idk: fix sleep pinctrl state
we have i2c0 sleep pinctrl state but were passing
default state anyhow. Fix that.

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-02-24 10:35:43 -08:00
Felipe Balbi 57fd4e5d38 ARM: omap2plus_defconfig: enable TPS62362 regulator
This regulator is used on AM437x Industrial Development Kit.

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-02-24 10:35:43 -08:00
Felipe Balbi 1236044825 ARM: dts: am437x-idk: fix TPS62362 i2c bus
As it turns out, tps62362 is actually on I2C bus0,
not bus1. This has gone unnoticed because Linux
doesn't use (as of now) that regulator at all, it's
setup by the bootloader and left as is.

While at that, also add missing reg property for
our regulator.

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-02-24 10:35:43 -08:00
Pali Rohár cb9071d4bb ARM: dts: n900: Fix offset for smc91x ethernet
Offset for smc91x must be zero otherwise smc91x linux kernel driver does not
detect smc91x ethernet hardware in qemu N900 machine.

The 0x300 offset was used to supress a warning the smsc911x
driver produces about non-standard offset as 0x300 seems to
be the EEPROM default. As only three address lines are
connected both 0 and 0x300 will work just fine with 0 being
correct. The warning about the non-standard offset can be
fixed by writing to EEPROM as that's needed in any case to
set the MAC address.

Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
[tony@atomide.com: updated comments, just use 0 instead of 0x0]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-02-24 10:35:43 -08:00
Ivaylo Dimitrov 1861cda0de ARM: dts: n900: fix i2c bus numbering
With legacy boot i2c buses on Nokia N900 are numbered i2c1, i2c2 and i2c3.
Commit 20b80942ef ("ARM: dts: OMAP3+: Add i2c aliases") fixed the
numbering with DT boot, but introduced a regression on N900 - aliases
become i2c0, i2c1 and i2c2. Fix that by providing the correct aliases in
the board dts.

Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Tested-by: Pali Rohár <pali.rohar@gmail.com>
Acked-by: Nishanth Menon <nm@ti.com>
[tony@atomide.com: this is needed for legacy user space to work]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-02-24 10:35:43 -08:00
Linus Torvalds b24e2bdde4 xen: regression and bug fixes for 4.0-rc1
- Fix two regression introduced in 4.0-rc1 affecting PV/PVH guests in
   certain configurations.
 - Prevent pvscsi frontends bypassing backend checks.
 - Allow privcmd hypercalls to be preempted even on kernel with
   voluntary preemption.  This fixes soft-lockups with long running
   toolstack hypercalls (e.g., when creating/destroying large domains).
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Merge tag 'stable/for-linus-4.0-rc1-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip

Pull xen bugfixes from David Vrabel:
 "Xen regression and bug fixes for 4.0-rc1

   - Fix two regressions introduced in 4.0-rc1 affecting PV/PVH guests
     in certain configurations.

   - Prevent pvscsi frontends bypassing backend checks.

   - Allow privcmd hypercalls to be preempted even on kernel with
     voluntary preemption.  This fixes soft-lockups with long running
     toolstack hypercalls (e.g., when creating/destroying large
     domains)"

* tag 'stable/for-linus-4.0-rc1-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip:
  x86/xen: Initialize cr4 shadow for 64-bit PV(H) guests
  xen-scsiback: mark pvscsi frontend request consumed only after last read
  x86/xen: allow privcmd hypercalls to be preempted
  x86/xen: Make sure X2APIC_ENABLE bit of MSR_IA32_APICBASE is not set
2015-02-24 09:18:48 -08:00
Linus Torvalds 84257ce6b7 Lguest weird config build fix, and update to the documentation.
Thanks,
 Rusty.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux

Pull lguest fixes from Rusty Russell:
 "Lguest weird config build fix, and update to the documentation"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux:
  lguest: update help text.
  lguest: now depends on PCI
2015-02-24 09:14:43 -08:00
Tony Lindgren a54879a008 ARM: dts: Fix USB dts configuration for dm816x
Commit 7800064ba5 ("ARM: dts: Add basic dm816x device tree
configuration") added basic devices for dm816x, but I was not able
to test the USB completely because of an unconfigured USB phy, and
I only tested it to make sure the Mentor chips are detected and
clocked without a phy.

After testing the USB with actual devices I noticed a few issues
that should be fixed to avoid confusion:

- The USB id pin on dm8168-evm is hardwired and can be changed
  only by software. As there are two USB-A type connectors, let's
  start both in host mode instead of otg.

- The Mentor core is configured in such a way on dm8168-evm that
  it's not capable of multipoint at least on revision c board
  that I have.

- We need ranges for the syscon to properly set up the phy as
  children of the SCM syscon area.

- Let's not disable the second interface, the board specific
  dts files can do that if really needed. Most boards should
  just keep it enabled to ensure the device is idled properly.

Note that also a phy and several musb fixes are still needed to
make the USB to work properly in addition to this fix.

Cc: Brian Hutchinson <b.hutchman@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-02-24 08:48:52 -08:00
Roger Quadros a0182724ab ARM: dts: OMAP5: Fix SATA PHY node
The sata_ref_clk is a reference clock to the SATA phy.
This fixes SATA malfunction across suspend/resume or when
SATA driver is used as a module.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-02-24 08:16:49 -08:00
Roger Quadros 773c5a0fca ARM: dts: DRA7: Fix SATA PHY node
The sata_ref_clk is a reference clock to the SATA phy.
This fixes SATA malfunction across suspend/resume or when
SATA driver is used as a module.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-02-24 08:15:53 -08:00
James Hogan c2996cb29b metag: Fix KSTK_EIP() and KSTK_ESP() macros
The KSTK_EIP() and KSTK_ESP() macros should return the user program
counter (PC) and stack pointer (A0StP) of the given task. These are used
to determine which VMA corresponds to the user stack in
/proc/<pid>/maps, and for the user PC & A0StP in /proc/<pid>/stat.

However for Meta the PC & A0StP from the task's kernel context are used,
resulting in broken output. For example in following /proc/<pid>/maps
output, the 3afff000-3b021000 VMA should be described as the stack:

  # cat /proc/self/maps
  ...
  100b0000-100b1000 rwxp 00000000 00:00 0          [heap]
  3afff000-3b021000 rwxp 00000000 00:00 0

And in the following /proc/<pid>/stat output, the PC is in kernel code
(1074234964 = 0x40078654) and the A0StP is in the kernel heap
(1335981392 = 0x4fa17550):

  # cat /proc/self/stat
  51 (cat) R ... 1335981392 1074234964 ...

Fix the definitions of KSTK_EIP() and KSTK_ESP() to use
task_pt_regs(tsk)->ctx rather than (tsk)->thread.kernel_context. This
gets the registers from the user context stored after the thread info at
the base of the kernel stack, which is from the last entry into the
kernel from userland, regardless of where in the kernel the task may
have been interrupted, which results in the following more correct
/proc/<pid>/maps output:

  # cat /proc/self/maps
  ...
  0800b000-08070000 r-xp 00000000 00:02 207        /lib/libuClibc-0.9.34-git.so
  ...
  100b0000-100b1000 rwxp 00000000 00:00 0          [heap]
  3afff000-3b021000 rwxp 00000000 00:00 0          [stack]

And /proc/<pid>/stat now correctly reports the PC in libuClibc
(134320308 = 0x80190b4) and the A0StP in the [stack] region (989864576 =
0x3b002280):

  # cat /proc/self/stat
  51 (cat) R ... 989864576 134320308 ...

Reported-by: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
Reported-by: Vineet Gupta <Vineet.Gupta1@synopsys.com>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: linux-metag@vger.kernel.org
Cc: <stable@vger.kernel.org> # v3.9+
2015-02-24 12:54:21 +00:00
Yannick Guerrini 579deee571 x86/platform/intel-mid: Fix trivial printk message typo in intel_mid_arch_setup()
Change 'Uknown' to 'Unknown'

Signed-off-by: Yannick Guerrini <yguerrini@tomshardware.fr>
Cc: trivial@kernel.org
Link: http://lkml.kernel.org/r/1424710358-10140-1-git-send-email-yguerrini@tomshardware.fr
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-24 08:52:37 +01:00
Paolo Bonzini 4ff6f8e61e KVM: emulate: fix CMPXCHG8B on 32-bit hosts
This has been broken for a long time: it broke first in 2.6.35, then was
almost fixed in 2.6.36 but this one-liner slipped through the cracks.
The bug shows up as an infinite loop in Windows 7 (and newer) boot on
32-bit hosts without EPT.

Windows uses CMPXCHG8B to write to page tables, which causes a
page fault if running without EPT; the emulator is then called from
kvm_mmu_page_fault.  The loop then happens if the higher 4 bytes are
not 0; the common case for this is that the NX bit (bit 63) is 1.

Fixes: 6550e1f165
Fixes: 16518d5ada
Cc: stable@vger.kernel.org   # 2.6.35+
Reported-by: Erik Rull <erik.rull@rdsoftware.de>
Tested-by: Erik Rull <erik.rull@rdsoftware.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-02-23 22:28:48 +01:00
Radim Krčmář 21bc8dc5b7 KVM: VMX: fix build without CONFIG_SMP
'apic' is not defined if !CONFIG_X86_64 && !CONFIG_X86_LOCAL_APIC.
Posted interrupt makes no sense without CONFIG_SMP, and
CONFIG_X86_LOCAL_APIC will be set with it.

Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-02-23 22:28:48 +01:00
Wei Huang 91314cb005 arm/arm64: KVM: Add exit reaons to kvm_exit event tracing
This patch extends trace_kvm_exit() to include KVM exit reasons
(i.e. EC of HSR). The tracing function then dumps both exit reason
and PC of vCPU, shown as the following. Tracing tools can use this
new exit_reason field to better understand the behavior of guest VMs.

886.301252: kvm_exit:             HSR_EC: 0x0024, PC: 0xfffffe0000506b28

Signed-off-by: Wei Huang <wei@redhat.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2015-02-23 22:28:48 +01:00
Jan Kiszka a050dfb21c ARM: KVM: Fix size check in __coherent_cache_guest_page
The check is supposed to catch page-unaligned sizes, not the inverse.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2015-02-23 22:28:47 +01:00
Boris Ostrovsky 5054daa285 x86/xen: Initialize cr4 shadow for 64-bit PV(H) guests
Commit 1e02ce4ccc ("x86: Store a per-cpu shadow copy of CR4")
introduced CR4 shadows.

These shadows are initialized in early boot code. The commit missed
initialization for 64-bit PV(H) guests that this patch adds.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
2015-02-23 16:30:26 +00:00
David Vrabel fdfd811ddd x86/xen: allow privcmd hypercalls to be preempted
Hypercalls submitted by user space tools via the privcmd driver can
take a long time (potentially many 10s of seconds) if the hypercall
has many sub-operations.

A fully preemptible kernel may deschedule such as task in any upcall
called from a hypercall continuation.

However, in a kernel with voluntary or no preemption, hypercall
continuations in Xen allow event handlers to be run but the task
issuing the hypercall will not be descheduled until the hypercall is
complete and the ioctl returns to user space.  These long running
tasks may also trigger the kernel's soft lockup detection.

Add xen_preemptible_hcall_begin() and xen_preemptible_hcall_end() to
bracket hypercalls that may be preempted.  Use these in the privcmd
driver.

When returning from an upcall, call xen_maybe_preempt_hcall() which
adds a schedule point if if the current task was within a preemptible
hypercall.

Since _cond_resched() can move the task to a different CPU, clear and
set xen_in_preemptible_hcall around the call.

Signed-off-by: David Vrabel <david.vrabel@citrix.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
2015-02-23 16:30:24 +00:00
Boris Ostrovsky 31795b470b x86/xen: Make sure X2APIC_ENABLE bit of MSR_IA32_APICBASE is not set
Commit d524165cb8 ("x86/apic: Check x2apic early") tests X2APIC_ENABLE
bit of MSR_IA32_APICBASE when CONFIG_X86_X2APIC is off and panics
the kernel when this bit is set.

Xen's PV guests will pass this MSR read to the hypervisor which will
return its version of the MSR, where this bit might be set. Make sure
we clear it before returning MSR value to the caller.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
2015-02-23 16:30:23 +00:00
Marc Zyngier f3e39273e0 arm64: guard asm/assembler.h against multiple inclusions
asm/assembler.h lacks the usual guard against multiple inclusion,
leading to a compilation failure if it is accidentally included
twice.

Using the classic #ifndef/#define/#endif construct solves the issue.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2015-02-23 09:13:51 +00:00
Robin Murphy 115386f89b arm64: insn: fix compare-and-branch encodings
Fix cbz/cbnz having the mask offset by a bit, and add encodings for
tbz/tbnz so that all branch forms are represented.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Zi Shen Lim <zlim.lnx@gmail.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2015-02-23 09:13:45 +00:00
Pratyush Anand d0d6223018 arm64: ftrace: fix ftrace_modify_graph_caller for branch replace
ftrace_enable_ftrace_graph_caller and ftrace_disable_ftrace_graph_caller
should replace B(jmp) instruction and not BL(call) instruction.

Commit 9f1ae7596aad("arm64: Correct ftrace calls to
aarch64_insn_gen_branch_imm()") had a typo and used
AARCH64_INSN_BRANCH_LINK instead of AARCH64_INSN_BRANCH_NOLINK.

Either instruction will work, as the link register is saved/restored
across the branch but this better matches the intention of the code.

Signed-off-by: Pratyush Anand <panand@redhat.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2015-02-23 09:13:45 +00:00
Paul Clarke fea559f303 powerpc: Re-enable dynticks
Implement arch_irq_work_has_interrupt() for powerpc

Commit 9b01f5bf3 introduced a dependency on "IRQ work self-IPIs" for
full dynamic ticks to be enabled, by expecting architectures to
implement a suitable arch_irq_work_has_interrupt() routine.

Several arches have implemented this routine, including x86 (3010279f)
and arm (09f6edd4), but powerpc was omitted.

This patch implements this routine for powerpc.

The symptom, at boot (on powerpc systems) with "nohz_full=<CPU list>"
is displayed:

     NO_HZ: Can't run full dynticks because arch doesn't support irq work self-IPIs

after this patch:

     NO_HZ: Full dynticks CPUs: <CPU list>.

Tested against 3.19.

powerpc implements "IRQ work self-IPIs" by setting the decrementer to 1 in
arch_irq_work_raise(), which causes a decrementer exception on the next
timebase tick. We then handle the work in __timer_interrupt().

CC: Frederic Weisbecker <fweisbec@gmail.com>
Signed-off-by: Paul A. Clarke <pc@us.ibm.com>
Reviewed-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
[mpe: Flesh out change log, fix ws & include guards, remove include of processor.h]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2015-02-23 14:52:04 +11:00
Linus Torvalds be5e6616dd Merge branch 'for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
Pull more vfs updates from Al Viro:
 "Assorted stuff from this cycle.  The big ones here are multilayer
  overlayfs from Miklos and beginning of sorting ->d_inode accesses out
  from David"

* 'for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: (51 commits)
  autofs4 copy_dev_ioctl(): keep the value of ->size we'd used for allocation
  procfs: fix race between symlink removals and traversals
  debugfs: leave freeing a symlink body until inode eviction
  Documentation/filesystems/Locking: ->get_sb() is long gone
  trylock_super(): replacement for grab_super_passive()
  fanotify: Fix up scripted S_ISDIR/S_ISREG/S_ISLNK conversions
  Cachefiles: Fix up scripted S_ISDIR/S_ISREG/S_ISLNK conversions
  VFS: (Scripted) Convert S_ISLNK/DIR/REG(dentry->d_inode) to d_is_*(dentry)
  SELinux: Use d_is_positive() rather than testing dentry->d_inode
  Smack: Use d_is_positive() rather than testing dentry->d_inode
  TOMOYO: Use d_is_dir() rather than d_inode and S_ISDIR()
  Apparmor: Use d_is_positive/negative() rather than testing dentry->d_inode
  Apparmor: mediated_filesystem() should use dentry->d_sb not inode->i_sb
  VFS: Split DCACHE_FILE_TYPE into regular and special types
  VFS: Add a fallthrough flag for marking virtual dentries
  VFS: Add a whiteout dentry type
  VFS: Introduce inode-getting helpers for layered/unioned fs environments
  Infiniband: Fix potential NULL d_inode dereference
  posix_acl: fix reference leaks in posix_acl_create
  autofs4: Wrong format for printing dentry
  ...
2015-02-22 17:42:14 -08:00
Linus Torvalds 90c453ca22 Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull ARM fix from Russell King:
 "Just one fix this time around.  __iommu_alloc_buffer() can cause a
  BUG() if dma_alloc_coherent() is called with either __GFP_DMA32 or
  __GFP_HIGHMEM set.  The patch from Alexandre addresses this"

* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  ARM: 8305/1: DMA: Fix kzalloc flags in __iommu_alloc_buffer()
2015-02-22 09:57:16 -08:00
David Howells e36cb0b89c VFS: (Scripted) Convert S_ISLNK/DIR/REG(dentry->d_inode) to d_is_*(dentry)
Convert the following where appropriate:

 (1) S_ISLNK(dentry->d_inode) to d_is_symlink(dentry).

 (2) S_ISREG(dentry->d_inode) to d_is_reg(dentry).

 (3) S_ISDIR(dentry->d_inode) to d_is_dir(dentry).  This is actually more
     complicated than it appears as some calls should be converted to
     d_can_lookup() instead.  The difference is whether the directory in
     question is a real dir with a ->lookup op or whether it's a fake dir with
     a ->d_automount op.

In some circumstances, we can subsume checks for dentry->d_inode not being
NULL into this, provided we the code isn't in a filesystem that expects
d_inode to be NULL if the dirent really *is* negative (ie. if we're going to
use d_inode() rather than d_backing_inode() to get the inode pointer).

Note that the dentry type field may be set to something other than
DCACHE_MISS_TYPE when d_inode is NULL in the case of unionmount, where the VFS
manages the fall-through from a negative dentry to a lower layer.  In such a
case, the dentry type of the negative union dentry is set to the same as the
type of the lower dentry.

However, if you know d_inode is not NULL at the call site, then you can use
the d_is_xxx() functions even in a filesystem.

There is one further complication: a 0,0 chardev dentry may be labelled
DCACHE_WHITEOUT_TYPE rather than DCACHE_SPECIAL_TYPE.  Strictly, this was
intended for special directory entry types that don't have attached inodes.

The following perl+coccinelle script was used:

use strict;

my @callers;
open($fd, 'git grep -l \'S_IS[A-Z].*->d_inode\' |') ||
    die "Can't grep for S_ISDIR and co. callers";
@callers = <$fd>;
close($fd);
unless (@callers) {
    print "No matches\n";
    exit(0);
}

my @cocci = (
    '@@',
    'expression E;',
    '@@',
    '',
    '- S_ISLNK(E->d_inode->i_mode)',
    '+ d_is_symlink(E)',
    '',
    '@@',
    'expression E;',
    '@@',
    '',
    '- S_ISDIR(E->d_inode->i_mode)',
    '+ d_is_dir(E)',
    '',
    '@@',
    'expression E;',
    '@@',
    '',
    '- S_ISREG(E->d_inode->i_mode)',
    '+ d_is_reg(E)' );

my $coccifile = "tmp.sp.cocci";
open($fd, ">$coccifile") || die $coccifile;
print($fd "$_\n") || die $coccifile foreach (@cocci);
close($fd);

foreach my $file (@callers) {
    chomp $file;
    print "Processing ", $file, "\n";
    system("spatch", "--sp-file", $coccifile, $file, "--in-place", "--no-show-diff") == 0 ||
	die "spatch failed";
}

[AV: overlayfs parts skipped]

Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2015-02-22 11:38:41 -05:00
Yannick Guerrini a927792c19 x86/cpu/intel: Fix trivial typo in intel_tlb_table[]
Change 'ssociative' to 'associative'

Signed-off-by: Yannick Guerrini <yguerrini@tomshardware.fr>
Cc: Borislav Petkov <bp@suse.de>
Cc: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Chris Bainbridge <chris.bainbridge@gmail.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Steven Honeyman <stevenhoneyman@gmail.com>
Cc: trivial@kernel.org
Link: http://lkml.kernel.org/r/1424558510-1420-1-git-send-email-yguerrini@tomshardware.fr
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-22 08:55:58 +01:00
Linus Torvalds a135c717d5 Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:
 "This is the main pull request for MIPS:

   - a number of fixes that didn't make the 3.19 release.

   - a number of cleanups.

   - preliminary support for Cavium's Octeon 3 SOCs which feature up to
     48 MIPS64 R3 cores with FPU and hardware virtualization.

   - support for MIPS R6 processors.

     Revision 6 of the MIPS architecture is a major revision of the MIPS
     architecture which does away with many of original sins of the
     architecture such as branch delay slots.  This and other changes in
     R6 require major changes throughout the entire MIPS core
     architecture code and make up for the lion share of this pull
     request.

   - finally some preparatory work for eXtendend Physical Address
     support, which allows support of up to 40 bit of physical address
     space on 32 bit processors"

     [ Ahh, MIPS can't leave the PAE brain damage alone.  It's like
       every CPU architect has to make that mistake, but pee in the snow
       by changing the TLA.  But whether it's called PAE, LPAE or XPA,
       it's horrid crud   - Linus ]

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (114 commits)
  MIPS: sead3: Corrected get_c0_perfcount_int
  MIPS: mm: Remove dead macro definitions
  MIPS: OCTEON: irq: add CIB and other fixes
  MIPS: OCTEON: Don't do acknowledge operations for level triggered irqs.
  MIPS: OCTEON: More OCTEONIII support
  MIPS: OCTEON: Remove setting of processor specific CVMCTL icache bits.
  MIPS: OCTEON: Core-15169 Workaround and general CVMSEG cleanup.
  MIPS: OCTEON: Update octeon-model.h code for new SoCs.
  MIPS: OCTEON: Implement DCache errata workaround for all CN6XXX
  MIPS: OCTEON: Add little-endian support to asm/octeon/octeon.h
  MIPS: OCTEON: Implement the core-16057 workaround
  MIPS: OCTEON: Delete unused COP2 saving code
  MIPS: OCTEON: Use correct instruction to read 64-bit COP0 register
  MIPS: OCTEON: Save and restore CP2 SHA3 state
  MIPS: OCTEON: Fix FP context save.
  MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUs
  MIPS: boot: Provide more uImage options
  MIPS: Remove unneeded #ifdef __KERNEL__ from asm/processor.h
  MIPS: ip22-gio: Remove legacy suspend/resume support
  mips: pci: Add ifdef around pci_proc_domain
  ...
2015-02-21 19:41:38 -08:00
Linus Torvalds 2177033233 ARM: SoC fixes for 3.20-rc1
A few fixes that came in too late to make it into the first set of pull
 requests but would still be nice to have in -rc1. The majority of these
 are trivial build fixes for bugs that I found myself using randconfig
 testing, and a set of two patches from Uwe to mark DT strings as 'const'
 where appropriate, to resolve inconsistent section attributes.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Arnd Bergmann:
 "A few fixes that came in too late to make it into the first set of
  pull requests but would still be nice to have in -rc1.

  The majority of these are trivial build fixes for bugs that I found
  myself using randconfig testing, and a set of two patches from Uwe to
  mark DT strings as 'const' where appropriate, to resolve inconsistent
  section attributes"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: make of_device_ids const
  ARM: make arrays containing machine compatible strings const
  ARM: mm: Remove Kconfig symbol CACHE_PL310
  ARM: rockchip: force built-in regulator support for PM
  ARM: mvebu: build armada375-smp code conditionally
  ARM: sti: always enable RESET_CONTROLLER
  ARM: rockchip: make rockchip_suspend_init conditional
  ARM: ixp4xx: fix {in,out}s{bwl} data types
  ARM: prima2: do not select SMP_ON_UP
  ARM: at91: fix pm declarations
  ARM: davinci: multi-soc kernels require AUTO_ZRELADDR
  ARM: davinci: davinci_cfg_reg cannot be init
  ARM: BCM: put back ARCH_MULTI_V7 dependency for mobile
  ARM: vexpress: use ARM_CPU_SUSPEND if needed
  ARM: dts: add I2C device nodes for Broadcom Cygnus
  ARM: dts: BCM63xx: fix L2 cache properties
2015-02-21 19:21:54 -08:00
Linus Torvalds 1acd2de5fa Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
Pull more input updates from Dmitry Torokhov:
 "The second round of updates for the input subsystem.

  Updates to ALPS an bfin_roraty drivers and a couple oother fixups"

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input:
  Input: psmouse - use IS_ENABLED instead of homegrown code
  Input: bfin_rotary - introduce open and close methods
  Input: bfin_rotary - convert to use managed resources
  Input: bfin_rotary - use generic IO functions
  Input: bfin_rotary - move pin lists into into platform data
  Input: bfin_rotary - move platform header to linux/platform_data
  Input: bfin_rotary - mark suspend and resume code as __maybe_unused
  Input: bfin_rotary - fix potential oops in interrupt handler
  Input: ALPS - move v7 packet info to Documentation and v6 packet info
  Input: ALPS - fix confusing comment in protocol data
  Input: ALPS - do not mix trackstick and external PS/2 mouse data
  Input: ALPS - fix trackstick detection on some Dell Latitudes
  Input: ALPS - consolidate setting protocol parameters
  Input: ALPS - split protocol data from model info
  Input: ALPS - make Rushmore a separate protocol
  Input: ALPS - renumber protocol numbers
  Input: adi - remove an unnecessary check
  Input: pxa27x_keypad - remove an unneeded NULL check
  Input: soc_button_array - use "Windows" key for "Home"
2015-02-21 12:59:04 -08:00
Linus Torvalds 18a8d49973 The clock framework changes for 3.20 contain the usual driver additions,
enhancements and fixes mostly for ARM32, ARM64, MIPS and Power-based
 devices. Additionaly the framework core underwent a bit of surgery with
 two major changes. The boundary between the clock core and clock
 providers (e.g clock drivers) is now more well defined with dedicated
 provider helper functions. struct clk no longer maps 1:1 with the
 hardware clock but is a true per-user cookie which helps us tracker
 users of hardware clocks and debug bad behavior. The second major change
 is the addition of rate constraints for clocks. Rate ranges are now
 supported which are analogous to the voltage ranges in the regulator
 framework. Unfortunately these changes to the core created some
 breakeage. We think we fixed it all up but for this reason there are
 lots of last minute commits trying to undo the damage.
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Merge tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux

Pull clock framework updates from Mike Turquette:
 "The clock framework changes contain the usual driver additions,
  enhancements and fixes mostly for ARM32, ARM64, MIPS and Power-based
  devices.

  Additionally the framework core underwent a bit of surgery with two
  major changes:

   - The boundary between the clock core and clock providers (e.g clock
     drivers) is now more well defined with dedicated provider helper
     functions.  struct clk no longer maps 1:1 with the hardware clock
     but is a true per-user cookie which helps us tracker users of
     hardware clocks and debug bad behavior.

   - The addition of rate constraints for clocks.  Rate ranges are now
     supported which are analogous to the voltage ranges in the
     regulator framework.

  Unfortunately these changes to the core created some breakeage.  We
  think we fixed it all up but for this reason there are lots of last
  minute commits trying to undo the damage"

* tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux: (113 commits)
  clk: Only recalculate the rate if needed
  Revert "clk: mxs: Fix invalid 32-bit access to frac registers"
  clk: qoriq: Add support for the platform PLL
  powerpc/corenet: Enable CLK_QORIQ
  clk: Replace explicit clk assignment with __clk_hw_set_clk
  clk: Add __clk_hw_set_clk helper function
  clk: Don't dereference parent clock if is NULL
  MIPS: Alchemy: Remove bogus args from alchemy_clk_fgcs_detr
  clkdev: Always allocate a struct clk and call __clk_get() w/ CCF
  clk: shmobile: div6: Avoid division by zero in .round_rate()
  clk: mxs: Fix invalid 32-bit access to frac registers
  clk: omap: compile legacy omap3 clocks conditionally
  clkdev: Export clk_register_clkdev
  clk: Add rate constraints to clocks
  clk: remove clk-private.h
  pci: xgene: do not use clk-private.h
  arm: omap2+ remove dead clock code
  clk: Make clk API return per-user struct clk instances
  clk: tegra: Define PLLD_DSI and remove dsia(b)_mux
  clk: tegra: Add support for the Tegra132 CAR IP block
  ...
2015-02-21 12:30:30 -08:00
Linus Torvalds d34696c220 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux
Pull s390 fixes from Martin Schwidefsky:
 "Two patches to save some memory if CONFIG_NR_CPUS is large, a changed
  default for the use of compare-and-delay, and a couple of bug fixes"

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux:
  s390/spinlock: disabled compare-and-delay by default
  s390/mm: align 64-bit PIE binaries to 4GB
  s390/cacheinfo: coding style changes
  s390/cacheinfo: fix shared cpu masks
  s390/smp: reduce size of struct pcpu
  s390/topology: convert cpu_topology array to per cpu variable
  s390/topology: delay initialization of topology cpu masks
  s390/vdso: fix clock_gettime for CLOCK_THREAD_CPUTIME_ID, -2 and -3
2015-02-21 11:18:26 -08:00
Linus Torvalds f9677375b0 Merge branch 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull Intel Quark SoC support from Ingo Molnar:
 "This adds support for Intel Quark X1000 SoC boards, used in the low
  power 32-bit x86 Intel Galileo microcontroller board intended for the
  Arduino space.

  There's been some preparatory core x86 patches for Quark CPU quirks
  merged already, but this rounds it all up and adds Kconfig enablement.
  It's a clean hardware enablement addition tree at this point"

* 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/intel/quark: Fix simple_return.cocci warnings
  x86/intel/quark: Fix ptr_ret.cocci warnings
  x86/intel/quark: Add Intel Quark platform support
  x86/intel/quark: Add Isolated Memory Regions for Quark X1000
2015-02-21 11:12:07 -08:00
Linus Torvalds 10436cf881 Merge branch 'locking-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull locking fixes from Ingo Molnar:
 "Two fixes: the paravirt spin_unlock() corruption/crash fix, and an
  rtmutex NULL dereference crash fix"

* 'locking-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/spinlocks/paravirt: Fix memory corruption on unlock
  locking/rtmutex: Avoid a NULL pointer dereference on deadlock
2015-02-21 10:45:03 -08:00
Linus Torvalds 5fbe4c224c Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull misc x86 fixes from Ingo Molnar:
 "This contains:

   - EFI fixes
   - a boot printout fix
   - ASLR/kASLR fixes
   - intel microcode driver fixes
   - other misc fixes

  Most of the linecount comes from an EFI revert"

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/mm/ASLR: Avoid PAGE_SIZE redefinition for UML subarch
  x86/microcode/intel: Handle truncated microcode images more robustly
  x86/microcode/intel: Guard against stack overflow in the loader
  x86, mm/ASLR: Fix stack randomization on 64-bit systems
  x86/mm/init: Fix incorrect page size in init_memory_mapping() printks
  x86/mm/ASLR: Propagate base load address calculation
  Documentation/x86: Fix path in zero-page.txt
  x86/apic: Fix the devicetree build in certain configs
  Revert "efi/libstub: Call get_memory_map() to obtain map and desc sizes"
  x86/efi: Avoid triple faults during EFI mixed mode calls
2015-02-21 10:41:29 -08:00
Linus Torvalds b5aeca54d0 Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 uprobe/kprobe fixes from Ingo Molnar:
 "This contains two uprobes fixes, an uprobes comment update and a
  kprobes fix"

* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  kprobes/x86: Mark 2 bytes NOP as boostable
  uprobes/x86: Fix 2-byte opcode table
  uprobes/x86: Fix 1-byte opcode tables
  uprobes/x86: Add comment with insn opcodes, mnemonics and why we dont support them
2015-02-21 10:39:16 -08:00
Linus Torvalds 3f4d9925e9 Merge branches 'core-urgent-for-linus' and 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull rcu fix and x86 irq fix from Ingo Molnar:

 - Fix a bug that caused an RCU warning splat.

 - Two x86 irq related fixes: a hotplug crash fix and an ACPI IRQ
   registry fix.

* 'core-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  rcu: Clear need_qs flag to prevent splat

* 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/irq: Check for valid irq descriptor in check_irq_vectors_for_cpu_disable()
  x86/irq: Fix regression caused by commit b568b8601f
2015-02-21 10:36:06 -08:00
Petr Mladek 2a6730c8b6 kprobes/x86: Check for invalid ftrace location in __recover_probed_insn()
__recover_probed_insn() should always be called from an address
where an instructions starts. The check for ftrace_location()
might help to discover a potential inconsistency.

This patch adds WARN_ON() when the inconsistency is detected.
Also it adds handling of the situation when the original code
can not get recovered.

Suggested-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Signed-off-by: Petr Mladek <pmladek@suse.cz>
Cc: Ananth NMavinakayanahalli <ananth@in.ibm.com>
Cc: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Jiri Kosina <jkosina@suse.cz>
Cc: Steven Rostedt <rostedt@goodmis.org>
Link: http://lkml.kernel.org/r/1424441250-27146-3-git-send-email-pmladek@suse.cz
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-21 10:33:31 +01:00
Petr Mladek 650b7b23cb kprobes/x86: Use 5-byte NOP when the code might be modified by ftrace
can_probe() checks if the given address points to the beginning
of an instruction. It analyzes all the instructions from the
beginning of the function until the given address. The code
might be modified by another Kprobe. In this case, the current
code is read into a buffer, int3 breakpoint is replaced by the
saved opcode in the buffer, and can_probe() analyzes the buffer
instead.

There is a bug that __recover_probed_insn() tries to restore
the original code even for Kprobes using the ftrace framework.
But in this case, the opcode is not stored. See the difference
between arch_prepare_kprobe() and arch_prepare_kprobe_ftrace().
The opcode is stored by arch_copy_kprobe() only from
arch_prepare_kprobe().

This patch makes Kprobe to use the ideal 5-byte NOP when the
code can be modified by ftrace. It is the original instruction,
see ftrace_make_nop() and ftrace_nop_replace().

Note that we always need to use the NOP for ftrace locations.
Kprobes do not block ftrace and the instruction might get
modified at anytime. It might even be in an inconsistent state
because it is modified step by step using the int3 breakpoint.

The patch also fixes indentation of the touched comment.

Note that I found this problem when playing with Kprobes. I did
it on x86_64 with gcc-4.8.3 that supported -mfentry. I modified
samples/kprobes/kprobe_example.c and added offset 5 to put
the probe right after the fentry area:

 static struct kprobe kp = {
 	.symbol_name	= "do_fork",
+	.offset = 5,
 };

Then I was able to load kprobe_example before jprobe_example
but not the other way around:

  $> modprobe jprobe_example
  $> modprobe kprobe_example
  modprobe: ERROR: could not insert 'kprobe_example': Invalid or incomplete multibyte or wide character

It did not make much sense and debugging pointed to the bug
described above.

Signed-off-by: Petr Mladek <pmladek@suse.cz>
Acked-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: Ananth NMavinakayanahalli <ananth@in.ibm.com>
Cc: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Jiri Kosina <jkosina@suse.cz>
Cc: Steven Rostedt <rostedt@goodmis.org>
Link: http://lkml.kernel.org/r/1424441250-27146-2-git-send-email-pmladek@suse.cz
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-21 10:33:30 +01:00
Niklas Cassel 44923c9cfa MIPS: sead3: Corrected get_c0_perfcount_int
Commit e9de688dac ("irqchip: mips-gic: Support local interrupts")
updated several platforms. This is a copy paste error.

Signed-off-by: Niklas Cassel <niklass@axis.com>
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9245/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 23:53:09 +01:00
Andreas Ruprecht 8fc5ec7044 MIPS: mm: Remove dead macro definitions
In commit c441d4a54c ("MIPS: mm: Only build one microassembler that
is suitable"), the Makefile at arch/mips/mm was rewritten to only
build the "right" microassembler file, depending on whether
CONFIG_CPU_MICROMIPS is set or not.

In the files, however, there are still preprocessor definitions
depending on CONFIG_CPU_MICROMIPS. The #ifdef around them can now
never evaluate to true, so let's remove them altogether.

This inconsistency was found using the undertaker-checkpatch tool.

Signed-off-by: Andreas Ruprecht <rupran@einserver.de>
Reviewed-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: Valentin Rothberg <valentinrothberg@gmail.com>
Cc: Paul Bolle <pebolle@tiscali.nl>
Patchwork: https://patchwork.linux-mips.org/patch/9267/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 23:42:00 +01:00
David Daney 64b139f97c MIPS: OCTEON: irq: add CIB and other fixes
- Use of_irq_init() to initialize interrupt controllers
- Get rid of some unlikely()
- Add CIB to support SATA and other interrupts
- Add support for CIU SUM2 interrupt sources

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Leonid Rosenboim <lrosenboim@caviumnetworks.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Signed-off-by: Peter Swain <peter.swain@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8947/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 15:33:40 +01:00
David Daney 2e3ecab1d3 MIPS: OCTEON: Don't do acknowledge operations for level triggered irqs.
The acknowledge bits don't exist for level triggered irqs, so setting
them causes the simulator to terminate.

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Leonid Rosenboim <lrosenboim@caviumnetworks.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8946/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 15:33:06 +01:00
Chandrakala Chavva ac6d9b3a03 MIPS: OCTEON: More OCTEONIII support
Read clock rate from the correct CSR. Don't clear COP0_DCACHE for OCTEONIII.

Signed-off-by: Chandrakala Chavva <cchavva@caviumnetworks.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8945/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 15:32:46 +01:00
Chad Reese 920cda3870 MIPS: OCTEON: Remove setting of processor specific CVMCTL icache bits.
CN38XX pass 1 required icache prefetching to be turned off. This chip never
reached production and is long dead. Other processor specific icache settings
are done by the bootloader. Remove these bits from the kernel.

Signed-off-by: Chad Reese <kreese@caviumnetworks.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/8944/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 15:32:22 +01:00
David Daney 726da2f82a MIPS: OCTEON: Core-15169 Workaround and general CVMSEG cleanup.
Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8943/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 15:31:59 +01:00
David Daney debe6a623d MIPS: OCTEON: Update octeon-model.h code for new SoCs.
Add coverage for OCTEON III models.

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8942/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 15:31:43 +01:00
David Daney e3d0ead59f MIPS: OCTEON: Implement DCache errata workaround for all CN6XXX
Make messages refer to all CN6XXX.

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8941/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 15:31:27 +01:00
David Daney 664f1ae53d MIPS: OCTEON: Add little-endian support to asm/octeon/octeon.h
Also update union octeon_cvmemctl with new OCTEON II fields.

[aleksey.makarov@auriga.com: use __BITFIELD_FIELD]

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8940/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 15:31:07 +01:00
David Daney 664d699af2 MIPS: OCTEON: Implement the core-16057 workaround
Disable ICache prefetch for certian Octeon II processors.

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8938/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 15:30:42 +01:00
Aleksey Makarov 69f7cd4724 MIPS: OCTEON: Delete unused COP2 saving code
Commit 2c952e06e4 ("MIPS: Move cop2 save/restore to switch_to()")
removes assembler code to store COP2 registers.  Commit
a36d8225bc ("MIPS: OCTEON: Enable use of FPU") mistakenly
restores it

Fixes: a36d8225bc ("MIPS: OCTEON: Enable use of FPU")
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/8937/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 15:30:23 +01:00
Chandrakala Chavva 2d98cae6e3 MIPS: OCTEON: Use correct instruction to read 64-bit COP0 register
Use dmfc0/dmtc0 instructions for reading CvmMemCtl COP0 register,
its a 64-bit wide.

Signed-off-by: Chandrakala Chavva <cchavva@caviumnetworks.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/8936/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 15:29:36 +01:00
David Daney 6b3a287e63 MIPS: OCTEON: Save and restore CP2 SHA3 state
Allocate new save space, and then save/restore the registers if
OCTEON III.

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8935/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 15:29:08 +01:00
David Daney d6e41525e3 MIPS: OCTEON: Fix FP context save.
It wasn't being saved on task switch.

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8934/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 15:28:51 +01:00
David Daney ac655fb762 MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUs
The wide multiplier is twice as wide, so we need to save twice as much
state.  Detect the multiplier type (CPU type) at start up and install
model specific handlers.

[aleksey.makarov@auriga.com:
	conflict resolution,
	support for old compilers]

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Leonid Rosenboim <lrosenboim@caviumnetworks.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8933/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 15:28:29 +01:00
Markos Chandras 9d6b80faf9 MIPS: boot: Provide more uImage options
Allow more compression algorithms as well as uncompressed uImage.bin
to be generated. An uncompressed image might be useful to rule out
problems in the decompression code in the bootloader or even speed
up the boot process at the expense of a bigger uImage file.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9271/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 14:17:43 +01:00
David Daney 151f9148d1 MIPS: Remove unneeded #ifdef __KERNEL__ from asm/processor.h
Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8737/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 14:14:52 +01:00
Lars-Peter Clausen fa75da8ecd MIPS: ip22-gio: Remove legacy suspend/resume support
There are currently no gio device drivers that implement suspend/resume
and this patch removes the bus specific legacy suspend and resume callbacks.
This will allow us to eventually remove struct bus_type legacy suspend and
resume support altogether.

gio device drivers wanting to implement suspend and resume can use dev PM
ops which will work out of the box without further modifications necessary.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8920/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 13:30:55 +01:00
Zubair Lutfullah Kakakhel 6fb8a163fc mips: pci: Add ifdef around pci_proc_domain
Without these, there are multiple definitions of pci_proc_domain()
and pci_domain_nr() if linux/pci.h and asm/pci.h are included.

Add #ifdefs around them

Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Reviewed-by: Markos Chandras <Markos.Chandras@imgtec.com>
Cc: Markos.Chandras@imgtec.com
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8670/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 13:16:14 +01:00
Manuel Lauss 69e4e63ec8 MIPS: Alchemy: Fix cpu clock calculation
The current code uses bits 0-6 of the sys_cpupll register to calculate
core clock speed.  However this is only valid on Au1300, on all earlier
models the hardware only uses bits 0-5 to generate core clock.

This fixes clock calculation on the MTX1 (Au1500), where bit 6 of cpupll
is set as well, which ultimately lead the code to calculate a bogus cpu
core clock and also uart base clock down the line.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Reported-by: John Crispin <blogic@openwrt.org>
Tested-by: Bruno Randolf <br1@einfach.org>
Cc: stable@vger.kernel.org	[v3.17+]
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/9279/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 13:01:42 +01:00
Manuel Lauss 200276e673 MIPS: Alchemy: remove declaration for set_cpuspec
set_cpuspec() has been dropped with commit 074cf65670
("MIPS: Alchemy: remove cpu_table.") in late 2008.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/9150/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 13:00:45 +01:00
Manuel Lauss 45a848f7fa MIPS: Alchemy: preset loops_per_jiffy based on CPU clock
This was lost during the rewrite of clock framework support.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/9149/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 13:00:25 +01:00
Manuel Lauss 51f105d307 MIPS: Alchemy: fix Au1000/Au1500 LRCLK calculation
The Au1000 and Au1500 calculate the LRCLK a bit differently than
newer models: a single bit in MEM_STCFG0 selects if pclk is divided
by 4 or 5.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/9148/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 13:00:08 +01:00
Steven J. Hill a5770df095 MIPS: Add set/clear CP0 macros for PageGrain register
Build set and clear macros for the PageGrain register.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9289/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 12:55:18 +01:00
Alexandre Courbot 23be7fdafa ARM: 8305/1: DMA: Fix kzalloc flags in __iommu_alloc_buffer()
There doesn't seem to be any valid reason to allocate the pages array
with the same flags as the buffer itself. Doing so can eventually lead
to the following safeguard in mm/slab.c's cache_grow() to be hit:

        if (unlikely(flags & GFP_SLAB_BUG_MASK)) {
                pr_emerg("gfp: %un", flags & GFP_SLAB_BUG_MASK);
                BUG();
        }

This happens when buffers are allocated with __GFP_DMA32 or
__GFP_HIGHMEM.

Fix this by allocating the pages array with GFP_KERNEL to follow what is
done elsewhere in this file. Using GFP_KERNEL in __iommu_alloc_buffer()
is safe because atomic allocations are handled by __iommu_alloc_atomic().

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-02-20 11:14:42 +00:00
Al Viro a457ac2854 hypfs: switch to read_iter/write_iter
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2015-02-20 04:56:28 -05:00
Jiri Kosina 570e1aa84c x86/mm/ASLR: Avoid PAGE_SIZE redefinition for UML subarch
Commit f47233c2d3 ("x86/mm/ASLR: Propagate base load address
calculation") causes PAGE_SIZE redefinition warnings for UML
subarch  builds. This is caused by added includes that were
leftovers from previous  patch versions are are not actually
needed (especially page_types.h  inlcude in module.c). Drop
those stray includes.

Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Cc: Borislav Petkov <bp@suse.de>
Cc: H. Peter Anvin <hpa@linux.intel.com>
Cc: Kees Cook <keescook@chromium.org>
Link: http://lkml.kernel.org/r/alpine.LNX.2.00.1502201017240.28769@pobox.suse.cz
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-20 10:55:32 +01:00
David Vrabel e3a1f6cac1 x86: pte_protnone() and pmd_protnone() must check entry is not present
Since _PAGE_PROTNONE aliases _PAGE_GLOBAL it is only valid if
_PAGE_PRESENT is clear.  Make pte_protnone() and pmd_protnone() check
for this.

This fixes a 64-bit Xen PV guest regression introduced by 8a0516ed8b
("mm: convert p[te|md]_numa users to p[te|md]_protnone_numa").  Any
userspace process would endlessly fault.

In a 64-bit PV guest, userspace page table entries have _PAGE_GLOBAL set
by the hypervisor.  This meant that any fault on a present userspace
entry (e.g., a write to a read-only mapping) would be misinterpreted as
a NUMA hinting fault and the fault would not be correctly handled,
resulting in the access endlessly faulting.

Signed-off-by: David Vrabel <david.vrabel@citrix.com>
Acked-by: Mel Gorman <mgorman@suse.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2015-02-19 15:04:49 -08:00
Steven J. Hill 05f9883a28 MIPS: Usage and cosmetic cleanups of page table bits.
* Clean up white spaces and tabs.
   * Get rid of remaining hardcoded values for calculating
     shifts and masks.
   * Get rid of redundant macro values.
   * Do not use page table bits directly in #ifdef's.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9287/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-19 22:15:59 +01:00
Linus Torvalds b11a278397 Merge branch 'kconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild
Pull kconfig updates from Michal Marek:
 "Yann E Morin was supposed to take over kconfig maintainership, but
  this hasn't happened.  So I'm sending a few kconfig patches that I
  collected:

   - Fix for missing va_end in kconfig
   - merge_config.sh displays used if given too few arguments
   - s/boolean/bool/ in Kconfig files for consistency, with the plan to
     only support bool in the future"

* 'kconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild:
  kconfig: use va_end to match corresponding va_start
  merge_config.sh: Display usage if given too few arguments
  kconfig: use bool instead of boolean for type definition attributes
2015-02-19 10:36:45 -08:00
Linus Torvalds 27a22ee4c7 Merge branch 'kbuild' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild
Pull kbuild updates from Michal Marek:

 - several cleanups in kbuild

 - serialize multiple *config targets so that 'make defconfig kvmconfig'
   works

 - The cc-ifversion macro got support for an else-branch

* 'kbuild' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild:
  kbuild,gcov: simplify kernel/gcov/Makefile more
  kbuild: allow cc-ifversion to have the argument for false condition
  kbuild,gcov: simplify kernel/gcov/Makefile
  kbuild,gcov: remove unnecessary workaround
  kbuild: do not add $(call ...) to invoke cc-version or cc-fullversion
  kbuild: fix cc-ifversion macro
  kbuild: drop $(version_h) from MRPROPER_FILES
  kbuild: use mixed-targets when two or more config targets are given
  kbuild: remove redundant line from bounds.h/asm-offsets.h
  kbuild: merge bounds.h and asm-offsets.h rules
  kbuild: Drop support for clean-rule
2015-02-19 10:07:08 -08:00
Martin Schwidefsky 61b0b01686 s390/spinlock: disabled compare-and-delay by default
Until we have hard performance data about the effects of CAD in the
spinlock loop disable the instruction by default.

Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-02-19 18:05:38 +01:00
Ralf Baechle 661af35e5f Merge branch 'mipsr6-for-3.20' of git://git.linux-mips.org/pub/scm/mchandras/linux into mips-for-linux-next 2015-02-19 16:00:34 +01:00
James Hogan ca5d25642e MIPS: Export MSA functions used by lose_fpu(1) for KVM
Export the _save_msa asm function used by the lose_fpu(1) macro to GPL
modules so that KVM can make use of it when it is built as a module.

This fixes the following build error when CONFIG_KVM=m and
CONFIG_CPU_HAS_MSA=y due to commit f798217dfd ("KVM: MIPS: Don't leak
FPU/DSP to guest"):

ERROR: "_save_msa" [arch/mips/kvm/kvm.ko] undefined!

Fixes: f798217dfd (KVM: MIPS: Don't leak FPU/DSP to guest)
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Gleb Natapov <gleb@kernel.org>
Cc: kvm@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: <stable@vger.kernel.org> # 3.15+
Patchwork: https://patchwork.linux-mips.org/patch/9261/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-19 15:59:44 +01:00
James Hogan 3ce465e04b MIPS: Export FP functions used by lose_fpu(1) for KVM
Export the _save_fp asm function used by the lose_fpu(1) macro to GPL
modules so that KVM can make use of it when it is built as a module.

This fixes the following build error when CONFIG_KVM=m due to commit
f798217dfd ("KVM: MIPS: Don't leak FPU/DSP to guest"):

ERROR: "_save_fp" [arch/mips/kvm/kvm.ko] undefined!

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Fixes: f798217dfd (KVM: MIPS: Don't leak FPU/DSP to guest)
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Gleb Natapov <gleb@kernel.org>
Cc: kvm@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: <stable@vger.kernel.org> # 3.10+
Patchwork: https://patchwork.linux-mips.org/patch/9260/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-19 15:58:51 +01:00
Kevin Cernekee 0e16d1e340 MIPS: BCM3384: Fix outdated use of mips_cpu_intc_init()
This function was renamed to mips_cpu_irq_of_init(), so fix it to avoid
a compile error.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: f.fainelli@gmail.com
Cc: jaedon.shin@gmail.com
Cc: abrestic@chromium.org
Cc: tglx@linutronix.de
Cc: jason@lakedaemon.net
Cc: jogo@openwrt.org
Cc: arnd@arndb.de
Cc: computersforpeace@gmail.com
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8834/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-19 13:47:55 +01:00
Petr Malat 8cb48fe169 MIPS: Provide correct siginfo_t.si_stime
Provide correct siginfo_t.si_stime on MIPS64

Bug description:
MIPS version of copy_siginfo() is not aware of alignment on platforms with
64-bit long integers, which leads to an incorrect si_stime passed to signal
handlers, because the last element (si_stime) of _sifields._sigchld is not
copied. If _MIPS_SZLONG is 64, then the _sifields starts at the offset of
4 * sizeof(int).

Patch description:
Use the generic copy_siginfo, which doesn't have this problem.

Signed-off-by: Petr Malat <oss@malat.biz>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8671/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-19 13:47:46 +01:00
Markos Chandras 32098ec7bc MIPS: Makefile: Move the ASEs checks after setting the core's CFLAGS
We need to check the ASEs support against the core's CFLAGS instead
of depending to the default -march option from the toolchain.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9180/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-19 13:47:32 +01:00
Ralf Baechle a8140f36af MIPS: Makefile: Pass -march option on Loongson3A cores
The loongson 3A cores do not select a suitable -march option so the build
system uses the default one from the toolchain. This may or may not be
suitable for a loongson 3A build. In order to avoid that, we explicitly set
a suitable -march option for that core.  Furthermore, some very old
compilers don't support -march= at all and there is the possibility of
toolchain combinations such as GCC 4.9 and binutils 2.24 for which
-march=loongson3a will result in MIPS64 R2 code being generated but then
rejected by GAS.  So treat the Longsoon 3A as an R2 CPU.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-19 13:47:20 +01:00
Ingo Molnar 1fbe23e0de * Two fixes hardening microcode data handling. (Quentin Casasnovas)
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Merge tag 'microcode_fixes_for-3.21' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp into x86/urgent

Pull microcode fixes from Borislav Petkov:

  - Two fixes hardening microcode data handling. (Quentin Casasnovas)

Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-19 13:32:42 +01:00
Quentin Casasnovas 35a9ff4eec x86/microcode/intel: Handle truncated microcode images more robustly
We do not check the input data bounds containing the microcode before
copying a struct microcode_intel_header from it. A specially crafted
microcode could cause the kernel to read invalid memory and lead to a
denial-of-service.

Signed-off-by: Quentin Casasnovas <quentin.casasnovas@oracle.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Link: http://lkml.kernel.org/r/1422964824-22056-3-git-send-email-quentin.casasnovas@oracle.com
[ Made error message differ from the next one and flipped comparison. ]
Signed-off-by: Borislav Petkov <bp@suse.de>
2015-02-19 12:42:23 +01:00
Quentin Casasnovas f84598bd7c x86/microcode/intel: Guard against stack overflow in the loader
mc_saved_tmp is a static array allocated on the stack, we need to make
sure mc_saved_count stays within its bounds, otherwise we're overflowing
the stack in _save_mc(). A specially crafted microcode header could lead
to a kernel crash or potentially kernel execution.

Signed-off-by: Quentin Casasnovas <quentin.casasnovas@oracle.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Link: http://lkml.kernel.org/r/1422964824-22056-1-git-send-email-quentin.casasnovas@oracle.com
Signed-off-by: Borislav Petkov <bp@suse.de>
2015-02-19 12:41:37 +01:00
Ingo Molnar a267b0a349 Merge branch 'tip-x86-kaslr' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp into x86/urgent
Pull ASLR and kASLR fixes from Borislav Petkov:

  - Add a global flag announcing KASLR state so that relevant code can do
    informed decisions based on its setting. (Jiri Kosina)

  - Fix a stack randomization entropy decrease bug. (Hector Marco-Gisbert)

Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-19 12:31:34 +01:00
Hector Marco-Gisbert 4e7c22d447 x86, mm/ASLR: Fix stack randomization on 64-bit systems
The issue is that the stack for processes is not properly randomized on
64 bit architectures due to an integer overflow.

The affected function is randomize_stack_top() in file
"fs/binfmt_elf.c":

  static unsigned long randomize_stack_top(unsigned long stack_top)
  {
           unsigned int random_variable = 0;

           if ((current->flags & PF_RANDOMIZE) &&
                   !(current->personality & ADDR_NO_RANDOMIZE)) {
                   random_variable = get_random_int() & STACK_RND_MASK;
                   random_variable <<= PAGE_SHIFT;
           }
           return PAGE_ALIGN(stack_top) + random_variable;
           return PAGE_ALIGN(stack_top) - random_variable;
  }

Note that, it declares the "random_variable" variable as "unsigned int".
Since the result of the shifting operation between STACK_RND_MASK (which
is 0x3fffff on x86_64, 22 bits) and PAGE_SHIFT (which is 12 on x86_64):

	  random_variable <<= PAGE_SHIFT;

then the two leftmost bits are dropped when storing the result in the
"random_variable". This variable shall be at least 34 bits long to hold
the (22+12) result.

These two dropped bits have an impact on the entropy of process stack.
Concretely, the total stack entropy is reduced by four: from 2^28 to
2^30 (One fourth of expected entropy).

This patch restores back the entropy by correcting the types involved
in the operations in the functions randomize_stack_top() and
stack_maxrandom_size().

The successful fix can be tested with:

  $ for i in `seq 1 10`; do cat /proc/self/maps | grep stack; done
  7ffeda566000-7ffeda587000 rw-p 00000000 00:00 0                          [stack]
  7fff5a332000-7fff5a353000 rw-p 00000000 00:00 0                          [stack]
  7ffcdb7a1000-7ffcdb7c2000 rw-p 00000000 00:00 0                          [stack]
  7ffd5e2c4000-7ffd5e2e5000 rw-p 00000000 00:00 0                          [stack]
  ...

Once corrected, the leading bytes should be between 7ffc and 7fff,
rather than always being 7fff.

Signed-off-by: Hector Marco-Gisbert <hecmargi@upv.es>
Signed-off-by: Ismael Ripoll <iripoll@upv.es>
[ Rebased, fixed 80 char bugs, cleaned up commit message, added test example and CVE ]
Signed-off-by: Kees Cook <keescook@chromium.org>
Cc: <stable@vger.kernel.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Fixes: CVE-2015-1593
Link: http://lkml.kernel.org/r/20150214173350.GA18393@www.outflux.net
Signed-off-by: Borislav Petkov <bp@suse.de>
2015-02-19 12:21:36 +01:00
Ingo Molnar ee408b4207 Merge branch 'tip-x86-mm' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp into x86/urgent
Pull boot printout fix from Borislav Petkov.

Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-19 11:59:18 +01:00
Dave Hansen f15e05186c x86/mm/init: Fix incorrect page size in init_memory_mapping() printks
With 32-bit non-PAE kernels, we have 2 page sizes available
(at most): 4k and 4M.

Enabling PAE replaces that 4M size with a 2M one (which 64-bit
systems use too).

But, when booting a 32-bit non-PAE kernel, in one of our
early-boot printouts, we say:

  init_memory_mapping: [mem 0x00000000-0x000fffff]
   [mem 0x00000000-0x000fffff] page 4k
  init_memory_mapping: [mem 0x37000000-0x373fffff]
   [mem 0x37000000-0x373fffff] page 2M
  init_memory_mapping: [mem 0x00100000-0x36ffffff]
   [mem 0x00100000-0x003fffff] page 4k
   [mem 0x00400000-0x36ffffff] page 2M
  init_memory_mapping: [mem 0x37400000-0x377fdfff]
   [mem 0x37400000-0x377fdfff] page 4k

Which is obviously wrong.  There is no 2M page available.  This
is probably because of a badly-named variable: in the map_range
code: PG_LEVEL_2M.

Instead of renaming all the PG_LEVEL_2M's.  This patch just
fixes the printout:

  init_memory_mapping: [mem 0x00000000-0x000fffff]
   [mem 0x00000000-0x000fffff] page 4k
  init_memory_mapping: [mem 0x37000000-0x373fffff]
   [mem 0x37000000-0x373fffff] page 4M
  init_memory_mapping: [mem 0x00100000-0x36ffffff]
   [mem 0x00100000-0x003fffff] page 4k
   [mem 0x00400000-0x36ffffff] page 4M
  init_memory_mapping: [mem 0x37400000-0x377fdfff]
   [mem 0x37400000-0x377fdfff] page 4k
  BRK [0x03206000, 0x03206fff] PGTABLE

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Pekka Enberg <penberg@cs.helsinki.fi>
Cc: Yinghai Lu <yinghai@kernel.org>
Link: http://lkml.kernel.org/r/20150210212030.665EC267@viggo.jf.intel.com
Signed-off-by: Borislav Petkov <bp@suse.de>
2015-02-19 11:45:27 +01:00
Jiri Kosina f47233c2d3 x86/mm/ASLR: Propagate base load address calculation
Commit:

  e2b32e6785 ("x86, kaslr: randomize module base load address")

makes the base address for module to be unconditionally randomized in
case when CONFIG_RANDOMIZE_BASE is defined and "nokaslr" option isn't
present on the commandline.

This is not consistent with how choose_kernel_location() decides whether
it will randomize kernel load base.

Namely, CONFIG_HIBERNATION disables kASLR (unless "kaslr" option is
explicitly specified on kernel commandline), which makes the state space
larger than what module loader is looking at. IOW CONFIG_HIBERNATION &&
CONFIG_RANDOMIZE_BASE is a valid config option, kASLR wouldn't be applied
by default in that case, but module loader is not aware of that.

Instead of fixing the logic in module.c, this patch takes more generic
aproach. It introduces a new bootparam setup data_type SETUP_KASLR and
uses that to pass the information whether kaslr has been applied during
kernel decompression, and sets a global 'kaslr_enabled' variable
accordingly, so that any kernel code (module loading, livepatching, ...)
can make decisions based on its value.

x86 module loader is converted to make use of this flag.

Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Acked-by: Kees Cook <keescook@chromium.org>
Cc: "H. Peter Anvin" <hpa@linux.intel.com>
Link: https://lkml.kernel.org/r/alpine.LNX.2.00.1502101411280.10719@pobox.suse.cz
[ Always dump correct kaslr status when panicking ]
Signed-off-by: Borislav Petkov <bp@suse.de>
2015-02-19 11:38:54 +01:00
Martin Schwidefsky 4ba2815d3b s390/mm: align 64-bit PIE binaries to 4GB
The base address (STACK_TOP / 3 * 2) for a 64-bit program is two thirds
into the 4GB segment at 0x2aa00000000. The randomization added on z13
can eat another 1GB of the remaining 1.33GB to the next 4GB boundary.
In the worst case 300MB are left for the executable + bss which may
cross into the next 4GB segment. This is bad for branch prediction,
therefore align the base address to 4GB to give the program more room
before it crosses the 4GB boundary.

Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-02-19 10:36:32 +01:00
Fengguang Wu c11a25f443 x86/intel/quark: Fix simple_return.cocci warnings
arch/x86/platform/intel-quark/imr.c:129:1-4: WARNING: end returns can be simpified

 Simplify a trivial if-return sequence.  Possibly combine with a preceding function call.

Generated by: scripts/coccinelle/misc/simple_return.cocci

Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Cc: Andy Shevchenko <andy.schevchenko@gmail.com>
Cc: Ong, Boon Leong <boon.leong.ong@intel.com>
Cc: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Darren Hart <dvhart@linux.intel.com>
Cc: kbuild-all@01.org
Link: http://lkml.kernel.org/r/20150219081432.GA21996@waimea
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-19 10:00:55 +01:00
Fengguang Wu 32d39169d7 x86/intel/quark: Fix ptr_ret.cocci warnings
arch/x86/platform/intel-quark/imr.c:280:1-3: WARNING: PTR_ERR_OR_ZERO can be used

 Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR

Generated by: scripts/coccinelle/api/ptr_ret.cocci

Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Cc: Andy Shevchenko <andy.schevchenko@gmail.com>
Cc: Ong, Boon Leong <boon.leong.ong@intel.com>
Cc: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Darren Hart <dvhart@linux.intel.com>
Cc: kbuild-all@01.org
Link: http://lkml.kernel.org/r/20150219081432.GA21983@waimea
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-19 10:00:54 +01:00
Uwe Kleine-König 444d2d33d8 ARM: make of_device_ids const
of_device_ids (i.e. compatible strings and the respective data) are not
supposed to change at runtime. All functions working with of_device_ids
provided by <linux/of.h> work with const of_device_ids. So mark the
non-const structs in arch/arm as const, too.

While at it also add some __initconst annotations.

Acked-by: Jason Cooper <jason@lakedameon.net>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-02-19 09:44:25 +01:00
Uwe Kleine-König 543c5040f5 ARM: make arrays containing machine compatible strings const
The definition

	static const char *axxia_dt_match[] __initconst = {
		...

defines a changable array of constant strings. That is you must not do:

	*axxia_dt_match[0] = 'k';

but

	axxia_dt_match[0] = "different string";

is fine. So the annotation __initconst is wrong and yields a compiler
error when other really const variables are added with __initconst.

As the struct machine_desc member dt_compat is declared as

	const char *const *dt_compat;

making the arrays const is the better alternative over changing all
annotations to __initdata.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-02-19 09:44:17 +01:00
Rusty Russell f476893459 lguest: update help text.
We now add about 10k, not 6k, when lguest support is compiled in.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
2015-02-19 14:44:32 +10:30
Rusty Russell b0bd96fe9a lguest: now depends on PCI
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
2015-02-19 12:31:14 +10:30
Bryan O'Donoghue 8bbc2a135b x86/intel/quark: Add Intel Quark platform support
Add Intel Quark platform support. Quark needs to pull down all
unlocked IMRs to ensure agreement with the EFI memory map post
boot.

This patch adds an entry in Kconfig for Quark as a platform and
makes IMR support mandatory if selected.

Suggested-by: Thomas Gleixner <tglx@linutronix.de>
Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Tested-by: Ong, Boon Leong <boon.leong.ong@intel.com>
Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Reviewed-by: Andy Shevchenko <andy.schevchenko@gmail.com>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
Reviewed-by: Ong, Boon Leong <boon.leong.ong@intel.com>
Cc: dvhart@infradead.org
Link: http://lkml.kernel.org/r/1422635379-12476-3-git-send-email-pure.logic@nexus-software.ie
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-18 23:22:55 +01:00
Bryan O'Donoghue 28a375df16 x86/intel/quark: Add Isolated Memory Regions for Quark X1000
Intel's Quark X1000 SoC contains a set of registers called
Isolated Memory Regions. IMRs are accessed over the IOSF mailbox
interface. IMRs are areas carved out of memory that define
read/write access rights to the various system agents within the
Quark system. For a given agent in the system it is possible to
specify if that agent may read or write an area of memory
defined by an IMR with a granularity of 1 KiB.

Quark_SecureBootPRM_330234_001.pdf section 4.5 details the
concept of IMRs quark-x1000-datasheet.pdf section 12.7.4 details
the implementation of IMRs in silicon.

eSRAM flush, CPU Snoop write-only, CPU SMM Mode, CPU non-SMM
mode, RMU and PCIe Virtual Channels (VC0 and VC1) can have
individual read/write access masks applied to them for a given
memory region in Quark X1000. This enables IMRs to treat each
memory transaction type listed above on an individual basis and
to filter appropriately based on the IMR access mask for the
memory region. Quark supports eight IMRs.

Since all of the DMA capable SoC components in the X1000 are
mapped to VC0 it is possible to define sections of memory as
invalid for DMA write operations originating from Ethernet, USB,
SD and any other DMA capable south-cluster component on VC0.
Similarly it is possible to mark kernel memory as non-SMM mode
read/write only or to mark BIOS runtime memory as SMM mode
accessible only depending on the particular memory footprint on
a given system.

On an IMR violation Quark SoC X1000 systems are configured to
reset the system, so ensuring that the IMR memory map is
consistent with the EFI provided memory map is critical to
ensure no IMR violations reset the system.

The API for accessing IMRs is based on MTRR code but doesn't
provide a /proc or /sys interface to manipulate IMRs. Defining
the size and extent of IMRs is exclusively the domain of
in-kernel code.

Quark firmware sets up a series of locked IMRs around pieces of
memory that firmware owns such as ACPI runtime data. During boot
a series of unlocked IMRs are placed around items in memory to
guarantee no DMA modification of those items can take place.
Grub also places an unlocked IMR around the kernel boot params
data structure and compressed kernel image. It is necessary for
the kernel to tear down all unlocked IMRs in order to ensure
that the kernel's view of memory passed via the EFI memory map
is consistent with the IMR memory map. Without tearing down all
unlocked IMRs on boot transitory IMRs such as those used to
protect the compressed kernel image will cause IMR violations and system reboots.

The IMR init code tears down all unlocked IMRs and sets a
protective IMR around the kernel .text and .rodata as one
contiguous block. This sanitizes the IMR memory map with respect
to the EFI memory map and protects the read-only portions of the
kernel from unwarranted DMA access.

Tested-by: Ong, Boon Leong <boon.leong.ong@intel.com>
Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Reviewed-by: Andy Shevchenko <andy.schevchenko@gmail.com>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
Reviewed-by: Ong, Boon Leong <boon.leong.ong@intel.com>
Cc: andy.shevchenko@gmail.com
Cc: dvhart@infradead.org
Link: http://lkml.kernel.org/r/1422635379-12476-2-git-send-email-pure.logic@nexus-software.ie
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-18 23:22:47 +01:00
Ricardo Ribalda Delgado b273c2c2f2 x86/apic: Fix the devicetree build in certain configs
Without this patch:

  LD      init/built-in.o
  arch/x86/built-in.o: In function `dtb_lapic_setup': kernel/devicetree.c:155:
  undefined reference to `apic_force_enable'
  Makefile:923: recipe for target 'vmlinux' failed
  make: *** [vmlinux] Error 1

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: David Rientjes <rientjes@google.com>
Cc: Jan Beulich <JBeulich@suse.com>
Link: http://lkml.kernel.org/r/1422905231-16067-1-git-send-email-ricardo.ribalda@gmail.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-18 22:30:19 +01:00
Wang Nan b7e37567d0 kprobes/x86: Mark 2 bytes NOP as boostable
Currently, x86 kprobes is unable to boost 2 bytes nop like:

  nopl 0x0(%rax,%rax,1)

which is 0x0f 0x1f 0x44 0x00 0x00.

Such nops have exactly 5 bytes to hold a relative jmp
instruction. Boosting them should be obviously safe.

This patch enable boosting such nops by simply updating
twobyte_is_boostable[] array.

Signed-off-by: Wang Nan <wangnan0@huawei.com>
Acked-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: <lizefan@huawei.com>
Link: http://lkml.kernel.org/r/1423532045-41049-1-git-send-email-wangnan0@huawei.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-18 21:50:12 +01:00
Denys Vlasenko 5154d4f2ad uprobes/x86: Fix 2-byte opcode table
Enabled probing of lar, lsl, popcnt, lddqu, prefetch insns.
They should be safe to probe, they throw no exceptions.

Enabled probing of 3-byte opcodes 0f 38-3f xx - these are
vector isns, so should be safe.

Enabled probing of many currently undefined 0f xx insns.
At the rate new vector instructions are getting added,
we don't want to constantly enable more bits.
We want to only occasionally *disable* ones which
for some reason can't be probed.
This includes 0f 24,26 opcodes, which are undefined
since Pentium. On 486, they were "mov to/from test register".

Explained more fully what 0f 78,79 opcodes are.

Explained what 0f ae opcode is. (It's unclear why we don't allow
probing it, but let's not change it for now).

Signed-off-by: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Jim Keniston <jkenisto@us.ibm.com>
Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Srikar Dronamraju <srikar@linux.vnet.ibm.com>
Link: http://lkml.kernel.org/r/1423768732-32194-3-git-send-email-dvlasenk@redhat.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-18 20:55:53 +01:00
Denys Vlasenko 67fc809217 uprobes/x86: Fix 1-byte opcode tables
This change fixes 1-byte opcode tables so that only insns
for which we have real reasons to disallow probing are marked
with unset bits.

To that end:

Set bits for all prefix bytes. Their setting is ignored anyway -
we check the bitmap against OPCODE1(insn), not against first
byte. Keeping them set to 0 only confuses code reader with
"why we don't support that opcode" question.

Thus: enable bytes c4,c5 in 64-bit mode (VEX prefixes).
Byte 62 (EVEX prefix) is not yet enabled since insn decoder
does not support that yet.

For 32-bit mode, enable probing of opcodes 63 (arpl) and d6
(salc). They don't require any special handling.

For 64-bit mode, disable 9a and ea - these undefined opcodes
were mistakenly left enabled.

Signed-off-by: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Jim Keniston <jkenisto@us.ibm.com>
Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Srikar Dronamraju <srikar@linux.vnet.ibm.com>
Link: http://lkml.kernel.org/r/1423768732-32194-2-git-send-email-dvlasenk@redhat.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-18 20:55:51 +01:00
Denys Vlasenko 097f4e5e83 uprobes/x86: Add comment with insn opcodes, mnemonics and why we dont support them
After adding these, it's clear we have some awkward choices
there. Some valid instructions are prohibited from uprobing
while several invalid ones are allowed.

Hopefully future edits to the good-opcode tables will fix wrong
bits or explain why those bits are not wrong.

No actual code changes.

Signed-off-by: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Jim Keniston <jkenisto@us.ibm.com>
Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Srikar Dronamraju <srikar@linux.vnet.ibm.com>
Link: http://lkml.kernel.org/r/1423768732-32194-1-git-send-email-dvlasenk@redhat.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-18 20:55:46 +01:00
Linus Torvalds eaa0eda562 asm-generic: uaccess.h cleanup
Like in 3.19, I once more have a multi-stage cleanup for one asm-generic
 header file, this time the work was done by Michael Tsirkin and cleans
 up the uaccess.h file in asm-generic, as well as all architectures for
 which the respective maintainers did not pick up his patches directly.
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Merge tag 'asm-generic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic

Pull asm-generic uaccess.h cleanup from Arnd Bergmann:
 "Like in 3.19, I once more have a multi-stage cleanup for one
  asm-generic header file, this time the work was done by Michael
  Tsirkin and cleans up the uaccess.h file in asm-generic, as well as
  all architectures for which the respective maintainers did not pick up
  his patches directly"

* tag 'asm-generic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic: (37 commits)
  sparc32: nocheck uaccess coding style tweaks
  sparc64: nocheck uaccess coding style tweaks
  xtensa: macro whitespace fixes
  sh: macro whitespace fixes
  parisc: macro whitespace fixes
  m68k: macro whitespace fixes
  m32r: macro whitespace fixes
  frv: macro whitespace fixes
  cris: macro whitespace fixes
  avr32: macro whitespace fixes
  arm64: macro whitespace fixes
  arm: macro whitespace fixes
  alpha: macro whitespace fixes
  blackfin: macro whitespace fixes
  sparc64: uaccess_64 macro whitespace fixes
  sparc32: uaccess_32 macro whitespace fixes
  avr32: whitespace fix
  sh: fix put_user sparse errors
  metag: fix put_user sparse errors
  ia64: fix put_user sparse errors
  ...
2015-02-18 10:02:24 -08:00
Emil Medve 8f0ab1e141 powerpc/corenet: Enable CLK_QORIQ
Change-Id: I1a80ad7b9f6854791bd270b746f93a91439155a6
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Acked-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
2015-02-18 09:56:10 -08:00
Tomeu Vizoso 69b59cb817 MIPS: Alchemy: Remove bogus args from alchemy_clk_fgcs_detr
They were added to this function by mistake when they were added to the
clk_ops.determine_rate callback.

Fixes: 1c8e600440 ("clk: Add rate constraints to clocks")
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
2015-02-18 09:39:37 -08:00
Linus Torvalds 53861af9a1 OK, this has the big virtio 1.0 implementation, as specified by OASIS.
On top of tht is the major rework of lguest, to use PCI and virtio 1.0, to
 double-check the implementation.
 
 Then comes the inevitable fixes and cleanups from that work.
 
 Thanks,
 Rusty.
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Merge tag 'virtio-next-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux

Pull virtio updates from Rusty Russell:
 "OK, this has the big virtio 1.0 implementation, as specified by OASIS.

  On top of tht is the major rework of lguest, to use PCI and virtio
  1.0, to double-check the implementation.

  Then comes the inevitable fixes and cleanups from that work"

* tag 'virtio-next-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux: (80 commits)
  virtio: don't set VIRTIO_CONFIG_S_DRIVER_OK twice.
  virtio_net: unconditionally define struct virtio_net_hdr_v1.
  tools/lguest: don't use legacy definitions for net device in example launcher.
  virtio: Don't expose legacy net features when VIRTIO_NET_NO_LEGACY defined.
  tools/lguest: use common error macros in the example launcher.
  tools/lguest: give virtqueues names for better error messages
  tools/lguest: more documentation and checking of virtio 1.0 compliance.
  lguest: don't look in console features to find emerg_wr.
  tools/lguest: don't start devices until DRIVER_OK status set.
  tools/lguest: handle indirect partway through chain.
  tools/lguest: insert driver references from the 1.0 spec (4.1 Virtio Over PCI)
  tools/lguest: insert device references from the 1.0 spec (4.1 Virtio Over PCI)
  tools/lguest: rename virtio_pci_cfg_cap field to match spec.
  tools/lguest: fix features_accepted logic in example launcher.
  tools/lguest: handle device reset correctly in example launcher.
  virtual: Documentation: simplify and generalize paravirt_ops.txt
  lguest: remove NOTIFY call and eventfd facility.
  lguest: remove NOTIFY facility from demonstration launcher.
  lguest: use the PCI console device's emerg_wr for early boot messages.
  lguest: always put console in PCI slot #1.
  ...
2015-02-18 09:24:01 -08:00
Linus Torvalds ce1d3fde87 Merge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma
Pull dmaengine updates from Vinod Koul:
 "This update brings:

   - the big cleanup up by Maxime for device control and slave
     capabilities.  This makes the API much cleaner.

   - new IMG MDC driver by Andrew

   - new Renesas R-Car Gen2 DMA Controller driver by Laurent along with
     bunch of fixes on rcar drivers

   - odd fixes and updates spread over driver"

* 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (130 commits)
  dmaengine: pl330: add DMA_PAUSE feature
  dmaengine: pl330: improve pl330_tx_status() function
  dmaengine: rcar-dmac: Disable channel 0 when using IOMMU
  dmaengine: rcar-dmac: Work around descriptor mode IOMMU errata
  dmaengine: rcar-dmac: Allocate hardware descriptors with DMAC device
  dmaengine: rcar-dmac: Fix oops due to unintialized list in error ISR
  dmaengine: rcar-dmac: Fix spinlock issues in interrupt
  dmaenegine: edma: fix sparse warnings
  dmaengine: rcar-dmac: Fix uninitialized variable usage
  dmaengine: shdmac: extend PM methods
  dmaengine: shdmac: use SET_RUNTIME_PM_OPS()
  dmaengine: pl330: fix bug that cause start the same descs in cyclic
  dmaengine: at_xdmac: allow muliple dwidths when doing slave transfers
  dmaengine: at_xdmac: simplify channel configuration stuff
  dmaengine: at_xdmac: introduce save_cc field
  dmaengine: at_xdmac: wait for in-progress transaction to complete after pausing a channel
  ioat: fail self-test if wait_for_completion times out
  dmaengine: dw: define DW_DMA_MAX_NR_MASTERS
  dmaengine: dw: amend description of dma_dev field
  dmatest: move src_off, dst_off, len inside loop
  ...
2015-02-18 08:49:20 -08:00
Linus Torvalds 402521b8f7 MTD updates for 3.20-rc1
NAND:
 
  * Add new Hisilicon NAND driver for Hip04
  * Add default reboot handler, to ensure all outstanding erase transactions
    complete in time
  * jz4740: convert to use GPIO descriptor API
  * Atmel: add support for sama5d4
  * Change default bitflip threshold to 75% of correction strength
  * Miscellaneous cleanups and bugfixes
 
 SPI NOR:
 
  * Freescale QuadSPI:
    - Fix a few probe() and remove() issues
    - Add a MAINTAINERS entry for this driver
    - Tweak transfer size to increase read performance
    - Add suspend/resume support
  * Add Micron quad I/O support
  * ST FSM SPI: miscellaneous fixes
 
 JFFS2:
 
  * gracefully handle corrupted 'offset' field found on flash
 
 Other:
 
  * bcm47xxpart: add tweaks for a few new devices
  * mtdconcat: set return lengths properly for mtd_write_oob()
  * map_ram: enable use with mtdoops
  * maps: support fallback to ROM/UBI for write-protected NOR flash
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Merge tag 'for-linus-20150216' of git://git.infradead.org/linux-mtd

Pull MTD updates from Brian Norris:
 "NAND:

   - Add new Hisilicon NAND driver for Hip04
   - Add default reboot handler, to ensure all outstanding erase
     transactions complete in time
   - jz4740: convert to use GPIO descriptor API
   - Atmel: add support for sama5d4
   - Change default bitflip threshold to 75% of correction strength
   - Miscellaneous cleanups and bugfixes

  SPI NOR:

   - Freescale QuadSPI:
   - Fix a few probe() and remove() issues
   - Add a MAINTAINERS entry for this driver
   - Tweak transfer size to increase read performance
   - Add suspend/resume support
   - Add Micron quad I/O support
   - ST FSM SPI: miscellaneous fixes

  JFFS2:

   - gracefully handle corrupted 'offset' field found on flash

  Other:

   - bcm47xxpart: add tweaks for a few new devices
   - mtdconcat: set return lengths properly for mtd_write_oob()
   - map_ram: enable use with mtdoops
   - maps: support fallback to ROM/UBI for write-protected NOR flash"

* tag 'for-linus-20150216' of git://git.infradead.org/linux-mtd: (46 commits)
  mtd: hisilicon: && vs & typo
  jffs2: fix handling of corrupted summary length
  mtd: hisilicon: add device tree binding documentation
  mtd: hisilicon: add a new NAND controller driver for hisilicon hip04 Soc
  mtd: avoid registering reboot notifier twice
  mtd: concat: set the return lengths properly
  mtd: kconfig: replace PPC_OF with PPC
  mtd: denali: remove unnecessary stubs
  mtd: nand: remove redundant local variable
  MAINTAINERS: add maintainer entry for FREESCALE QUAD SPI driver
  mtd: fsl-quadspi: improve read performance by increase AHB transfer size
  mtd: fsl-quadspi: Remove unnecessary 'map_failed' label
  mtd: fsl-quadspi: Remove unneeded success/error messages
  mtd: fsl-quadspi: Fix the error paths
  mtd: nand: omap: drop condition with no effect
  mtd: nand: jz4740: Convert to GPIO descriptor API
  mtd: nand: Request strength instead of bytes for soft BCH
  mtd: nand: default bitflip-reporting threshold to 75% of correction strength
  mtd: atmel_nand: introduce a new compatible string for sama5d4 chip
  mtd: atmel_nand: return max bitflips in all sectors in pmecc_correction()
  ...
2015-02-18 08:01:44 -08:00
Joerg Roedel d97eb8966c x86/irq: Check for valid irq descriptor in check_irq_vectors_for_cpu_disable()
When an interrupt is migrated away from a cpu it will stay
in its vector_irq array until smp_irq_move_cleanup_interrupt
succeeded. The cfg->move_in_progress flag is cleared already
when the IPI was sent.

When the interrupt is destroyed after migration its 'struct
irq_desc' is freed and the vector_irq arrays are cleaned up.
But since cfg->move_in_progress is already 0 the references
at cpus before the last migration will not be cleared. So
this would leave a reference to an already destroyed irq
alive.

When the cpu is taken down at this point, the
check_irq_vectors_for_cpu_disable() function finds a valid irq
number in the vector_irq array, but gets NULL for its
descriptor and dereferences it, causing a kernel panic.

This has been observed on real systems at shutdown. Add a
check to check_irq_vectors_for_cpu_disable() for a valid
'struct irq_desc' to prevent this issue.

Signed-off-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Jiang Liu <jiang.liu@linux.intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Jan Beulich <JBeulich@suse.com>
Cc: K. Y. Srinivasan <kys@microsoft.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Prarit Bhargava <prarit@redhat.com>
Cc: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: alnovak@suse.com
Cc: joro@8bytes.org
Link: http://lkml.kernel.org/r/20150204132754.GA10078@suse.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-18 15:01:42 +01:00
Jiang Liu 1ea76fbadd x86/irq: Fix regression caused by commit b568b8601f
Commit b568b8601f ("Treat SCI interrupt as normal GSI interrupt")
accidently removes support of legacy PIC interrupt when fixing a
regression for Xen, which causes a nasty regression on HP/Compaq
nc6000 where we fail to register the ACPI interrupt, and thus
lose eg. thermal notifications leading a potentially overheated
machine.

So reintroduce support of legacy PIC based ACPI SCI interrupt.

Reported-by: Ville Syrjälä <syrjala@sci.fi>
Tested-by: Ville Syrjälä <syrjala@sci.fi>
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Pavel Machek <pavel@ucw.cz>
Cc: <stable@vger.kernel.org> # 3.19+
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Len Brown <len.brown@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Sander Eikelenboom <linux@eikelenboom.it>
Cc: linux-pm@vger.kernel.org
Link: http://lkml.kernel.org/r/1424052673-22974-1-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-18 15:01:41 +01:00
Raghavendra K T d6abfdb202 x86/spinlocks/paravirt: Fix memory corruption on unlock
Paravirt spinlock clears slowpath flag after doing unlock.
As explained by Linus currently it does:

                prev = *lock;
                add_smp(&lock->tickets.head, TICKET_LOCK_INC);

                /* add_smp() is a full mb() */

                if (unlikely(lock->tickets.tail & TICKET_SLOWPATH_FLAG))
                        __ticket_unlock_slowpath(lock, prev);

which is *exactly* the kind of things you cannot do with spinlocks,
because after you've done the "add_smp()" and released the spinlock
for the fast-path, you can't access the spinlock any more.  Exactly
because a fast-path lock might come in, and release the whole data
structure.

Linus suggested that we should not do any writes to lock after unlock(),
and we can move slowpath clearing to fastpath lock.

So this patch implements the fix with:

 1. Moving slowpath flag to head (Oleg):
    Unlocked locks don't care about the slowpath flag; therefore we can keep
    it set after the last unlock, and clear it again on the first (try)lock.
    -- this removes the write after unlock. note that keeping slowpath flag would
    result in unnecessary kicks.
    By moving the slowpath flag from the tail to the head ticket we also avoid
    the need to access both the head and tail tickets on unlock.

 2. use xadd to avoid read/write after unlock that checks the need for
    unlock_kick (Linus):
    We further avoid the need for a read-after-release by using xadd;
    the prev head value will include the slowpath flag and indicate if we
    need to do PV kicking of suspended spinners -- on modern chips xadd
    isn't (much) more expensive than an add + load.

Result:
 setup: 16core (32 cpu +ht sandy bridge 8GB 16vcpu guest)
 benchmark overcommit %improve
 kernbench  1x           -0.13
 kernbench  2x            0.02
 dbench     1x           -1.77
 dbench     2x           -0.63

[Jeremy: Hinted missing TICKET_LOCK_INC for kick]
[Oleg: Moved slowpath flag to head, ticket_equals idea]
[PeterZ: Added detailed changelog]

Suggested-by: Linus Torvalds <torvalds@linux-foundation.org>
Reported-by: Sasha Levin <sasha.levin@oracle.com>
Tested-by: Sasha Levin <sasha.levin@oracle.com>
Signed-off-by: Raghavendra K T <raghavendra.kt@linux.vnet.ibm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Oleg Nesterov <oleg@redhat.com>
Cc: Andrew Jones <drjones@redhat.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: Christoph Lameter <cl@linux.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Dave Jones <davej@redhat.com>
Cc: David Vrabel <david.vrabel@citrix.com>
Cc: Fernando Luis Vázquez Cao <fernando_b1@lab.ntt.co.jp>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Ulrich Obergfell <uobergfe@redhat.com>
Cc: Waiman Long <Waiman.Long@hp.com>
Cc: a.ryabinin@samsung.com
Cc: dave@stgolabs.net
Cc: hpa@zytor.com
Cc: jasowang@redhat.com
Cc: jeremy@goop.org
Cc: paul.gortmaker@windriver.com
Cc: riel@redhat.com
Cc: tglx@linutronix.de
Cc: waiman.long@hp.com
Cc: xen-devel@lists.xenproject.org
Link: http://lkml.kernel.org/r/20150215173043.GA7471@linux.vnet.ibm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-18 14:53:49 +01:00
Ingo Molnar 829bf7af64 * Leave a valid 64-bit IDT installed during runtime EFI mixed mode
calls to avoid triple faults if an NMI/MCE is received.
 
  * Revert Ard's change to the libstub get_memory_map() that went into
    the v3.20 merge window because it causes boot regressions on Qemu and
    Xen.
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Merge tag 'efi-urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/mfleming/efi into x86/urgent

Pull EFI fixes from Matt Fleming:

" - Leave a valid 64-bit IDT installed during runtime EFI mixed mode
    calls to avoid triple faults if an NMI/MCE is received.

  - Revert Ard's change to the libstub get_memory_map() that went into
    the v3.20 merge window because it causes boot regressions on Qemu and
    Xen. "

Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-02-18 14:40:40 +01:00
Paul Bolle d88d6cfc91 ARM: mm: Remove Kconfig symbol CACHE_PL310
Commit 20e783e39e ("ARM: 8296/1: cache-l2x0: clean up aurora cache
handling") removed the only user of the Kconfig symbol CACHE_PL310.
Setting CACHE_PL310 is now pointless. Remove its Kconfig entry, and one
select of this symbol.

Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-02-18 12:24:29 +01:00
Arnd Bergmann f495fe8998 Merge tag 'arm-soc/for-3.20/dts' of http://github.com/broadcom/stblinux into fixes
This pull request contains the following Broadcom SoCs Device Tree changes:

- Ray adds support for the Cygnus i2c Device Tree controller on Cygnus SoCs
- Fixes to the BCM63138 dtsi file for the L2 cache controller properties

* tag 'arm-soc/for-3.20/dts' of http://github.com/broadcom/stblinux:
  ARM: dts: add I2C device nodes for Broadcom Cygnus
  ARM: dts: BCM63xx: fix L2 cache properties
2015-02-18 12:21:54 +01:00
Arnd Bergmann d1bef995f6 ARM: rockchip: force built-in regulator support for PM
The rockchips suspend/resume code requires regulators to work,
and gives a compile-time error if they are not available:

arch/arm/mach-rockchip/built-in.o: In function `rk3288_suspend_finish':
:(.text+0x146): undefined reference to `regulator_suspend_finish'
arch/arm/mach-rockchip/built-in.o: In function `rk3288_suspend_prepare':
:(.text+0x18e): undefined reference to `regulator_suspend_prepare'

To solve this, we now enable regulators whenever they are needed,
which is what we do on a lot of other platforms as well.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-02-18 12:20:30 +01:00
Arnd Bergmann 165235180f ARM: mvebu: build armada375-smp code conditionally
mvebu_armada375_smp_wa_init is only used on armada 375 but is defined
for all mvebu machines. As it calls a function that is only provided
sometimes, this can result in a link error:

arch/arm/mach-mvebu/built-in.o: In function `mvebu_armada375_smp_wa_init':
:(.text+0x228): undefined reference to `mvebu_setup_boot_addr_wa'

To solve this, we can just change the existing #ifdef around the
function to also check for Armada375 SMP platforms.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: 305969fb62 ("ARM: mvebu: use the common function for Armada 375 SMP workaround")
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Gregory Clement <gregory.clement@free-electrons.com>
2015-02-18 12:20:29 +01:00
Arnd Bergmann 1fd01aa217 ARM: sti: always enable RESET_CONTROLLER
A lot of the sti device drivers require reset controller support,
but do not all have individual 'depends on RESET_CONTROLLER'
statements. Using 'select' here once avoids a lot of build errors
resulting from this.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Cc: Srinivas Kandagatla <srinivas.kandagatla@gmail.com>
2015-02-18 12:20:29 +01:00
Arnd Bergmann c8823e7a9e ARM: rockchip: make rockchip_suspend_init conditional
If CONFIG_PM_SLEEP is disabled, we get a build error for rockchips:

arch/arm/mach-rockchip/built-in.o: In function `rockchip_dt_init':
:(.init.text+0x1c): undefined reference to `rockchip_suspend_init'

This adds an inline alternative for that case.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Cc: linux-rockchip@lists.infradead.org
2015-02-18 12:20:28 +01:00
Arnd Bergmann 1aeb3c5c48 ARM: ixp4xx: fix {in,out}s{bwl} data types
Most platforms use void pointer arguments in these functions, but
ixp4xx does not, which triggers lots of warnings in device drivers like:

net/ethernet/8390/ne2k-pci.c: In function 'ne2k_pci_get_8390_hdr':
net/ethernet/8390/ne2k-pci.c:503:3: warning: passing argument 2 of 'insw' from incompatible pointer type
   insw(NE_BASE + NE_DATAPORT, hdr, sizeof(struct e8390_pkt_hdr)>>1);
   ^
In file included from include/asm/io.h:214:0,
                 from /git/arm-soc/include/linux/io.h:22,
                 from /git/arm-soc/include/linux/pci.h:31,
                 from net/ethernet/8390/ne2k-pci.c:48:
mach-ixp4xx/include/mach/io.h:316:91: note: expected 'u16 *' but argument is of type 'struct e8390_pkt_hdr *'
 static inline void insw(u32 io_addr, u16 *vaddr, u32 count)

Fixing the drivers seems hopeless, so this changes the ixp4xx code
to do the same as the others to avoid the warnings.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Krzysztof Halasa <khalasa@piap.pl>
Cc: Imre Kaloz <kaloz@openwrt.org>
2015-02-18 12:20:27 +01:00
Arnd Bergmann d76f733dda ARM: prima2: do not select SMP_ON_UP
The new Atlas7 platform implicitly selects 'CONFIG_SMP_ON_UP',
which leads to problems if we enable building the platform without
MMU, as that combination is not allowed and causes a link error:

arch/arm/kernel/built-in.o: In function `c_show':
:(.text+0x1872): undefined reference to `smp_on_up'
:(.text+0x1876): undefined reference to `smp_on_up'
arch/arm/kernel/built-in.o: In function `arch_irq_work_raise':
:(.text+0x3d48): undefined reference to `smp_on_up'
:(.text+0x3d4c): undefined reference to `smp_on_up'
arch/arm/kernel/built-in.o: In function `smp_setup_processor_id':
:(.init.text+0x180): undefined reference to `smp_on_up'

This removes the 'select' statement.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: 4cba058526 ("ARM: sirf: add Atlas7 machine support")
Acked-by: Barry Song <Baohua.Song@csr.com>
Cc: Zhiwu Song <Zhiwu.Song@csr.com>
2015-02-18 12:20:27 +01:00
Arnd Bergmann a91c5824dd ARM: at91: fix pm declarations
In a recent rearrangement of the at91 pm initialization code, a broken
set of declarations was added for the !CONFIG_PM-case, leading to
this link error:

arch/arm/mach-at91/board-dt-sama5.o: In function `at91_rm9200_pm_init':
arch/arm/mach-at91/generic.h:40: multiple definition of `at91_rm9200_pm_init'
arch/arm/mach-at91/setup.o:arch/arm/mach-at91/generic.h:40: first defined here
arch/arm/mach-at91/board-dt-sama5.o: In function `at91_sam9260_pm_init':
arch/arm/mach-at91/generic.h:41: multiple definition of `at91_sam9260_pm_init'
arch/arm/mach-at91/setup.o:arch/arm/mach-at91/generic.h:41: first defined here
arch/arm/mach-at91/board-dt-sama5.o: In function `at91_sam9g45_pm_init':
arch/arm/mach-at91/generic.h:42: multiple definition of `at91_sam9g45_pm_init'
arch/arm/mach-at91/setup.o:arch/arm/mach-at91/generic.h:42: first defined here

This adds the missing 'static inline' to the declarations to avoid
creating a copy of the functions in each file that includes the
header.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: 4db0ba22da ("ARM: at91: pm: prepare for multiplatform")
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2015-02-18 12:20:26 +01:00
Arnd Bergmann 99bd667a34 ARM: davinci: multi-soc kernels require AUTO_ZRELADDR
The davinci DA8xx and DMx families have incompatible zreladdr
settings, and attempting to build a kernel with both enabled
results in an error unless AUTO_ZRELADDR is set:

multiple zreladdrs: 0xc0008000 0x80008000
This needs CONFIG_AUTO_ZRELADDR to be set

This patch changes Kconfig to make the two families mutually
exclusive when this is unset.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
2015-02-18 12:20:25 +01:00
Arnd Bergmann 31612d6484 ARM: davinci: davinci_cfg_reg cannot be init
davinci_cfg_reg gets called from a lot of locations that
might get called after the init section has been discarded,
so the function itself must not be marked __init either.

The kernel build currently warns about this with lots of
messages like:

WARNING: vmlinux.o(.text.unlikely+0x24c): Section mismatch in reference from the function dm365evm_mmc_configure() to the function .init.text:davinci_cfg_reg()
The function dm365evm_mmc_configure() references
the function __init davinci_cfg_reg().
This is often because dm365evm_mmc_configure lacks a __init
annotation or the annotation of davinci_cfg_reg is wrong.

This removes the extraneous __init_or_module annotation.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
2015-02-18 12:20:25 +01:00
Arnd Bergmann ff34cae5b4 ARM: BCM: put back ARCH_MULTI_V7 dependency for mobile
A recent cleanup rearranged the Kconfig file for mach-bcm and
accidentally dropped the dependency on ARCH_MULTI_V7, which
makes it possible to now build the two mobile SoC platforms
on an ARMv6-only kernel, resulting in a log of Kconfig
warnings like

warning: ARCH_BCM_MOBILE selects ARM_ERRATA_775420 which has unmet direct dependencies (CPU_V7)

and which of course cannot work on any machine.

This puts back the dependencies as before.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: 64e74aa788 ("ARM: mach-bcm: ARCH_BCM_MOBILE: remove one level of menu from Kconfig")
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Scott Branden <sbranden@broadcom.com>
2015-02-18 12:20:08 +01:00
Arnd Bergmann 95fcedb027 ARM: vexpress: use ARM_CPU_SUSPEND if needed
The vexpress tc2 power management code calls mcpm_loopback, which
is only available if ARM_CPU_SUSPEND is enabled, otherwise we
get a link error:

arch/arm/mach-vexpress/built-in.o: In function `tc2_pm_init':
arch/arm/mach-vexpress/tc2_pm.c:389: undefined reference to `mcpm_loopback'

This explicitly selects ARM_CPU_SUSPEND like other platforms that
need it.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: 3592d7e002 ("ARM: 8082/1: TC2: test the MCPM loopback during boot")
Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Cc: Kevin Hilman <khilman@linaro.org>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2015-02-18 12:19:09 +01:00
Linus Torvalds d96c757efa Fix regression - functions on the mce notifier chain should
not be able to decide that an event should not be logged
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Merge tag 'please-pull-fixmcelog' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras

Pull mcelog regression fix from Tony Luck:
 "Fix regression - functions on the mce notifier chain should not be
  able to decide that an event should not be logged"

* tag 'please-pull-fixmcelog' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
  x86/mce: Fix regression. All error records should report via /dev/mcelog
2015-02-17 17:03:07 -08:00
Linus Torvalds e2b74f232e Merge branch 'akpm' (patches from Andrew)
Merge yet more updates from Andrew Morton:

 - a pile of minor fs fixes and cleanups

 - kexec updates

 - random misc fixes in various places: vmcore, rbtree, eventfd, ipc, seccomp.

 - a series of python-based kgdb helper scripts

* emailed patches from Andrew Morton <akpm@linux-foundation.org>: (58 commits)
  seccomp: cap SECCOMP_RET_ERRNO data to MAX_ERRNO
  samples/seccomp: improve label helper
  ipc,sem: use current->state helpers
  scripts/gdb: disable pagination while printing from breakpoint handler
  scripts/gdb: define maintainer
  scripts/gdb: convert CpuList to generator function
  scripts/gdb: convert ModuleList to generator function
  scripts/gdb: use a generator instead of iterator for task list
  scripts/gdb: ignore byte-compiled python files
  scripts/gdb: port to python3 / gdb7.7
  scripts/gdb: add basic documentation
  scripts/gdb: add lx-lsmod command
  scripts/gdb: add class to iterate over CPU masks
  scripts/gdb: add lx_current convenience function
  scripts/gdb: add internal helper and convenience function for per-cpu lookup
  scripts/gdb: add get_gdbserver_type helper
  scripts/gdb: add internal helper and convenience function to retrieve thread_info
  scripts/gdb: add is_target_arch helper
  scripts/gdb: add helper and convenience function to look up tasks
  scripts/gdb: add task iteration class
  ...
2015-02-17 14:35:02 -08:00
Geoff Levand b28c2ee868 kexec: add IND_FLAGS macro
Add a new kexec preprocessor macro IND_FLAGS, which is the bitwise OR of
all the possible kexec IND_ kimage_entry indirection flags.  Having this
macro allows for simplified code in the prosessing of the kexec
kimage_entry items.  Also, remove the local powerpc definition and use the
generic one.

Signed-off-by: Geoff Levand <geoff@infradead.org>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Vivek Goyal <vgoyal@redhat.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Maximilian Attems <max@stro.at>
Cc: Michal Marek <mmarek@suse.cz>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2015-02-17 14:34:51 -08:00
Linus Torvalds 9cd77374f0 Merge branch 'parisc-3.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux
Pull parisc update from Helge Deller:
 "The major change in here is the removal of the old HP-UX compat code
  which should have made it possible to load and execute 32-bit HP-UX
  binaries on PA-RISC Linux.  Since it was never functional and since
  nobody cares about old 32-bit HPUX binaries any longer, it's now time
  to free up 3200 lines of kernel code (CONFIG_HPUX and
  CONFIG_BINFMT_SOM).

  Other than that we wire up the execveat() syscall, fix sparse errors
  and have some whitespace cleanups"

* 'parisc-3.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
  fs/binfmt_som: Drop kernel support for HP-UX SOM binaries
  parisc: Remove unused function
  parisc: macro whitespace fixes
  parisc/uaccess: fix sparse errors
  parisc: hpux - Remove HPUX syscall numbers
  parisc: hpux - Remove hpux gateway page
  parisc: hpux - Delete files in hpux subdirectory
  parisc: hpux - Do not compile hpux subdirectory
  parisc: hpux - Drop support for HP-UX binaries
  parisc: Add error checks when building up signal trampoline handler
  parisc: Wire up execveat syscall
2015-02-17 14:25:58 -08:00
Linus Torvalds b0f0c26a2e nios2 for v3.20
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Merge tag 'nios2-v3.20-rc1' of git://git.rocketboards.org/linux-socfpga-next

Pull arch/nios2 update from Ley Foon Tan:
 "Here is the nios2 update for 3.20:

   - add early printk support
   - add kgdb support
   - add compressed kernel support
   - bugfixes"

* tag 'nios2-v3.20-rc1' of git://git.rocketboards.org/linux-socfpga-next:
  nios2: add kgdb support
  MAINTAINERS: update arch/nios2 git tree
  nios2: default CONFIG_NIOS2_BOOT_LINK_OFFSET to 8MB
  nios2: Add support for compressed kernel
  nios2: add early printk support
  nios2: Port OOM changes to do_page_fault()
  nios2: Remove unused prepare_to_copy()
2015-02-17 14:23:42 -08:00
Linus Torvalds cc4f9c2a91 ARM: SoC 64-bit changes and additions
The 64-bit set of updates this release cycle adds support for three new platforms:
 
 - Samsunc Exynos 7
 - Freescale LS2085a
 - Mediatek MT8173
 
 For all these, the changes mostly consititude additions of DT contents,
 but also some Kconfig entries to allow dependency/selection of drivers
 per-platform, etc.
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Merge tag '64bit-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC 64-bit changes and additions from Olof Johansson:
 "The 64-bit set of updates this release cycle adds support for three
  new platforms:

   - Samsunc Exynos 7
   - Freescale LS2085a
   - Mediatek MT8173

  For all these, the changes mostly consititude additions of DT
  contents, but also some Kconfig entries to allow dependency/selection
  of drivers per-platform, etc"

* tag '64bit-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  arm64: Kconfig: clean up two no-op Kconfig options from CONFIG_ARCH_TEGRA*
  arm64: Fix sort of platform Kconfig entries
  arm64: Add support for FSL's LS2085A SoC in Kconfig and defconfig
  arm64: Add DTS support for FSL's LS2085A SoC
  arm64: mediatek: Add MT8173 SoC Kconfig and defconfig
  arm64: dts: Add mediatek MT8173 SoC and evaluation board dts and Makefile
  Document: DT: Add bindings for mediatek MT8173 SoC Platform
  arm64: Add Tegra132 support
  arm64: Enable ARMv8 based exynos7 SoC support
  arm64: dts: Add nodes for mmc, i2c, rtc, watchdog, adc on exynos7
  arm64: dts: Add PMU DT node for exynos7 SoC
  arm64: dts: Add initial pinctrl support to exynos7
  arm64: dts: Add initial device tree support for exynos7
2015-02-17 09:47:46 -08:00
Linus Torvalds 03a40e2994 ARM: SoC defconfig changes
Most of these changes are to enable new drivers that have been merged, or
 various additions to make defconfigs more useful. There's also a set of patches
 trimming down omap2plus kernel size a bit since it is quite large.
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Merge tag 'defconfig-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC defconfig changes from Olof Johansson:
 "Most of these changes are to enable new drivers that have been merged,
  or various additions to make defconfigs more useful.  There's also a
  set of patches trimming down omap2plus kernel size a bit since it is
  quite large"

* tag 'defconfig-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (39 commits)
  ARM: config: add DEVTMPFS option by default to keystone config
  ARM: multi_v7_defconfig: Enable Exynos5420 Multi-Cluster PM support
  ARM: shmobile: Select CONFIG_REGULATOR in defconfig once again
  ARM: exynos_defconfig: Enable CONFIG_FHANDLE
  ARM: exynos_defconfig: Enable PMIC and MUIC drivers for Gears and Trats2
  ARM: exynos_defconfig: Enable CONFIG_LOCKUP_DETECTOR
  ARM: config: enable ARCH_HIP01
  ARM: omap2plus_defconfig: Enable OHCI & EHCI HCD support
  ARM: omap2plus_defconfig: Enable misc options for BeagleBoard-X15 platform
  ARM: imx_v6_v7_defconfig: enable more USB functions
  ARM: imx_v6_v7_defconfig: Select CONFIG_FB_MXS
  ARM: omap2plus_defconfig: Enable pcf857x
  ARM: omap2plus_defconfig: Add NOR flash support
  ARM: omap2plus_defconfig: Enable support for davinci_emac
  ARM: multi_v7_defconfig: Enable MiPHY28lp - ST's Generic (SATA, PCIe & USB3) PHY
  ARM: efm32: update defconfig
  ARM: at91: sama5: enable atmel-isi and ov2640 in defconfig
  ARM: multi_v7_defconfig: Enable Hip01 platform
  ARM: config: multi_v7: Update it for Keystone defconfig
  ARM: shmobile: Enable kzm9g board in multiplatform defconfig
  ...
2015-02-17 09:44:50 -08:00
Linus Torvalds 18656782a8 ARM: SoC driver updates
These are changes for drivers that are intimately tied to some SoC
 and for some reason could not get merged through the respective
 subsystem maintainer tree.
 
 This time around, much of this is for at91, with the bulk of it being syscon
 and udc drivers.
 
 Also, there's:
 - coupled cpuidle support for Samsung Exynos4210
 - Renesas 73A0 common-clk work
 - of/platform changes to tear down DMA mappings on device destruction
 - a few updates to the TI Keystone knav code
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Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Olof Johansson:
 "These are changes for drivers that are intimately tied to some SoC and
  for some reason could not get merged through the respective subsystem
  maintainer tree.

  This time around, much of this is for at91, with the bulk of it being
  syscon and udc drivers.

  Also, there's:
   - coupled cpuidle support for Samsung Exynos4210
   - Renesas 73A0 common-clk work
   - of/platform changes to tear down DMA mappings on device destruction
   - a few updates to the TI Keystone knav code"

* tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (26 commits)
  cpuidle: exynos: add coupled cpuidle support for exynos4210
  ARM: EXYNOS: apply S5P_CENTRAL_SEQ_OPTION fix only when necessary
  soc: ti: knav_qmss_queue: change knav_range_setup_acc_irq to static
  soc: ti: knav_qmss_queue: makefile tweak to build as dynamic module
  pcmcia: at91_cf: depend on !ARCH_MULTIPLATFORM
  soc: ti: knav_qmss_queue: export API calls for use by user driver
  of/platform: teardown DMA mappings on device destruction
  usb: gadget: at91_udc: Allocate udc instance
  usb: gadget: at91_udc: Update DT binding documentation
  usb: gadget: at91_udc: Rework for multi-platform kernel support
  usb: gadget: at91_udc: Simplify probe and remove functions
  usb: gadget: at91_udc: Remove non-DT handling code
  usb: gadget: at91_udc: Document DT clocks and clock-names property
  usb: gadget: at91_udc: Drop uclk clock
  usb: gadget: at91_udc: Fix clock names
  mfd: syscon: Add Atmel SMC binding doc
  mfd: syscon: Add atmel-smc registers definition
  mfd: syscon: Add Atmel Matrix bus DT binding documentation
  mfd: syscon: Add atmel-matrix registers definition
  clk: shmobile: fix sparse NULL pointer warning
  ...
2015-02-17 09:38:59 -08:00
Linus Torvalds a233bb742a ARM: SoC DT updates
DT changes continue to be the bulk of our merge window contents.
 
 We continue to have a large set of changes across the board as new platforms
 and drivers are added.
 
 Some of the new platforms are:
 - Alphascale ASM9260
 - Marvell Armada 388
 - CSR Atlas7
 - TI Davinci DM816x
 - Hisilicon HiP01
 - ST STiH418
 
 There have also been some sweeping changes, including relicensing of DTS
 contents from GPL to GPLv2+/X11 so that the same files can be reused in
 other non-GPL projects more easily. There's also been changes to the
 DT Makefile to make it a little less conflict-ridden and churny down
 the road.
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Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC DT updates from Olof Johansson:
 "DT changes continue to be the bulk of our merge window contents.

  We continue to have a large set of changes across the board as new
  platforms and drivers are added.

  Some of the new platforms are:
   - Alphascale ASM9260
   - Marvell Armada 388
   - CSR Atlas7
   - TI Davinci DM816x
   - Hisilicon HiP01
   - ST STiH418

  There have also been some sweeping changes, including relicensing of
  DTS contents from GPL to GPLv2+/X11 so that the same files can be
  reused in other non-GPL projects more easily.  There's also been
  changes to the DT Makefile to make it a little less conflict-ridden
  and churny down the road"

* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (330 commits)
  ARM: dts: Add PPMU node for exynos4412-trats2
  ARM: dts: Add PPMU node for exynos3250-monk and exynos3250-rinato
  ARM: dts: Add PPMU dt node for exynos4 and exynos4210
  ARM: dts: Add PPMU dt node for exynos3250
  ARM: dts: add mipi dsi device node for exynos4415
  ARM: dts: add fimd device node for exynos4415
  ARM: dts: Add syscon phandle to the video-phy node for Exynos4
  ARM: dts: Add sound nodes for exynos4412-trats2
  ARM: dts: Fix CLK_MOUT_CAMn parent clocks assignment for exynos4412-trats2
  ARM: dts: Fix CLK_UART_ISP_SCLK clock assignment in exynos4x12.dtsi
  ARM: dts: Add max77693 charger node for exynos4412-trats2
  ARM: dts: Switch max77686 regulators to GPIO control for exynos4412-trats2
  ARM: dts: Add suspend configuration for max77686 regulators for exynos4412-trats2
  ARM: dts: Add Maxim 77693 fuel gauge node for exynos4412-trats2
  ARM: dts: am57xx-beagle-x15: Fix USB2 mode
  ARM: dts: am57xx-beagle-x15: Add extcon nodes for USB
  ARM: dts: dra72-evm: Add extcon nodes for USB
  ARM: dts: dra7-evm: Add extcon nodes for USB
  ARM: dts: rockchip: move the hdmi ddc-i2c-bus property to the actual boards
  ARM: dts: rockchip: enable vops and hdmi output on rk3288-firefly and -evb
  ...
2015-02-17 09:36:52 -08:00
Linus Torvalds 878ba61aa9 ARM: SoC platform changes
New and updated SoC support. Also included are some cleanups where the
 platform maintainers hadn't separated cleanups from new developent in
 separate branches.
 
 Some of the larger things worth pointing out:
 
 - A large set of changes from Alexandre Belloni and Nicolas Ferre
   preparing at91 platforms for multiplatform and cleaning up quite a
   bit in the process.
 - Removal of CSR's "Marco" SoC platform that never made it out to the
   market. We love seeing these since it means the vendor published
   support before product was out, which is exactly what we want!
 
 New platforms this release are:
 
 - Conexant Digicolor (CX92755 SoC)
 - Hisilicon HiP01 SoC
 - CSR/sirf Atlas7 SoC
 - ST STiH418 SoC
 - Common code changes for Nvidia Tegra132 (64-bit SoC)
 
 We're seeing more and more platforms having a harder time labelling
 changes as cleanups vs new development -- which is a good sign that
 we've come quite far on the cleanup effort. So over time we might start
 combining the cleanup and new-development branches more.
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Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform changes from Olof Johansson:
 "New and updated SoC support.  Also included are some cleanups where
  the platform maintainers hadn't separated cleanups from new developent
  in separate branches.

  Some of the larger things worth pointing out:

   - A large set of changes from Alexandre Belloni and Nicolas Ferre
     preparing at91 platforms for multiplatform and cleaning up quite a
     bit in the process.

   - Removal of CSR's "Marco" SoC platform that never made it out to the
     market.  We love seeing these since it means the vendor published
     support before product was out, which is exactly what we want!

  New platforms this release are:

   - Conexant Digicolor (CX92755 SoC)
   - Hisilicon HiP01 SoC
   - CSR/sirf Atlas7 SoC
   - ST STiH418 SoC
   - Common code changes for Nvidia Tegra132 (64-bit SoC)

  We're seeing more and more platforms having a harder time labelling
  changes as cleanups vs new development -- which is a good sign that
  we've come quite far on the cleanup effort.  So over time we might
  start combining the cleanup and new-development branches more"

* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (124 commits)
  ARM: at91/trivial: unify functions and machine names
  ARM: at91: remove at91_dt_initialize and machine init_early()
  ARM: at91: change board files into SoC files
  ARM: at91: remove at91_boot_soc
  ARM: at91: move alternative initial mapping to board-dt-sama5.c
  ARM: at91: merge all SOC_AT91SAM9xxx
  ARM: at91: at91rm9200: set idle and restart from rm9200_dt_device_init()
  ARM: digicolor: select syscon and timer
  ARM: zynq: Simplify SLCR initialization
  ARM: zynq: PM: Fixed simple typo.
  ARM: zynq: Setup default gpio number for Xilinx Zynq
  ARM: digicolor: add low level debug support
  ARM: initial support for Conexant Digicolor CX92755 SoC
  ARM: OMAP2+: Add dm816x hwmod support
  ARM: OMAP2+: Add clock domain support for dm816x
  ARM: OMAP2+: Add board-generic.c entry for ti81xx
  ARM: at91: pm: remove warning to remove SOC_AT91SAM9263 usage
  ARM: at91: remove unused mach/system_rev.h
  ARM: at91: stop using HAVE_AT91_DBGUx
  ARM: at91: fix ordering of SRAM and PM initialization
  ...
2015-02-17 09:27:54 -08:00
Linus Torvalds ea7531ac4a ARM: SoC cleanups
This is a good healthy set of various code removals. Total net delta is 8100
 lines removed.
 
 Among the larger cleanups are:
 
 - Removal of old Samsung S3C DMA infrastructure by Arnd
 - Removal of the non-DT version of the 'lager' board by Magnus Damm
 - General stale code removal on OMAP and Davinci by Rickard Strandqvist
 - Removal of non-DT support on am3517 platforms by Tony Lindgren
 
 ... plus several other cleanups of various platforms across the board.
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Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC cleanups from Olof Johansson:
 "This is a good healthy set of various code removals.  Total net delta
  is 8100 lines removed.

  Among the larger cleanups are:

   - Removal of old Samsung S3C DMA infrastructure by Arnd
   - Removal of the non-DT version of the 'lager' board by Magnus Damm
   - General stale code removal on OMAP and Davinci by Rickard Strandqvist
   - Removal of non-DT support on am3517 platforms by Tony Lindgren

  ... plus several other cleanups of various platforms across the board"

* tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (47 commits)
  ARM: sirf: drop redundant function and marco declaration
  arm: omap: specify PMUs are for ARMv7 CPUs
  arm: shmobile: specify PMUs are for ARMv7 CPUs
  arm: iop: specify PMUs are for XScale CPUs
  arm: pxa: specify PMUs are for XScale CPUs
  arm: realview: specify PMU types
  ARM: SAMSUNG: remove unused DMA infrastructure
  ARM: OMAP3: Add back Kconfig option MACH_OMAP3517EVM for ASoC
  ARM: davinci: Remove CDCE949 driver
  ARM: at91: remove useless at91rm9200_set_type()
  ARM: at91: remove useless at91rm9200_dt_initialize()
  ARM: at91: move debug-macro.S into the common space
  ARM: at91: remove useless at91_sysirq_mask_rtx
  ARM: at91: remove useless config MACH_AT91SAM9_DT
  ARM: at91: remove useless config MACH_AT91RM9200_DT
  ARM: at91: remove unused mach/memory.h
  ARM: at91: remove useless header file includes
  ARM: at91: remove unneeded header file
  rtc: at91/Kconfig: remove useless options
  ARM: at91/Documentation: add a README for Atmel SoCs
  ...
2015-02-17 09:17:33 -08:00
Linus Torvalds 4025fa97ff ARM: SoC non-critical fixes
Here's a small collection of fixes accrued during the last release that weren't
 considered severe enough to merge during the -rc series.
 
 A few of these are around resurrecting TI81xx support that's been broken for
 quite a while, the rest are smaller fixes -- most for PXA but a few across
 the board.
 
 There are also some updates to MAINTAINERS here, in particular for Broadcom
 platforms.
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Merge tag 'fixes-non-critical-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC non-critical fixes from Olof Johansson:
 "Here's a small collection of fixes accrued during the last release
  that weren't considered severe enough to merge during the -rc series.

  A few of these are around resurrecting TI81xx support that's been
  broken for quite a while, the rest are smaller fixes -- most for PXA
  but a few across the board.

  There are also some updates to MAINTAINERS here, in particular for
  Broadcom platforms"

* tag 'fixes-non-critical-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (23 commits)
  MAINTAINERS: fix git repositories for Broadcom SoCs
  ARM: pxa: fix broken isa interrupts for zeus and viper
  ARM: DRA7: hwmod: Fix boot crash with DEBUG_LL enabled on UART3
  ARM: OMAP: DRA7: hwmod: Make gpmc software supervised as the smart idle is broken
  ARM: AM43xx: hwmod: set DSS submodule parent hwmods
  ARM: OMAP2+: hwmod: print error if wait_target_ready() failed
  MAINTAINERS: add maintainer for OMAP hwmod data
  ARM: OMAP2+: Disable omap3 PM init for ti81xx
  ARM: OMAP2+: Fix reboot for 81xx
  ARM: OMAP2+: Fix dm814 and dm816 for clocks and timer init
  ARM: OMAP2+: Fix ti81xx class type
  ARM: OMAP2+: Fix ti81xx devtype
  ARM: OMAP2+: Fix error handling for omap2_clk_enable_init_clocks
  MAINTAINERS: add a git entry for BMIPS-based BCM7xxx SoCs
  MAINTAINERS: add a git entry for BCM7xxx ARM-based SoCs
  MAINTAINERS: update Broadcom Cygnus SoC git tree
  MAINTAINERS: move BCM63xx ARM-based SoCs git tree
  hx4700: regulator: declare full constraints
  ARM: pxa: add regulator_has_full_constraints to spitz board file
  ARM: pxa: add regulator_has_full_constraints to poodle board file
  ...
2015-02-17 09:15:46 -08:00
Linus Torvalds c397f8fa43 Merge branch 'akpm' (patches from Andrew)
Merge fifth set of updates from Andrew Morton:

 - A few things which were awaiting merges from linux-next:
     - rtc
     - ocfs2
     - misc others

 - Willy's "dax" feature: direct fs access to memory (mainly NV-DIMMs)
   which isn't backed by pageframes.

* emailed patches from Andrew Morton <akpm@linux-foundation.org>: (37 commits)
  rtc: add driver for DS1685 family of real time clocks
  MAINTAINERS: add entry for Maxim PMICs on Samsung boards
  lib/Kconfig: use bool instead of boolean
  powerpc: drop _PAGE_FILE and pte_file()-related helpers
  ocfs2: set append dio as a ro compat feature
  ocfs2: wait for orphan recovery first once append O_DIRECT write crash
  ocfs2: complete the rest request through buffer io
  ocfs2: do not fallback to buffer I/O write if appending
  ocfs2: allocate blocks in ocfs2_direct_IO_get_blocks
  ocfs2: implement ocfs2_direct_IO_write
  ocfs2: add orphan recovery types in ocfs2_recover_orphans
  ocfs2: add functions to add and remove inode in orphan dir
  ocfs2: prepare some interfaces used in append direct io
  MAINTAINERS: fix spelling mistake & remove trailing WS
  dax: does not work correctly with virtual aliasing caches
  brd: rename XIP to DAX
  ext4: add DAX functionality
  dax: add dax_zero_page_range
  ext2: get rid of most mentions of XIP in ext2
  ext2: remove ext2_aops_xip
  ...
2015-02-17 08:38:30 -08:00
Markos Chandras f296e7c48d MIPS: Add Malta QEMU 32R6 defconfig
Add a Malta defconfig for the 32-bit MIPS R6 core as emulated
by QEMU.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:39 +00:00
Markos Chandras 575509b647 MIPS: Malta: Add support for building MIPS R6 kernel
The Malta platform supports MIPS R6 (via QEMU or real bitstreams)
so add support for it.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:39 +00:00
Markos Chandras 46490b5725 MIPS: kernel: elf: Improve the overall ABI and FPU mode checks
The previous implementation did not cover all possible FPU combinations
and it silently allowed ABI incompatible objects to be loaded with the
wrong ABI. For example, the previous logic would set the FP_64 ABI as
the matching ABI for an FP_XX object combined with an FP_64A object.
This was wrong, and the matching ABI should have been FP_64A.
The previous logic is now replaced with a new one which determines
the appropriate FPU mode to be used rather than the FP ABI. This has
the advantage that the entire logic is much simpler since it is the FPU
mode we are interested in rather than the FP ABI resulting to code
simplifications. This also removes the now obsolete FP32XX_HYBRID_FPRS
option.

Cc: Matthew Fortune <Matthew.Fortune@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:39 +00:00
Markos Chandras 6134d94923 MIPS: asm: fpu: Allow 64-bit FPU on MIPS32 R6
MIPS32 R6 has a 64-bit FPU so add the necessary MIPS R6
definition.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:38 +00:00
Markos Chandras 13e45f0957 MIPS: kernel: process: Do not allow FR=0 on MIPS R6
A prctl() call to set FR=0 for MIPS R6 should not be allowed
since FR=1 is the only option for R6 cores.

Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Matthew Fortune <matthew.fortune@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:38 +00:00
Markos Chandras e0d32f33e6 MIPS: Handle MIPS IV, V and R2 FPU instructions on MIPS R6 as well
MIPS R2 FPU instructions are also present in MIPS R6 so amend the
preprocessor definitions to take MIPS R6 into consideration.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:37 +00:00
Markos Chandras 7c151d3d5d MIPS: Make use of the ERETNC instruction on MIPS R6
The ERETNC instruction, introduced in MIPS R5, is similar to the ERET
one, except it does not clear the LLB bit in the LLADDR register.
This feature is necessary to safely emulate R2 LL/SC instructions.
However, on context switches, we need to clear the LLAddr/LLB bit
in order to make sure that an SC instruction from the new thread
will never succeed if it happens to interrupt an LL operation on the
same address from the previous thread.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:37 +00:00
Leonid Yegoshin b0a668fb20 MIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for MIPS R6
MIPS R6 removed quite a few R2 instructions. However, there
is plenty of <R6 userland code so we add an in-kernel emulator
so we can still be able to execute all R2 userland out there.

The emulator comes with a handy debugfs under /mips/ directory
(r2-emul-stats) to provide some basic statistics of the
instructions that are being emulated.

Below are some statistics from booting a minimal buildroot image:

Instruction     Total   BDslot
------------------------------
movs            236969  0
hilo            56686   0
muls            55279   0
divs            10941   0
dsps            0       0
bops            1       0
traps           0       0
fpus            0       0
loads           214981  17
stores          103364  0
llsc            56898   0
dsemul          150418  0
jr              370158
bltzl           43
bgezl           1594
bltzll          0
bgezll          0
bltzal          39
bgezal          39
beql            14503
bnel            138741
blezl           0
bgtzl           3988

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:37 +00:00
Markos Chandras b55b9e2715 MIPS: asm: mipsregs: Add support for the LLADDR register
If Config5/LLB is set in the core, then software can write the LLB
bit in the LLADDR register.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:36 +00:00
Markos Chandras 5aed9da128 MIPS: Add LLB bit and related feature for the Config 5 CP0 register
The LLBIT (bit 4) in the Config5 CP0 register indicates the software
availability of the Load-Linked bit. This bit is only set by hardware
and it has the following meaning:

0: LLB functionality is not supported
1: LLB functionality is supported. The following feature are also
supported:

- ERETNC instruction. Similar to ERET but it does not clear the LLB
bit in the LLAddr register.
- CP0 LLAddr/LLB bit must be set
- LLbit is software accessible through the LLAddr[0]

This will be used later on to emulate R2 LL/SC instructions.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:36 +00:00
Markos Chandras 28d6f93d20 MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructions
MIPS R6 uses the <R6 sdc2 opcode for the new BNEZC and JIALC instructions

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:35 +00:00
Markos Chandras 69b9a2fd05 MIPS: Emulate the new MIPS R6 BEQZC and JIC instructions
MIPS R6 uses the <R6 ldc2 opcode for the new BEQZC and JIC instructions

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:35 +00:00