The diagnostic register holds the errata bits. Mostly bootloader
does not bring up secondary cores, so that when errata bits are set
in bootloader, they are set only for boot cpu. But on a SMP
configuration, it should be equally done on every single core.
Set up the diagnostic register for secondary cores by replicating
the register from boot cpu.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
* late/fixes:
ARM: OMAP2+: Fix unmet direct dependencies for SERIAL_OMAP
ARM: ux500: always select ABX500_CORE
ARM: SIRF: select SMP_ON_UP only on SMP builds
ARM: SPEAr: conditionalize l2x0 support
ARM: imx: build CPU suspend code only when needed
ARM: OMAP: build SMP code only for OMAP4/5
ARM: tegra: Tegra114 needs CPU_FREQ_TABLE
ARM: default machine descriptor for multiplatform
Signed-off-by: Olof Johansson <olof@lixom.net>
The ARM CPU suspend function has its own configuration symbol,
which we need to use for conditionalizing any code calling into
it as well.
arch/arm/mach-imx/built-in.o: In function `v7_cpu_resume':
/git/arm-soc/arch/arm/mach-imx/headsmp.S:57: undefined
reference to `cpu_resume'
Cc: Sascha Hauer <kernel@pengutronix.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Building the kernel with allyesconfig fails because the i.mx early
resume code located in the .data section is unable to fixup the bl
relocation as the branch target gets too far away.
The idea of having code in the .data section allows for easy access to
nearby data using relative addressing while the MMU is off. However it
is probably best to move the code back to the .text section where it
belongs and fixup the data access instead. This solves the bl reloc
issue (at least until this becomes a general problem) and simplifies
the code as well.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
mach-socfpga is another platform that needs to use
v7_invalidate_l1 to bringup additional cores. There was a comment that
the ideal place for v7_invalidate_l1 should be in arm/mm/cache-v7.S
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Pavel Machek <pavel@denx.de>
Tested-by: Stephen Warren <swarren@nvidia.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Olof Johansson <olof@lixom.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The head-v7.S contains a call to the generic cpu_suspend function,
which is only available when selected by the i.MX6 code. As
pointed out by Shawn Guo, i.MX5 does not actually use any
functions defined in head-v7.S. It is also needed only for
the i.MX6 power management code and for the SMP code, so
we can restrict building this file to situations in which
at least one of those two is present.
Finally, other platforms with a similar file call it headsmp.S,
so we can rename it to the same for consistency.
Without this patch, building imx5 standalone results in:
arch/arm/mach-imx/built-in.o: In function `v7_cpu_resume':
arch/arm/mach-imx/head-v7.S:104: undefined reference to `cpu_resume'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Eric Miao <eric.miao@linaro.org>
Cc: stable@vger.kernel.org
Shawn Guo