Commit Graph

291 Commits

Author SHA1 Message Date
Bjorn Helgaas 6f119ec8d9 Merge branch 'pci/irq-error'
- Remove redundant logging for platform_get_irq() errors (Krzysztof
  Wilczyński)

* pci/irq-error:
  PCI: Remove dev_err() when handing an error from platform_get_irq()
2020-08-05 18:24:22 -05:00
Bjorn Helgaas 65c2bc6ce9 Merge branch 'pci/doc'
- Fix several kerneldoc warnings (Krzysztof Kozlowski)

* pci/doc:
  PCI: Fix kerneldoc warnings
2020-08-05 18:24:22 -05:00
Bjorn Helgaas 49e427e6bd Merge branch 'pci/host-probe-refactor'
- Use pci_host_bridge.windows list directly instead of splicing in a
  temporary list for cadence, mvebu, host-common (Rob Herring)

- Use pci_host_probe() instead of open-coding all the pieces for altera,
  brcmstb, iproc, mobiveil, rcar, rockchip, tegra, v3, versatile, xgene,
  xilinx, xilinx-nwl (Rob Herring)

- Convert to devm_platform_ioremap_resource_byname() instead of open-coding
  platform_get_resource_byname() and devm_ioremap_resource() for altera,
  cadence, mediatek, rockchip, tegra, xgene (Dejin Zheng)

- Convert to devm_platform_ioremap_resource() instead of open-coding
  platform_get_resource() and devm_ioremap_resource() for aardvark,
  brcmstb, exynos, ftpci100, versatile (Dejin Zheng)

- Remove redundant error messages from devm_pci_remap_cfg_resource()
  callers (Dejin Zheng)

- Drop useless PCI_ENABLE_PROC_DOMAINS from versatile driver (Rob Herring)

- Default host bridge parent device to the platform device (Rob Herring)

- Drop unnecessary zeroing of host bridge fields (Rob Herring)

- Use pci_is_root_bus() instead of tracking root bus number separately in
  aardvark, designware (imx6, keystone, designware-host), mobiveil,
  xilinx-nwl, xilinx, rockchip, rcar (Rob Herring)

- Set host bridge bus number in pci_scan_root_bus_bridge() instead of each
  driver for aardvark, designware-host, host-common, mediatek, rcar, tegra,
  v3-semi (Rob Herring)

- Use bridge resources instead of parsing DT 'ranges' again for cadence
  (Rob Herring)

- Remove private bus number and range from cadence (Rob Herring)

- Use devm_pci_alloc_host_bridge() to simplify rcar (Rob Herring)

- Use struct pci_host_bridge.windows list directly rather than a temporary
  (Rob Herring)

- Reduce OF "missing non-prefetchable window" from error to warning message
  (Rob Herring)

- Convert rcar-gen2 from old Arm-specific pci_common_init_dev() to new
  arch-independent interfaces (Rob Herring)

- Move DT resource setup into devm_pci_alloc_host_bridge() (Rob Herring)

- Set bridge map_irq and swizzle_irq to default functions; drivers that
  don't support legacy IRQs (iproc) need to undo this (Rob Herring)

* pci/host-probe-refactor:
  PCI: Set bridge map_irq and swizzle_irq to default functions
  PCI: Move DT resource setup into devm_pci_alloc_host_bridge()
  PCI: rcar-gen2: Convert to use modern host bridge probe functions
  PCI: of: Reduce missing non-prefetchable memory region to a warning
  PCI: rcar: Use struct pci_host_bridge.windows list directly
  PCI: rcar: Use devm_pci_alloc_host_bridge()
  PCI: cadence: Remove private bus number and range storage
  PCI: cadence: Use bridge resources for outbound window setup
  PCI: Move setting pci_host_bridge.busnr out of host drivers
  PCI: rcar: Use pci_is_root_bus() to check if bus is root bus
  PCI: rockchip: Use pci_is_root_bus() to check if bus is root bus
  PCI: xilinx: Use pci_is_root_bus() to check if bus is root bus
  PCI: xilinx-nwl: Use pci_is_root_bus() to check if bus is root bus
  PCI: mobiveil: Use pci_is_root_bus() to check if bus is root bus
  PCI: designware: Use pci_is_root_bus() to check if bus is root bus
  PCI: aardvark: Use pci_is_root_bus() to check if bus is root bus
  PCI: Drop unnecessary zeroing of bridge fields
  PCI: Set default bridge parent device
  PCI: versatile: Drop flag PCI_ENABLE_PROC_DOMAINS
  PCI: controller: Remove duplicate error message
  PCI: controller: Convert to devm_platform_ioremap_resource()
  PCI: controller: Convert to devm_platform_ioremap_resource_byname()
  PCI: xilinx: Use pci_host_probe() to register host
  PCI: xilinx-nwl: Use pci_host_probe() to register host
  PCI: rockchip: Use pci_host_probe() to register host
  PCI: rcar: Use pci_host_probe() to register host
  PCI: iproc: Use pci_host_probe() to register host
  PCI: altera: Use pci_host_probe() to register host
  PCI: xgene: Use pci_host_probe() to register host
  PCI: versatile: Use pci_host_probe() to register host
  PCI: v3: Use pci_host_probe() to register host
  PCI: tegra: Use pci_host_probe() to register host
  PCI: mobiveil: Use pci_host_probe() to register host
  PCI: brcmstb: Use pci_host_probe() to register host
  PCI: host-common: Use struct pci_host_bridge.windows list directly
  PCI: mvebu: Use struct pci_host_bridge.windows list directly
  PCI: cadence: Use struct pci_host_bridge.windows list directly

# Conflicts:
#	drivers/pci/controller/cadence/pcie-cadence-host.c
2020-08-05 18:24:21 -05:00
Bjorn Helgaas 21c04e050e Merge branch 'remotes/lorenzo/pci/runtime-pm'
- Fix runtime power management imbalance for cadence, dra7xx, qcom, rcar
  (Dinghao Liu)

* remotes/lorenzo/pci/runtime-pm:
  PCI: rcar: Fix runtime PM imbalance on error
  PCI: qcom: Fix runtime PM imbalance on error
  PCI: cadence: Fix runtime PM imbalance on error
  PCI: dwc: pci-dra7xx: Fix runtime PM imbalance on error
2020-08-05 18:24:20 -05:00
Bjorn Helgaas 26418025ce Merge branch 'remotes/lorenzo/pci/dwc'
- Add qcom ipq806x support (Ansuel Smith)

- Support max-link-speed DT property for qcom (Sham Muthayyan)

- Use PCI core #defines instead of adding qcom-specific ones (Ansuel Smith)

- Convert to devm_platform_ioremap_resource_byname() instead of open-coding
  platform_get_resource_byname() and devm_ioremap_resource() for dra7xx,
  keystone, artpec6, designware-plat, histb, intel-gw, kirin, qcom,
  uniphier (Dejin Zheng)

- Remove non-ECAM HiSilicon hip05/hip06 driver (Rob Herring)

* remotes/lorenzo/pci/dwc:
  PCI: dwc: hisi: Remove non-ECAM HiSilicon hip05/hip06 driver
  PCI: dwc: Convert to devm_platform_ioremap_resource_byname()
  PCI: qcom: Replace define with standard value
  PCI: qcom: Support pci speed set for ipq806x
  dt-bindings: PCI: qcom: Add ipq8064 rev 2 variant
  PCI: qcom: Add ipq8064 rev2 variant
  PCI: qcom: Add support for tx term offset for rev 2.1.0
  PCI: qcom: Define some PARF params needed for ipq8064 SoC
  PCI: qcom: Use bulk clk api and assert on error
  dt-bindings: PCI: qcom: Add ext reset
  PCI: qcom: Add missing reset for ipq806x
  PCI: qcom: Change duplicate PCI reset to phy reset
  dt-bindings: PCI: qcom: Add missing clks
  PCI: qcom: Add missing ipq806x clocks in PCIe driver
2020-08-05 18:24:18 -05:00
Krzysztof Kozlowski 9b41d19aff PCI: Fix kerneldoc warnings
Fix kerneldoc warnings, e.g.,

  $ make W=1 drivers/pci/
  drivers/pci/ats.c:196: warning: Function parameter or member 'pdev' not described in 'pci_enable_pri'
  drivers/pci/ats.c:196: warning: Function parameter or member 'reqs' not described in 'pci_enable_pri'
  ...

Link: https://lore.kernel.org/r/20200729201224.26799-2-krzk@kernel.org
Link: https://lore.kernel.org/r/20200729201224.26799-3-krzk@kernel.org
Link: https://lore.kernel.org/r/20200729201224.26799-4-krzk@kernel.org
Link: https://lore.kernel.org/r/20200729201224.26799-5-krzk@kernel.org
Link: https://lore.kernel.org/r/20200729201224.26799-6-krzk@kernel.org
Link: https://lore.kernel.org/r/20200729201224.26799-7-krzk@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2020-08-05 18:23:14 -05:00
Rob Herring b64aa11eb2 PCI: Set bridge map_irq and swizzle_irq to default functions
The majority of DT based host drivers use the default .map_irq() and
.swizzle_irq() functions, so let's initialize the function pointers to
the default and drop setting them in the host drivers.

Drivers like iProc which don't support legacy interrupts need to set
.map_irq() back to NULL.

Link: https://lore.kernel.org/r/20200722022514.1283916-20-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
2020-08-04 16:36:30 +01:00
Rob Herring 669cbc7081 PCI: Move DT resource setup into devm_pci_alloc_host_bridge()
Now that pci_parse_request_of_pci_ranges() callers just setup
pci_host_bridge.windows and dma_ranges directly and don't need the bus
range returned, we can just initialize them when allocating the
pci_host_bridge struct.

With this, pci_parse_request_of_pci_ranges() becomes a static function.

Link: https://lore.kernel.org/r/20200722022514.1283916-19-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
2020-08-04 16:36:30 +01:00
Krzysztof Wilczyński caecb05c80 PCI: Remove dev_err() when handing an error from platform_get_irq()
There is no need to call the dev_err() function directly to print a
custom message when handling an error from either the platform_get_irq() or
platform_get_irq_byname() functions as both are going to display an
appropriate error message in case of a failure.

This change is as per suggestions from Coccinelle, e.g.,

  drivers/pci/controller/dwc/pcie-armada8k.c:252:2-9: line 252 is
  redundant because platform_get_irq() already prints an error

[bhelgaas: squashed into one commit]
Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20200802142601.1635926-2-kw@linux.com
Link: https://lore.kernel.org/r/20200802142601.1635926-3-kw@linux.com
Link: https://lore.kernel.org/r/20200802142601.1635926-4-kw@linux.com
Link: https://lore.kernel.org/r/20200802142601.1635926-5-kw@linux.com
Link: https://lore.kernel.org/r/20200802142601.1635926-6-kw@linux.com
Link: https://lore.kernel.org/r/20200802142601.1635926-7-kw@linux.com
Link: https://lore.kernel.org/r/20200802142601.1635926-8-kw@linux.com
Link: https://lore.kernel.org/r/20200802142601.1635926-9-kw@linux.com
Link: https://lore.kernel.org/r/20200802142601.1635926-10-kw@linux.com
Link: https://lore.kernel.org/r/20200803071040.1663662-1-kw@linux.com
Signed-off-by: Krzysztof Wilczyński <kw@linux.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com> # altera
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> # dwc
2020-08-03 09:26:03 -05:00
Rob Herring c2fa6cf76d PCI: dwc: hisi: Remove non-ECAM HiSilicon hip05/hip06 driver
The HiSilicon non-ECAM PCIe has been broken since March 2016 commit
7e57fd1444 ("PCI: designware: Move Root Complex setup code to
dw_pcie_setup_rc()"). The reason is this commit moved the iATU setup code
from dw_pcie_host_init() to dw_pcie_setup_rc(), but the hisi driver never
calls dw_pcie_setup_rc(). The result is the PCI memory space is never
configured and the driver can't work. It's also clear it has an iATU as
the config space accesses use it.

There's also no dts file using either "hisilicon,hip05-pcie" or
"hisilicon,hip06-pcie".

Link: https://lore.kernel.org/r/20200724224204.3249055-1-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Zhou Wang <wangzhou1@hisilicon.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
2020-07-27 17:06:32 +01:00
Rob Herring 4f5c883d78 PCI: Move setting pci_host_bridge.busnr out of host drivers
Most host drivers only parse the DT bus range to set the root bus number
in pci_host_bridge.busnr. The ones that don't set busnr are buggy in
that they ignore what's in DT. Let's set busnr in pci_scan_root_bus_bridge()
where we already check for the bus resource and remove setting it in
host drivers.

Link: https://lore.kernel.org/r/20200722022514.1283916-12-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jingoo Han <jingoohan1@gmail.com>
Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Will Deacon <will@kernel.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Ryder Lee <ryder.lee@mediatek.com>
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: linux-tegra@vger.kernel.org
Cc: linux-mediatek@lists.infradead.org
Cc: linux-renesas-soc@vger.kernel.org
2020-07-23 17:13:06 +01:00
Rob Herring 5525493866 PCI: designware: Use pci_is_root_bus() to check if bus is root bus
Use pci_is_root_bus() rather than tracking the root bus number to
determine if the bus is the root bus or not. This removes storing
duplicated data as well as the need for the host bridge driver to have
to care about the bus numbers in most cases.

Link: https://lore.kernel.org/r/20200722022514.1283916-6-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Murali Karicheri <m-karicheri2@ti.com>
Cc: Jingoo Han <jingoohan1@gmail.com>
Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
2020-07-23 11:20:50 +01:00
Rob Herring 6a589900d0 PCI: Set default bridge parent device
The host bridge's parent device is always the platform device. As we
already have a pointer to it in the devres functions, let's initialize
the parent device. Drivers can still override the parent if desired.

Link: https://lore.kernel.org/r/20200722022514.1283916-3-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
2020-07-23 11:20:49 +01:00
Dejin Zheng da30e8bc9a PCI: controller: Remove duplicate error message
devm_pci_remap_cfg_resource() will print an error message by itself when
goes wrong, so remove the duplicate error message.

Link: https://lore.kernel.org/r/20200526150954.4729-1-zhengdejin5@gmail.com
Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2020-07-23 11:08:43 +01:00
Dejin Zheng 936fa5cd7b PCI: dwc: Convert to devm_platform_ioremap_resource_byname()
Use devm_platform_ioremap_resource_byname() to simplify the code
since it contains platform_get_resource_byname() and
devm_ioremap_resource() respectively.

Link: https://lore.kernel.org/r/20200708164013.5076-1-zhengdejin5@gmail.com
Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2020-07-17 17:15:08 +01:00
Dejin Zheng 3cf0eead9f PCI: controller: Convert to devm_platform_ioremap_resource()
Use devm_platform_ioremap_resource() to simplify the code, since t
contains platform_get_resource() and devm_ioremap_resource() calls
respectively.

Link: https://lore.kernel.org/r/20200708155614.308-1-zhengdejin5@gmail.com
Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2020-07-10 11:50:23 +01:00
Ansuel Smith 824001cb64 PCI: qcom: Replace define with standard value
Lots of define are actually already defined in pci_regs.h, directly use
the standard defines.

Link: https://lore.kernel.org/r/20200615210608.21469-13-ansuelsmth@gmail.com
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
2020-07-07 16:08:21 +01:00
Sham Muthayyan 51ed2c2b60 PCI: qcom: Support pci speed set for ipq806x
Some SoC based on ipq8064/5 needs to be limited to pci GEN1 speed due to
some hardware limitations. Add support for speed setting defined by the
max-link-speed binding. If not defined the max speed is set to GEN2 by
default.

Link: https://lore.kernel.org/r/20200615210608.21469-12-ansuelsmth@gmail.com
Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
2020-07-07 16:08:21 +01:00
Ansuel Smith 8df093fe2a PCI: qcom: Add ipq8064 rev2 variant
Ipq8064-v2 have tx term offset set to 0. Introduce this variant to permit
different offset based on the revision.

Link: https://lore.kernel.org/r/20200615210608.21469-10-ansuelsmth@gmail.com
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
2020-07-07 16:08:21 +01:00
Ansuel Smith de3c4bf648 PCI: qcom: Add support for tx term offset for rev 2.1.0
Add tx term offset support to pcie qcom driver need in some revision of
the ipq806x SoC. Ipq8064 needs tx term offset set to 7.

Link: https://lore.kernel.org/r/20200615210608.21469-9-ansuelsmth@gmail.com
Fixes: 82a823833f ("PCI: qcom: Add Qualcomm PCIe controller driver")
Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
Cc: stable@vger.kernel.org # v4.5+
2020-07-07 16:08:21 +01:00
Ansuel Smith 5149901e9e PCI: qcom: Define some PARF params needed for ipq8064 SoC
Set some specific value for Tx De-Emphasis, Tx Swing and Rx equalization
needed on some ipq8064 based device (Netgear R7800 for example). Without
this the system locks on kernel load.

Link: https://lore.kernel.org/r/20200615210608.21469-8-ansuelsmth@gmail.com
Fixes: 82a823833f ("PCI: qcom: Add Qualcomm PCIe controller driver")
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
Cc: stable@vger.kernel.org # v4.5+
2020-07-07 16:08:20 +01:00
Ansuel Smith 6a114526af PCI: qcom: Use bulk clk api and assert on error
Rework 2.1.0 revision to use bulk clk api and fix missing assert on
reset_control_deassert error.

Link: https://lore.kernel.org/r/20200615210608.21469-7-ansuelsmth@gmail.com
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
2020-07-07 16:08:20 +01:00
Ansuel Smith ee367e2cdd PCI: qcom: Add missing reset for ipq806x
Add missing ext reset used by ipq8064 SoC in PCIe qcom driver.

Link: https://lore.kernel.org/r/20200615210608.21469-5-ansuelsmth@gmail.com
Fixes: 82a823833f ("PCI: qcom: Add Qualcomm PCIe controller driver")
Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
Cc: stable@vger.kernel.org # v4.5+
2020-07-07 16:08:20 +01:00
Abhishek Sahu dd58318c01 PCI: qcom: Change duplicate PCI reset to phy reset
The deinit issues reset_control_assert for PCI twice and does not contain
phy reset.

Link: https://lore.kernel.org/r/20200615210608.21469-4-ansuelsmth@gmail.com
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
2020-07-07 16:08:20 +01:00
Ansuel Smith 8b6f0330b5 PCI: qcom: Add missing ipq806x clocks in PCIe driver
Aux and Ref clk are missing in PCIe qcom driver. Add support for this
optional clks for ipq8064/apq8064 SoC.

Link: https://lore.kernel.org/r/20200615210608.21469-2-ansuelsmth@gmail.com
Fixes: 82a823833f ("PCI: qcom: Add Qualcomm PCIe controller driver")
Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
2020-07-07 16:08:20 +01:00
Dinghao Liu cb52a40202 PCI: qcom: Fix runtime PM imbalance on error
pm_runtime_get_sync() increments the runtime PM usage counter even
when it returns an error code, thus a matching decrement is needed on
the error handling path to keep the counter balanced.

Link: https://lore.kernel.org/r/20200707055000.9453-1-dinghao.liu@zju.edu.cn
Signed-off-by: Dinghao Liu <dinghao.liu@zju.edu.cn>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2020-07-07 11:29:12 +01:00
Dinghao Liu c2615d620a PCI: dwc: pci-dra7xx: Fix runtime PM imbalance on error
pm_runtime_get_sync() increments the runtime PM usage counter even
it returns an error code. Thus a pairing decrement is needed on
the error handling path to keep the counter balanced.

Link: https://lore.kernel.org/r/20200520084756.31620-1-dinghao.liu@zju.edu.cn
Signed-off-by: Dinghao Liu <dinghao.liu@zju.edu.cn>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2020-07-07 11:29:12 +01:00
Alexander A. Klimov 7ecd4a8175 PCI: Replace http:// links with https://
Replace http:// links with https:// links.  This reduces the likelihood of
man-in-the-middle attacks when developers open these links.

  Deterministic algorithm:
  For each file:
    If not .svg:
      For each line:
	If doesn't contain `\bxmlns\b`:
	  For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
	    If both the HTTP and HTTPS versions
	    return 200 OK and serve the same content:
	      Replace HTTP with HTTPS.

[bhelgaas: also update samsung.com links, drop sourceforge link]
Link: https://lore.kernel.org/r/20200627103050.71712-1-grandmaster@al2klimov.de
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2020-06-30 13:05:09 -05:00
Bjorn Helgaas 62e8a5ad47 Merge branch 'remotes/lorenzo/pci/tegra'
- Fix error message for failure to get reset GPIO from DT (Pali Rohár)

  - Fix runtime PM imbalance on error path (both tegra and tegra194)
    (Dinghao Liu)

* remotes/lorenzo/pci/tegra:
  PCI: tegra: Fix runtime PM imbalance on error
  PCI: tegra194: Fix runtime PM imbalance on error
  PCI: tegra: Fix reporting GPIO error value
2020-06-04 12:59:19 -05:00
Bjorn Helgaas 51755de739 Merge branch 'remotes/lorenzo/pci/rcar'
- Fix rcar OB window programming (Andrew Murray)

  - Add rcar suspend/resume support (Kazufumi Ikeda)

  - Add r8a77961 to DT binding (Yoshihiro Shimoda)

  - Rename pcie-rcar.c to pcie-rcar-host.c to make room for endpoint mode
    (Lad Prabhakar)

  - Move shareable code to pcie-rcar.c (Lad Prabhakar)

  - Correct PCIEPAMR mask calculation for "size < 128" (Lad Prabhakar)

  - Add endpoint support for multiple outbound memory windows (Lad
    Prabhakar)

  - Add R-Car PCIe endpoint driver and DT bindings (Lad Prabhakar)

* remotes/lorenzo/pci/rcar:
  MAINTAINERS: Add file patterns for rcar PCI device tree bindings
  PCI: rcar: Add endpoint mode support
  dt-bindings: PCI: rcar: Add bindings for R-Car PCIe endpoint controller
  PCI: endpoint: Add support to handle multiple base for mapping outbound memory
  PCI: endpoint: Pass page size as argument to pci_epc_mem_init()
  PCI: rcar: Fix calculating mask for PCIEPAMR register
  PCI: rcar: Move shareable code to a common file
  PCI: rcar: Rename pcie-rcar.c to pcie-rcar-host.c
  dt-bindings: pci: rcar: add r8a77961 support
  PCI: rcar: Add suspend/resume
  PCI: rcar: Fix incorrect programming of OB windows
2020-06-04 12:59:18 -05:00
Bjorn Helgaas d388e541e2 Merge branch 'remotes/lorenzo/pci/host-generic'
- Constify struct pci_ecam_ops (Rob Herring)

  - Support building as modules (Rob Herring)

  - Eliminate wrappers for pci_host_common_probe() by using DT match table
    data (Rob Herring)

* remotes/lorenzo/pci/host-generic:
  PCI: host-generic: Eliminate pci_host_common_probe wrappers
  PCI: host-generic: Support building as modules
  PCI: Constify struct pci_ecam_ops

# Conflicts:
#	drivers/pci/controller/dwc/pcie-hisi.c
2020-06-04 12:59:16 -05:00
Bjorn Helgaas b9fcf4910b Merge branch 'remotes/lorenzo/pci/dwc'
- Simplify computation of msix_tbl (Jiri Slaby)

  - Make hisi_pcie_platform_ops static (Zou Wei)

  - Warn about resources above 4G (Alan Mikhak)

  - Make intel_pcie_cpu_addr() static (Jason Yan)

  - Use devm_platform_ioremap_resource_byname() to simplify code and
    improve error checking (Wei Yongjun)

  - Fix inner MSI IRQ domain registration so it doesn't confuse debugfs
    (Marc Zyngier)

  - Don't use FAST_LINK_MODE on meson (Marc Zyngier)

  - Add Socionext UniPhier Pro5 PCIe endpoint controller driver and DT
    description (Kunihiko Hayashi)

* remotes/lorenzo/pci/dwc:
  PCI: uniphier: Add Socionext UniPhier Pro5 PCIe endpoint controller driver
  dt-bindings: PCI: Add UniPhier PCIe endpoint controller description
  PCI: dwc: Use private data pointer of "struct irq_domain" to get pcie_port
  PCI: amlogic: meson: Don't use FAST_LINK_MODE to set up link
  PCI: dwc: Fix inner MSI IRQ domain registration
  PCI: dwc: pci-dra7xx: Use devm_platform_ioremap_resource_byname()
  PCI: dwc: intel: Make intel_pcie_cpu_addr() static
  PCI: dwc: Program outbound ATU upper limit register
  PCI: dwc: Make hisi_pcie_platform_ops static
  PCI: dwc: Clean up computing of msix_tbl
2020-06-04 12:59:15 -05:00
Bjorn Helgaas 9f91d05e4a Merge branch 'pci/misc'
- Clarify that platform_get_irq() should never return 0 (Bjorn Helgaas)

  - Check for platform_get_irq() failure consistently (Bjorn Helgaas)

  - Replace zero-length array with flexible-array (Gustavo A. R. Silva)

  - Unify pcie_find_root_port() and pci_find_pcie_root_port() (Yicong Yang)

  - Quirk Intel C620 MROMs, which have non-BARs in BAR locations (Xiaochun
    Lee)

  - Fix pcie_pme_resume() and pcie_pme_remove() kernel-doc (Jay Fang)

  - Rename _DSM constants to align with spec (Krzysztof Wilczyński)

* pci/misc:
  PCI: Rename _DSM constants to align with spec
  PCI/PME: Fix kernel-doc of pcie_pme_resume() and pcie_pme_remove()
  x86/PCI: Mark Intel C620 MROMs as having non-compliant BARs
  PCI: Unify pcie_find_root_port() and pci_find_pcie_root_port()
  PCI: Replace zero-length array with flexible-array
  PCI: Check for platform_get_irq() failure consistently
  driver core: platform: Clarify that IRQ 0 is invalid
2020-06-04 12:59:11 -05:00
Kunihiko Hayashi 8d7e33d681 PCI: uniphier: Add Socionext UniPhier Pro5 PCIe endpoint controller driver
Add driver for the Socionext UniPhier Pro5 SoC endpoint controller.
This controller is based on the DesignWare PCIe core.

And add "host" to existing controller descriontions for the host controller
in Kconfig.

Link: https://lore.kernel.org/r/1589457801-12796-3-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2020-06-04 10:03:18 +01:00
Dinghao Liu 1c1dbb2c02 PCI: tegra194: Fix runtime PM imbalance on error
pm_runtime_get_sync() increments the runtime PM usage counter even
when it returns an error code. Thus a pairing decrement is needed on
the error handling path to keep the counter balanced.

Link: https://lore.kernel.org/r/20200521031355.7022-1-dinghao.liu@zju.edu.cn
Signed-off-by: Dinghao Liu <dinghao.liu@zju.edu.cn>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Vidya Sagar <vidyas@nvidia.com>
2020-05-29 11:24:31 +01:00
Kishon Vijay Abraham I 03f8c1b350 PCI: dwc: Use private data pointer of "struct irq_domain" to get pcie_port
No functional change. Get "struct pcie_port *" from private data
pointer of "struct irq_domain" in dw_pcie_irq_domain_free() to make
it look similar to how "struct pcie_port *" is obtained in
dw_pcie_irq_domain_alloc()

Link: https://lore.kernel.org/r/20191220100550.777-1-kishon@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
2020-05-22 15:05:23 +01:00
Marc Zyngier 87dccf0932 PCI: amlogic: meson: Don't use FAST_LINK_MODE to set up link
The vim3l board does not work with a standard PCIe switch (ASM1184e),
spitting all kind of errors - hinting at HW misconfiguration (no link,
port enumeration issues, etc).

According to the the Synopsys DWC PCIe Reference Manual, in the section
dedicated to the PLCR register, bit 7 is described (FAST_LINK_MODE) as:

"Sets all internal timers to fast mode for simulation purposes."

it is sound to set this bit from a simulation perspective, but on actual
silicon, which expects timers to have a nominal value, it is not.

Make sure the FAST_LINK_MODE bit is cleared when configuring the RC
to solve this problem.

Link: https://lore.kernel.org/r/20200429164230.309922-1-maz@kernel.org
Fixes: 9c0ef6d34f ("PCI: amlogic: Add the Amlogic Meson PCIe controller driver")
Signed-off-by: Marc Zyngier <maz@kernel.org>
[lorenzo.pieralisi@arm.com: commit log]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
2020-05-22 15:05:23 +01:00
Marc Zyngier 0414b93e78 PCI: dwc: Fix inner MSI IRQ domain registration
On a system that uses the internal DWC MSI widget, I get this
warning from debugfs when CONFIG_GENERIC_IRQ_DEBUGFS is selected:

  debugfs: File ':soc:pcie@fc000000' in directory 'domains' already present!

This is due to the fact that the DWC MSI code tries to register two
IRQ domains for the same firmware node, without telling the low
level code how to distinguish them (by setting a bus token). This
further confuses debugfs which tries to create corresponding
files for each domain.

Fix it by tagging the inner domain as DOMAIN_BUS_NEXUS, which is
the closest thing we have as to "generic MSI".

Link: https://lore.kernel.org/r/20200501113921.366597-1-maz@kernel.org
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Jingoo Han <jingoohan1@gmail.com>
2020-05-22 15:05:23 +01:00
Wei Yongjun c8a119779f PCI: dwc: pci-dra7xx: Use devm_platform_ioremap_resource_byname()
platform_get_resource() may fail and return NULL, so we had better
check its return value to avoid a NULL pointer dereference a bit later
in the code. Fix it to use devm_platform_ioremap_resource_byname()
instead of calling platform_get_resource_byname() and devm_ioremap().

Link: https://lore.kernel.org/r/20200429015027.134485-1-weiyongjun1@huawei.com
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
[lorenzo.pieralisi@arm.com: commit log]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2020-05-22 15:05:23 +01:00
Jason Yan 558c1225a2 PCI: dwc: intel: Make intel_pcie_cpu_addr() static
Fix the following sparse warning:

drivers/pci/controller/dwc/pcie-intel-gw.c:456:5: warning: symbol
'intel_pcie_cpu_addr' was not declared. Should it be static?

Link: https://lore.kernel.org/r/20200415084953.6533-1-yanaijie@huawei.com
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Jason Yan <yanaijie@huawei.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2020-05-22 15:05:23 +01:00
Alan Mikhak 668b4490a3 PCI: dwc: Program outbound ATU upper limit register
Function dw_pcie_prog_outbound_atu_unroll() does not program the upper
32-bit ATU limit register. Since ATU programming functions limit the
size of the translated region to 4GB by using a u32 size parameter,
these issues may combine into undefined behavior for resource sizes
with non-zero upper 32-bits.

For example, a 128GB address space starting at physical CPU address of
0x2000000000 with size of 0x2000000000 needs the following values
programmed into the lower and upper 32-bit limit registers:
 0x3fffffff in the upper 32-bit limit register
 0xffffffff in the lower 32-bit limit register

Currently, only the lower 32-bit limit register is programmed with a
value of 0xffffffff but the upper 32-bit limit register is not being
programmed. As a result, the upper 32-bit limit register remains at its
default value after reset of 0x0.

These issues may combine to produce undefined behavior since the ATU
limit address may be lower than the ATU base address. Programming the
upper ATU limit address register prevents such undefined behavior despite
the region size getting truncated due to the 32-bit size limit.

Link: https://lore.kernel.org/r/1585785493-23210-1-git-send-email-alan.mikhak@sifive.com
Signed-off-by: Alan Mikhak <alan.mikhak@sifive.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
2020-05-22 15:05:23 +01:00
Lad Prabhakar d45e3c1a59 PCI: endpoint: Add support to handle multiple base for mapping outbound memory
R-Car PCIe controller has support to map multiple memory regions for
mapping the outbound memory in local system also the controller limits
single allocation for each region (that is, once a chunk is used from the
region it cannot be used to allocate a new one). This features inspires to
add support for handling multiple memory bases in endpoint framework.

With this patch pci_epc_mem_init() initializes address space for endpoint
controller which support single window and pci_epc_multi_mem_init()
initializes multiple windows supported by endpoint controller.

Link: https://lore.kernel.org/r/1588854799-13710-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2020-05-22 12:35:07 +01:00
Aman Sharma 0584bff096 PCI: Check for platform_get_irq() failure consistently
The platform_get_irq*() interfaces return either a negative error number or
a valid IRQ.  0 is not a valid return value, so check for "< 0" to detect
failure as recommended by the function documentation.

On failure, return the error number from platform_get_irq*() instead of
making up a new one.

Link: https://lore.kernel.org/r/cover.1583952275.git.amanharitsh123@gmail.com
[bhelgaas: commit log, squash into one patch]
Signed-off-by: Aman Sharma <amanharitsh123@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>
Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Ryder Lee <ryder.lee@mediatek.com>
Cc: Marc Gonzalez <marc.w.gonzalez@free.fr>
2020-05-12 08:14:43 -05:00
Rob Herring b2f75a41ea PCI: host-generic: Eliminate pci_host_common_probe wrappers
Most ECAM host drivers are just different pci_ecam_ops which can be DT
match table data. That's already the case in some cases, but let's
do that for all the ECAM drivers. Then we can use
of_device_get_match_data() in pci_host_common_probe() and eliminate the
probe wrapper functions and use pci_host_common_probe() directly for
probe.

Link: https://lore.kernel.org/r/20200409234923.21598-4-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Zhou Wang <wangzhou1@hisilicon.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Andrew Murray <amurray@thegoodpenguin.co.uk>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Will Deacon <will@kernel.org>
Cc: Robert Richter <rrichter@marvell.com>
Cc: Marc Gonzalez <marc.w.gonzalez@free.fr>
Cc: Mans Rullgard <mans@mansr.com>
Cc: linux-pci@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
2020-05-07 09:29:43 +01:00
Zou Wei 819482a967 PCI: dwc: Make hisi_pcie_platform_ops static
Fix the following sparse warning:

drivers/pci/controller/dwc/pcie-hisi.c:365:21: warning:
symbol 'hisi_pcie_platform_ops' was not declared. Should it be static?

Link: https://lore.kernel.org/r/1587611883-26960-1-git-send-email-zou_wei@huawei.com
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zou Wei <zou_wei@huawei.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com>
2020-05-05 11:02:46 +01:00
Jiri Slaby bf71162046 PCI: dwc: Clean up computing of msix_tbl
Commit 6f5e193bfb ("PCI: dwc: Fix dw_pcie_ep_raise_msix_irq() to get
correct MSI-X table address") overcomplicated the computation of the
msix_tbl address. Simplify it as it's simply the addr + offset. Provided
addr is (void *) already.

objdump -d shows no difference after this patch.

Link: https://lore.kernel.org/r/20200420065227.4920-1-jslaby@suse.cz
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2020-05-05 10:55:54 +01:00
Rob Herring 0b104773b4 PCI: Constify struct pci_ecam_ops
struct pci_ecam_ops is typically DT match table data which is defined to
be const. It's also best practice for ops structs to be const. Ideally,
we'd make struct pci_ops const as well, but that becomes pretty
invasive, so for now we just cast it where needed.

Link: https://lore.kernel.org/r/20200409234923.21598-2-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Andrew Murray <amurray@thegoodpenguin.co.uk>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Len Brown <lenb@kernel.org>
Cc: Jonathan Chocron <jonnyc@amazon.com>
Cc: Zhou Wang <wangzhou1@hisilicon.com>
Cc: Robert Richter <rrichter@marvell.com>
Cc: Toan Le <toan@os.amperecomputing.com>
Cc: Marc Gonzalez <marc.w.gonzalez@free.fr>
Cc: Mans Rullgard <mans@mansr.com>
Cc: linux-acpi@vger.kernel.org
2020-05-01 16:28:59 +01:00
Bjorn Helgaas fbedda4e4d PCI: keystone: Don't select CONFIG_PCI_KEYSTONE_HOST by default
Drivers should not be selected by default because that bloats the kernel
for people who don't need them.

Remove the "default y" for CONFIG_PCI_KEYSTONE_HOST.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Murali Karicheri <m-karicheri2@ti.com>
Cc: linux-arm-kernel@lists.infradead.org
2020-04-24 14:34:58 -05:00
Bjorn Helgaas 94b84ac197 PCI: dra7xx: Don't select CONFIG_PCI_DRA7XX_HOST by default
Drivers should not be selected by default because that bloats the kernel
for people who don't need them.

Enable CONFIG_PCI_DRA7XX_HOST by default only if SOC_DRA7XX.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: linux-omap@vger.kernel.org
2020-04-24 14:34:52 -05:00
Bjorn Helgaas a9dcb025d3 Merge branch 'remotes/lorenzo/pci/qcom'
- Apply Qualcomm class fixup only to PCIe host bridges, not to all
    PCI_VENDOR_ID_QCOM devices (Bjorn Andersson)

* remotes/lorenzo/pci/qcom:
  PCI: qcom: Fix the fixup of PCI_VENDOR_ID_QCOM
2020-04-02 14:27:02 -05:00