mirror of https://gitee.com/openkylin/linux.git
735 Commits
| Author | SHA1 | Message | Date |
|---|---|---|---|
Linus Torvalds
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4277e6b9fd |
Final MIPS fixes for 4.17
A final few MIPS fixes for 4.17: - Drop Lantiq gphy reboot/remove reset (4.14) - prctl(PR_SET_FP_MODE): Disallow PRE without FR (4.0) - ptrace(PTRACE_PEEKUSR): Fix 64-bit FGRs (3.15) -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQS7lRNBWUYtqfDOVL41zuSGKxAj8gUCWxHFOwAKCRA1zuSGKxAj 8i39AQCX9phkffpRDnA1e/MiGGeRZ5+f9FBOzuS1x2nzdUagoQD9FzWxdcx57Syj ye0kUtmc/wm8U6kz3qC3OInSeVuIEQg= =3NGM -----END PGP SIGNATURE----- Merge tag 'mips_fixes_4.17_3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS fixes from James Hogan: "A final few MIPS fixes for 4.17: - drop Lantiq gphy reboot/remove reset (4.14) - prctl(PR_SET_FP_MODE): Disallow PRE without FR (4.0) - ptrace(PTRACE_PEEKUSR): Fix 64-bit FGRs (3.15)" * tag 'mips_fixes_4.17_3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: MIPS: ptrace: Fix PTRACE_PEEKUSR requests for 64-bit FGRs MIPS: prctl: Disallow FRE without FR with PR_SET_FP_MODE requests MIPS: lantiq: gphy: Drop reboot/remove reset asserts |
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Mathias Kresin
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32795631e6
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MIPS: lantiq: gphy: Drop reboot/remove reset asserts
While doing a global software reset, these bits are not cleared and let
some bootloader fail to initialise the GPHYs. The bootloader don't
expect the GPHYs in reset, as they aren't during power on.
The asserts were a workaround for a wrong syscon-reboot mask. With a
mask set which includes the GPHY resets, these resets aren't required
any more.
Fixes:
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Florian Fainelli
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0a12e80ce4 |
soc: bcm: raspberrypi-power: Fix use of __packed
Commit |
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Linus Torvalds
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ca4e7c5120 |
The large diff this time around is from the addition of a new clk driver
for the TI Davinci family of SoCs. So far those clks have been supported with a custom implementation of the clk API in the arch port instead of in the CCF. With this driver merged we're one step closer to having a single clk API implementation. The other large diff is from the Amlogic clk driver that underwent some major surgery to use regmap. Beyond that, the biggest hitter is Samsung which needed some reworks to properly handle clk provider power domains and a bunch of PLL rate updates. The core framework was fairly quiet this round, just getting some cleanups and small fixes for some of the more esoteric features. And the usual set of driver non-critical fixes, cleanups, and minor additions are here as well. Core: - Rejig clk_ops::init() to be a little earlier for phase/accuracy ops - debugfs ops macroized to shave some lines of boilerplate code - Always calculate the phase instead of caching it in clk_get_phase() - More __must_check on bulk clk APIs New Drivers: - TI's Davinci family of SoCs - Intel's Stratix10 SoC - stm32mp157 SoC - Allwinner H6 CCU - Silicon Labs SI544 clock generator chip - Renesas R-Car M3-N and V3H SoCs - i.MX6SLL SoCs Removed Drivers: - ST-Ericsson AB8540/9540 Updates: - Mediatek MT2701 and MT7622 audsys support and MT2712 updates - STM32F469 DSI and STM32F769 sdmmc2 support - GPIO clks can sleep now - Spreadtrum SC9860 RTC clks - Nvidia Tegra MBIST workarounds and various minor fixes - Rockchip phase handling fixes and a memory leak plugged - Renesas drivers switch to readl/writel from clk_readl/clk_writel - Renesas gained CPU (Z/Z2) and watchdog support - Rockchip rk3328 display clks and rk3399 1.6GHz PLL support - Qualcomm PM8921 PMIC XO buffers - Amlogic migrates to regmap APIs - TI Keystone clk latching support - Allwinner H3 and H5 video clk fixes - Broadcom BCM2835 PLLs needed another bit to enable - i.MX6SX CKO mux fix and i.MX7D Video PLL divider fix - i.MX6UL/ULL epdc_podf support - Hi3798CV200 COMBPHY0 and USB2_OTG_UTMI and phase support for eMMC -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAlrPhMARHHNib3lkQGtl cm5lbC5vcmcACgkQrQKIl8bklSVkkxAArsItSoxQV18kQlJ9S7o2z75giquXQfvy Y/cKIIY1kz4K+qm+rpbl6PjukrSPtfM+wGmepGt+CptOdlj672viFxI7zjrd1iSy /xJo7d5/nZxvmx0qcwYWVTCOsU+4FUUkpq5mE91KEvwny/qgRqEgWeLoWTDLBktF MzGtBUYudjkRYLd2I31DGB3dqI0Dy9JwuEpJfCAt5h4dztml3aNjYknjQ/vUSEXL 61mSYM1fwzK8rnrjSlQqb+X0OoJ6d5Pz2uHRXnWfGlS8UOh5N9NFGKpiErLm+h/+ /FigA6f9HBeUneNf5Dnu568FHwE2FyUbZKVd40OYj3x128OnAoKUoRt68/8FQPdf NoQb3zH3Ha1JbwWgvQ9RkWp82kYnMctrlkh6IFye/FxdfwCWA4SE/iIgJXRJbQ/K blZz14jkXT8oISqy6nryGv3CK/RFXzVdvVa4z41xHc4cnLpNBsv1o89a+9MyTvMD wYOnc/98/l5xYs5PvQqNrd/onE0GLIeOEtkWNXH0OACe6FOIuz5eVn4Uh8aIm0wl +EHwHRwB7AQK+a7jwEfQ88aceAntvFlymUUcsncyCXn2s0knc5BHJPSHhoZk1tJb Wv2Fcln3Mwjhhq9aoNxfAJf4pIqmFgdQEtwyND4GJlP55Xay5QMZVEdwnNfFDvmf X6P2pfkBqkg= =ys4O -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "The large diff this time around is from the addition of a new clk driver for the TI Davinci family of SoCs. So far those clks have been supported with a custom implementation of the clk API in the arch port instead of in the CCF. With this driver merged we're one step closer to having a single clk API implementation. The other large diff is from the Amlogic clk driver that underwent some major surgery to use regmap. Beyond that, the biggest hitter is Samsung which needed some reworks to properly handle clk provider power domains and a bunch of PLL rate updates. The core framework was fairly quiet this round, just getting some cleanups and small fixes for some of the more esoteric features. And the usual set of driver non-critical fixes, cleanups, and minor additions are here as well. Core: - Rejig clk_ops::init() to be a little earlier for phase/accuracy ops - debugfs ops macroized to shave some lines of boilerplate code - Always calculate the phase instead of caching it in clk_get_phase() - More __must_check on bulk clk APIs New Drivers: - TI's Davinci family of SoCs - Intel's Stratix10 SoC - stm32mp157 SoC - Allwinner H6 CCU - Silicon Labs SI544 clock generator chip - Renesas R-Car M3-N and V3H SoCs - i.MX6SLL SoCs Removed Drivers: - ST-Ericsson AB8540/9540 Updates: - Mediatek MT2701 and MT7622 audsys support and MT2712 updates - STM32F469 DSI and STM32F769 sdmmc2 support - GPIO clks can sleep now - Spreadtrum SC9860 RTC clks - Nvidia Tegra MBIST workarounds and various minor fixes - Rockchip phase handling fixes and a memory leak plugged - Renesas drivers switch to readl/writel from clk_readl/clk_writel - Renesas gained CPU (Z/Z2) and watchdog support - Rockchip rk3328 display clks and rk3399 1.6GHz PLL support - Qualcomm PM8921 PMIC XO buffers - Amlogic migrates to regmap APIs - TI Keystone clk latching support - Allwinner H3 and H5 video clk fixes - Broadcom BCM2835 PLLs needed another bit to enable - i.MX6SX CKO mux fix and i.MX7D Video PLL divider fix - i.MX6UL/ULL epdc_podf support - Hi3798CV200 COMBPHY0 and USB2_OTG_UTMI and phase support for eMMC" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (233 commits) clk: davinci: add a reset lookup table for psc0 clk: imx: add clock driver for imx6sll dt-bindings: imx: update clock doc for imx6sll clk: imx: add new gate/gate2 wrapper funtion clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux clk: cs2000: set pm_ops in hibernate-compatible way clk: bcm2835: De-assert/assert PLL reset signal when appropriate clk: imx7d: Move clks_init_on before any clock operations clk: imx7d: Correct ahb clk parent select clk: imx7d: Correct dram pll type clk: imx7d: Add USB clock information clk: socfpga: stratix10: add clock driver for Stratix10 platform dt-bindings: documentation: add clock bindings information for Stratix10 clk: ti: fix flag space conflict with clkctrl clocks clk: uniphier: add additional ethernet clock lines for Pro4 clk: uniphier: add SATA clock control support clk: uniphier: add PCIe clock control support clk: Add driver for the si544 clock generator chip clk: davinci: Remove redundant dev_err calls clk: uniphier: add ethernet clock control support for PXs3 ... |
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Linus Torvalds
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92589cbdda |
remoteproc updates for v4.17
This adds support for generating coredumps for remoteprocs using devcoredump, adds the Qualcomm sysmon driver for intra-remoteproc crash handling and a number of fixes in Qualcomm and IMX drivers. -----BEGIN PGP SIGNATURE----- iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAlrL5dgbHGJqb3JuLmFu ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FufUP/ifQ+QbDzYzBI4CHfbef hls8bplN9GlW4acJuhVRe8ikGz6vHZdyH88KJJX+IHekDXFqk10rWEgcyfV0h5mU qOrhiW7hjfm2Mhs0MvNg9rKxbFrD5wAeJBJn8ukTB4z4jc9iFPazVu37V3ul/wVR yMM4zI6kA54UwsLunqLEapb1thgLO4P99tvA+vdR8ekz/j0AVHB7HiHVLY1JX5Gu D679icQSWOSsSQaRR7G0E97ZKZF6XaM6+aJV3eZol1HQw8k3I/Vbudi2wIKj0Ia8 jLO5JyCpgeSAAjPCZLrB5XyUXl/vU7PSPKTPyOnv2lK1wQgKsmHX80HfeAt1ISNn 4nY/Oy651/rjBN3FR9HQvQoqCDF08GG5YRDmUZCg0kS/OStrbJT4eCm+hklvanmK O98LEWm5+FLqk+9Wau1DXGa0raXon2REIJxQSDnBUODZSqTQBS1iQmdtdYtrZxRp 17LtCABCSBMbAI8VE6eb/5jj/z07aI0pBwKEYEWOOG2xsF6q1GGZAXRxnmMUOWAv bwSgiNqNbbYUdYMjVYDxDtWIp3/Dy8VQ3N3Fz61SieS0GjJxDy/SyNByzVL4eEjk yYj+N74Dxgms1V/xknQmJn4ktwqaVxapnj52WF1WaEtIcm5WvPFZUVNSFvWMlbcD rAiTKkpFC0CkINlM+dk3Ti/a =cxV7 -----END PGP SIGNATURE----- Merge tag 'rproc-v4.17' of git://github.com/andersson/remoteproc Pull remoteproc updates from Bjorn Andersson: - add support for generating coredumps for remoteprocs using devcoredump - add the Qualcomm sysmon driver for intra-remoteproc crash handling - a number of fixes in Qualcomm and IMX drivers * tag 'rproc-v4.17' of git://github.com/andersson/remoteproc: remoteproc: fix null pointer dereference on glink only platforms soc: qcom: qmi: add CONFIG_NET dependency remoteproc: imx_rproc: Slightly simplify code in 'imx_rproc_probe()' remoteproc: imx_rproc: Re-use existing error handling path in 'imx_rproc_probe()' remoteproc: imx_rproc: Fix an error handling path in 'imx_rproc_probe()' samples: Introduce Qualcomm QMI sample client remoteproc: qcom: Introduce sysmon remoteproc: Pass type of shutdown to subdev remove remoteproc: qcom: Register segments for core dump soc: qcom: mdt-loader: Return relocation base remoteproc: Rename "load_rsc_table" to "parse_fw" remoteproc: Add remote processor coredump support remoteproc: Remove null character write of shared mem |
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Linus Torvalds
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38c23685b2 |
ARM: SoC driver updates for 4.17
The main addition this time around is the new ARM "SCMI" framework,
which is the latest in a series of standards coming from ARM to do power
management in a platform independent way. This has been through many
review cycles, and it relies on a rather interesting way of using the
mailbox subsystem, but in the end I agreed that Sudeep's version was
the best we could do after all.
Other changes include:
- the ARM CCN driver is moved out of drivers/bus into drivers/perf,
which makes more sense. Similarly, the performance monitoring
portion of the CCI driver are moved the same way and cleaned up
a little more.
- a series of updates to the SCPI framework
- support for the Mediatek mt7623a SoC in drivers/soc
- support for additional NVIDIA Tegra hardware in drivers/soc
- a new reset driver for Socionext Uniphier
- lesser bug fixes in drivers/soc, drivers/tee, drivers/memory, and
drivers/firmware and drivers/reset across platforms
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"The main addition this time around is the new ARM "SCMI" framework,
which is the latest in a series of standards coming from ARM to do
power management in a platform independent way.
This has been through many review cycles, and it relies on a rather
interesting way of using the mailbox subsystem, but in the end I
agreed that Sudeep's version was the best we could do after all.
Other changes include:
- the ARM CCN driver is moved out of drivers/bus into drivers/perf,
which makes more sense. Similarly, the performance monitoring
portion of the CCI driver are moved the same way and cleaned up a
little more.
- a series of updates to the SCPI framework
- support for the Mediatek mt7623a SoC in drivers/soc
- support for additional NVIDIA Tegra hardware in drivers/soc
- a new reset driver for Socionext Uniphier
- lesser bug fixes in drivers/soc, drivers/tee, drivers/memory, and
drivers/firmware and drivers/reset across platforms"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (87 commits)
reset: uniphier: add ethernet reset control support for PXs3
reset: stm32mp1: Enable stm32mp1 reset driver
dt-bindings: reset: add STM32MP1 resets
reset: uniphier: add Pro4/Pro5/PXs2 audio systems reset control
reset: imx7: add 'depends on HAS_IOMEM' to fix unmet dependency
reset: modify the way reset lookup works for board files
reset: add support for non-DT systems
clk: scmi: use devm_of_clk_add_hw_provider() API and drop scmi_clocks_remove
firmware: arm_scmi: prevent accessing rate_discrete uninitialized
hwmon: (scmi) return -EINVAL when sensor information is unavailable
amlogic: meson-gx-socinfo: Update soc ids
soc/tegra: pmc: Use the new reset APIs to manage reset controllers
soc: mediatek: update power domain data of MT2712
dt-bindings: soc: update MT2712 power dt-bindings
cpufreq: scmi: add thermal dependency
soc: mediatek: fix the mistaken pointer accessed when subdomains are added
soc: mediatek: add SCPSYS power domain driver for MediaTek MT7623A SoC
soc: mediatek: avoid hardcoded value with bus_prot_mask
dt-bindings: soc: add header files required for MT7623A SCPSYS dt-binding
dt-bindings: soc: add SCPSYS binding for MT7623 and MT7623A SoC
...
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Linus Torvalds
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167569343f |
ARM: SoC platform updates for 4.17
This release brings up a new platform based on the old ARM9 core: the Nuvoton NPCM is used as a baseboard management controller, competing with the better known ASpeed AST2xx series. Another important change is the addition of ARMv7-A based chips in mach-stm32. The older parts in this platform are ARMv7-M based microcontrollers, now they are expanding to general-purpose workloads. The other changes are the usual defconfig updates to enable additional drivers, lesser bugfixes. The largest updates as often are the ongoing OMAP cleanups, but we also have a number of changes for the older PXA and davinci platforms this time. For the Renesas shmobile/r-car platform, some new infrastructure is needed to make the watchdog work correctly. Supporting Multiprocessing on Allwinner A80 required a significant amount of new code, but is not doing anything unexpected. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJaxibSAAoJEGCrR//JCVInPwcP/2ZdLMXXXaJBM+rCRPhT+vR1 FsKqcTCC5RHbVcKW+N54nmlsqofy2GadlmyfOdrFXtbf+Sm2dRNsDrHDOhvoPp37 fwBd0wGw0PLjNE8SEPp/ldtFe11Dbg0WGBzJ4PAPJgt1W4hvW8//VzVW1XsiRrVc 9SlZ66DwR95UQ5pwy+dfE8f9A/WW4XaMq0UHQ3/deQ/Te/64b/C6CJtT3W73WAlR 83UHgkwq3WvI+hhvg4QX9H0Q6dcK2JLUWsAB0xnZP8Q8t30NdDpl61uZL0A4Mh9Y 38lPhUjPUyUpsGrOttmMEQNzbAk4m/nzQxByYYmhkx3x+mlhjdA9KNavxDYVxXN2 1tzz62wst8pLePqVt2UsFqsaruJGMuTIooOdc5iCjG1c2N2kQGdBsuOvLjYu9kV6 XPTfvvAYkMo9rC0MbdPuobG+h/WrYHuc9SD2Mnt+kNaw1yJL08fWENjSuwP7kheb 2A5jdAFNrGqgcrWMsQOw8eYYC7z7WojkLq0kHrBbwIlVD7KIZurv2fm/iVo4+xPH Gig5HuehMUtVYAf+Q1KWFlqS01fXMErt2pDGI5f1mNumXCB5kdWoSKbU8lOg03f8 ZqBHlfly+QDMOx0qfkxFX+phHPWHTOC+45yHK2Xq+n9urXmQbzYZxTzq5zCu6jcm 4yH0jaykoHODGNLIt50f =HD9V -----END PGP SIGNATURE----- Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Arnd Bergmann: "This release brings up a new platform based on the old ARM9 core: the Nuvoton NPCM is used as a baseboard management controller, competing with the better known ASpeed AST2xx series. Another important change is the addition of ARMv7-A based chips in mach-stm32. The older parts in this platform are ARMv7-M based microcontrollers, now they are expanding to general-purpose workloads. The other changes are the usual defconfig updates to enable additional drivers, lesser bugfixes. The largest updates as often are the ongoing OMAP cleanups, but we also have a number of changes for the older PXA and davinci platforms this time. For the Renesas shmobile/r-car platform, some new infrastructure is needed to make the watchdog work correctly. Supporting Multiprocessing on Allwinner A80 required a significant amount of new code, but is not doing anything unexpected" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (179 commits) arm: npcm: modify configuration for the NPCM7xx BMC. MAINTAINERS: update entry for ARM/berlin ARM: omap2: fix am43xx build without L2X0 ARM: davinci: da8xx: simplify CFGCHIP regmap_config ARM: davinci: da8xx: fix oops in USB PHY driver due to stack allocated platform_data ARM: multi_v7_defconfig: add NXP FlexCAN IP support ARM: multi_v7_defconfig: enable thermal driver for i.MX devices ARM: multi_v7_defconfig: add RN5T618 PMIC family support ARM: multi_v7_defconfig: add NXP graphics drivers ARM: multi_v7_defconfig: add GPMI NAND controller support ARM: multi_v7_defconfig: add OCOTP driver for NXP SoCs ARM: multi_v7_defconfig: configure I2C driver built-in arm64: defconfig: add CONFIG_UNIPHIER_THERMAL and CONFIG_SNI_AVE ARM: imx: fix imx6sll-only build ARM: imx: select ARM_CPU_SUSPEND for CPU_IDLE as well ARM: mxs_defconfig: Re-sync defconfig ARM: imx_v4_v5_defconfig: Use the generic fsl-asoc-card driver ARM: imx_v4_v5_defconfig: Re-sync defconfig arm64: defconfig: enable stmmac ethernet to defconfig ARM: EXYNOS: Simplify code in coupled CPU idle hot path ... |
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Linus Torvalds
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b240b419db |
ARM: SoC device tree updates for 4.17
This is the usual set of changes for device trees, with over 700
non-merged changesets. There is an ongoing set of dtc warning fixes and
the usual bugfixes, cleanups and added device support.
The most interesting bit as usual is support for new machines listed
below:
- The Allwinner H6 makes its debut with the Pine-H64 board, and we get
two new machines based on its older siblings: the H5 based OrangePi
Zero+ and the A64 based Teres-I Laptop from Olimex. On the 32-bit side,
we add The Olimex som204 based on Allwinner A20, and the Banana Pi M2
Zero development board (based on H2).
- NVIDIA adds support for Tegra194 aka "Xavier", plus their p2972
development board and p2888 CPU module.
- The Nuvoton npcm750 is a BMC that was newly added, for now we only
support running on the evaluation board.
- STmicroelectronics stm32 gains support for the stm32mp157c and two
evaluation boards.
- The Toradex Colibri board family grows a few members based on the
i.MX6ULL variant.
- The Advantec DMS-BA16 is a Qseven module using the NXP i.MX6
family of chips.
- The Phytec phyBOARD Mira is a family of industrial boards based on
i.MX6. For now, four models get added.
- TI am335x based PDU-001 is an industrial embedded machine used for
traffic monitoring
- The Aspeed platform now supports running on the BMC on the Qualcomm
Centriq 2400 server
- Samsung Exynos4 based Galaxy S3 is a family of mobile phones Qualcomm
msm8974 based Galaxy S5 is a rather different phone made by the same
company.
- The Xilinx Zynq and ZynqMP platforms now gained a lot of dts file
for the various boards made by Xilinx themselves, as well as the
Digilent Zybo Z7.
- The ARM Versatile family now supports the "IB2" interface board.
- The Renesas H2 based "Stout" and the H3 based Salvator-X are more
evaluation boards named after a kind of beer, as most of them are.
The r8a77980 (V3H) based "Condor" apparently doesn't follow that
tradition. ;-)
- ROC-RK3328-CC is a simple developement board from the Libre Computer
Project, based on the Rockchips RK3328 SoC
- Haiku is another development board plus Qseven module based on Rockchips
RK3368 and made by Theobroma Systems.
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-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree updates from Arnd Bergmann:
"This is the usual set of changes for device trees, with over 700
non-merged changesets. There is an ongoing set of dtc warning fixes
and the usual bugfixes, cleanups and added device support.
The most interesting bit as usual is support for new machines listed
below:
- The Allwinner H6 makes its debut with the Pine-H64 board, and we
get two new machines based on its older siblings: the H5 based
OrangePi Zero+ and the A64 based Teres-I Laptop from Olimex. On the
32-bit side, we add The Olimex som204 based on Allwinner A20, and
the Banana Pi M2 Zero development board (based on H2).
- NVIDIA adds support for Tegra194 aka "Xavier", plus their p2972
development board and p2888 CPU module.
- The Nuvoton npcm750 is a BMC that was newly added, for now we only
support running on the evaluation board.
- STmicroelectronics stm32 gains support for the stm32mp157c and two
evaluation boards.
- The Toradex Colibri board family grows a few members based on the
i.MX6ULL variant.
- The Advantec DMS-BA16 is a Qseven module using the NXP i.MX6 family
of chips.
- The Phytec phyBOARD Mira is a family of industrial boards based on
i.MX6. For now, four models get added.
- TI am335x based PDU-001 is an industrial embedded machine used for
traffic monitoring
- The Aspeed platform now supports running on the BMC on the Qualcomm
Centriq 2400 server
- Samsung Exynos4 based Galaxy S3 is a family of mobile phones
Qualcomm msm8974 based Galaxy S5 is a rather different phone made
by the same company.
- The Xilinx Zynq and ZynqMP platforms now gained a lot of dts file
for the various boards made by Xilinx themselves, as well as the
Digilent Zybo Z7.
- The ARM Versatile family now supports the "IB2" interface board.
- The Renesas H2 based "Stout" and the H3 based Salvator-X are more
evaluation boards named after a kind of beer, as most of them are.
The r8a77980 (V3H) based "Condor" apparently doesn't follow that
tradition. ;-)
- ROC-RK3328-CC is a simple developement board from the Libre
Computer Project, based on the Rockchips RK3328 SoC
- Haiku is another development board plus Qseven module based on
Rockchips RK3368 and made by Theobroma Systems"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (701 commits)
arm: dts: modify Nuvoton NPCM7xx device tree structure
arm: dts: modify Makefile NPCM750 configuration name
arm: dts: modify clock binding in NPCM750 device tree
arm: dts: modify timer register size in NPCM750 device tree
arm: dts: modify UART compatible name in NPCM750 device tree
arm: dts: add watchdog device to NPCM750 device tree
arm64: dts: uniphier: add ethernet node for PXs3
ARM: dts: uniphier: add pinctrl groups of ethernet for second instance
arm: dts: kirkwood*.dts: use SPDX-License-Identifier for board using GPL-2.0+
arm: dts: kirkwood*.dts: use SPDX-License-Identifier for boards using GPL-2.0+/MIT
arm: dts: kirkwood*.dts: use SPDX-License-Identifier for boards using GPL-2.0
arm: dts: armada-385-turris-omnia: use SPDX-License-Identifier
arm: dts: armada-385-db-ap: use SPDX-License-Identifier
arm: dts: armada-388-rd: use SPDX-License-Identifier
arm: dts: armada-xp-db-xc3-24g4xg: use SPDX-License-Identifier
arm: dts: armada-xp-db-dxbc2: use SPDX-License-Identifier
arm: dts: armada-370-db: use SPDX-License-Identifier
arm: dts: armada-*.dts: use SPDX-License-Identifier for most of the Armada based board
arm: dts: armada-xp-98dx: use SPDX-License-Identifier for prestara 98d SoCs
arm: dts: armada-*.dtsi: use SPDX-License-Identifier for most of the Armada SoCs
...
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Arnd Bergmann
|
7df3f0bb5f |
Rockchip soc drivers containing conversion of the power-domain driver
to use the clk-bulk APIs and two more socs to disable jtag-switching. On the plus-side the issue we see with that are _supposed_ to be fixed in hardware in upcoming socs, so maybe this can be the last of those. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlqpSUsQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgdqIB/9UCXW7eLhVese5Htkd9OlBcBnWIovWSMf7 TWj32YCqoMrIvRAbQ1/KCA8yQIeuyapLK8IpLVTRhX5G9GVd5Vk23o8seR2QYupN gjwzhEjrYYG6TeRNs89dzv2Nbl6UD8Nkw6TqxyVCa/wdNwNHkxvylrlca7RICGco Xi00qtbGBtp98MW/VQITiCCCRH8Htcn3Rn4uQMV/CRyukhUCQTy9hJyGXQembrF5 fdYf9PhxJ07pEa4bZ3FHmfI/w3Qf/GIdWCflWV+0+vs2yQQ4qwXqbXCg5s3VIRB8 Bd9uBx5lgxaF2cGH5zcQcwi+BWZTZwZKxSYdQZjDqk6eO/btmRBC =q5s4 -----END PGP SIGNATURE----- Merge tag 'v4.17-rockchip-drivers-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers Pull "Rockchip driver changes for 4.17" from Heiko Stübner: Rockchip soc drivers containing conversion of the power-domain driver to use the clk-bulk APIs and two more socs to disable jtag-switching. On the plus-side the issue we see with that are _supposed_ to be fixed in hardware in upcoming socs, so maybe this can be the last of those. * tag 'v4.17-rockchip-drivers-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: soc: rockchip: power-domain: Add a sanity check on pd->num_clks soc: rockchip: power-domain: use clk_bulk APIs soc: rockchip: disable jtag switching for RK3128 SoCs soc: rockchip: disable jtag switching for RK3228/RK3229 SoCs |
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Arnd Bergmann
|
dea4bd1975 |
soc: qcom: qmi: add CONFIG_NET dependency
Access to the socket API and the root network namespace is only available
when networking is enabled:
ERROR: "kernel_sendmsg" [drivers/soc/qcom/qmi_helpers.ko] undefined!
ERROR: "sock_release" [drivers/soc/qcom/qmi_helpers.ko] undefined!
ERROR: "sock_create_kern" [drivers/soc/qcom/qmi_helpers.ko] undefined!
ERROR: "kernel_getsockname" [drivers/soc/qcom/qmi_helpers.ko] undefined!
ERROR: "init_net" [drivers/soc/qcom/qmi_helpers.ko] undefined!
ERROR: "kernel_recvmsg" [drivers/soc/qcom/qmi_helpers.ko] undefined!
Adding a dependency on CONFIG_NET lets us build it in all randconfig
builds.
Fixes:
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Arnd Bergmann
|
b701b41bb4 |
Qualcomm ARM Based Driver Updates for v4.17
* Fix NV upload increment in wcnss_ctrl * Add support in rmtfs-mem driver for assigning memory -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJasG1yAAoJEFKiBbHx2RXVJ/cQANYtQ3wWIyj/VPxqHheYbVb4 WuJ8mlDzE/RsvrGgQnMd8gqdFPbXj93mUJfues8AaMTlKlA1r2Z5d5SZkk+BclYd kt8YuN/XuwrvIuTKwiXRDxVvjocURjC8a9CGtER46m/ZjBzl6uYaOZF4T7y9ZsMZ BzYMC1ySwaSVFKZWk7o4lg5eBr7CxJWIS5IRbRSCT2AkWzLozSE9e4I7iIrjZql7 M65mQMFMHGZ+b8gB5KH1JrK56XtjA6FIaVz/QUoRAJNz2oIkOPKcsZumGF1HD9IV 1m3DHBBLBoCq0LMg65jYL/C5Hyr7qlPNdA/uXXXD2lizmTEKdxpHzSruPlBfl4aT m/IF/Z1PWqjzwbZ9+M5idEvgWqYsfjyDgyiU62YLOOoK/nU+jVoM7g7U15kjazD5 OnMcbzBOhiXOcISo0lkDNjJoXC8MiqLwAIoVyTlREmUcd3UpWeY+KsTXEMa+QHAe 2zjaE/OV3oUWulEwIqE9SpU7omqxHvBNubbTX/Lyu8UjKSj77fPjMkcncOty3+QR vmJUJO3O0A27uGuYqS5khHJpEnv8oHGJlwA8MEZr127yxQQ0WTL+gEkY96nN2HsR L6RvlVsSRRJ4hi1Hz20vvEEvRxUBS3tWRe65I4JiFtUFHKv/WpFOynl30VIm7dMR hwQzrNIWDbdDKYAU+AaD =x+/y -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers Pull "Qualcomm ARM Based Driver Updates for v4.17" from Andy Gross: * Fix NV upload increment in wcnss_ctrl * Add support in rmtfs-mem driver for assigning memory * tag 'qcom-drivers-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux: soc: qcom: wcnss_ctrl: Fix increment in NV upload soc: qcom: rmtfs-mem: Add support for assigning memory to remote |
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Arnd Bergmann
|
3262b82d0c |
Amlogic driver updates for v4.17
- socinfo: add more IDs for newer SoC detection - firmware: update init to use module_platform_driver_probe - soc: mix. VPU power controller fixes -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAlqwThMACgkQWTcYmtP7 xmVekA//eggAtImxhKuH54lkypYjB9b/M4U+ZVq1JohKehy+3I3oynKHptuX22/V qAcC9om2kksPANdGh6V1l4xxCBQ/bBOzOoGneuM1v6TuTpPCOEqy9MVyKKhkqt9c ubN7DNd5N18APTtGDCwnbRv2PseWc0F0D0Bn3QerLuH9vlrQ8QISBZz8FUbOHzi7 ibHrX+MoWlShSFn5/9htELg9YlN0eqjl2GSLDW2AeifDVZ0RqhHAIrLUxucQxuNI tQdWEv9KL86k5nLdvKnqf5PZfWzWp0KZPKk+wA4EoFbgWE89S/v+jvih9l/Pnhl4 gMDUPQTv9JQKT+o85XCyRnB5+MVovO0i/KWE4qwJQsufQILVNnPdAAEpZzZzdfRf VpV2nMtoBFPTwhus4vgp9I0rkxXgTY3TuqOrNkVzyYySp7SW3Ic34380RJ/V2lQ8 C3DLQErz2x8B8BKtWbNZNKXIlb5KimSgM/MU5lnSBFZvJj7fCkGT9I2HM6FLIgh7 3OglzmNsdZhOkMI5E8Y3Q2r3UcXM2zLPQgMi9fDjL1z8TiXvO06NcRlLFLA7KI+O +NkgBCPuVAEuyfZQsD9HlwmbaMF4GMKY3VVAgn4R/8h/uyzmfI3nwBybmeJTvWST TRBkJ0Cw4LqxUPhJe51WpX2J5twn3sbuW32yMybxMsMlCbj5hv0= =5/NR -----END PGP SIGNATURE----- Merge tag 'amlogic-drivers' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/drivers Pull "Amlogic driver updates for v4.17" from Kevin Hilman: - socinfo: add more IDs for newer SoC detection - firmware: update init to use module_platform_driver_probe - soc: mix. VPU power controller fixes * tag 'amlogic-drivers' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: amlogic: meson-gx-socinfo: Update soc ids firmware: meson-sm: rework meson_sm_init to use module_platform_driver_probe meson-gx-socinfo: make local function meson_gx_socinfo_init static meson-mx-socinfo: Make local function meson_mx_socinfo_init() static soc: amlogic: meson-gx-pwrc-vpu: fix error on shutdown when domain is powered off soc: amlogic: meson-gx-pwrc-vpu: don't print error message on probe deferral |
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Arnd Bergmann
|
03836dd07f |
scpsy:
- mt2712: update power domains to reflect design changes in the SoC - fix initialisation of power subdomains - add support for mt7623a SoC - use defines for mt2701 bus protection mask -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEEiUuSfQSYnG8EMsBltDliWyzx00MFAlqvjTgXHG1hdHRoaWFz LmJnZ0BnbWFpbC5jb20ACgkQtDliWyzx00Nx+RAAh+SbaVBj6YPtcB5JtcEMNv8/ a52WvEDXDNSOKakUphsjxNY/n0WOq/IyntFyNQqBlQBDziWubj49ZH6BZ7UBxHXK Xi1IXek7tD8iu0BOyMC1fKF5Y0HUvlRW/bHNXvtFMDzaTA5zN2ZrpAiKvBkXMcW2 kgb2grv+YXphNo+v9YeYupP8pjyHYCqJ8tY7w44qMp3FigSaMMvtAVQRF36JIsk9 c606gv3laYdS2EMQDTUMV5sEbYK7V4YwC4a32f/vPe/Rur32NrfG8WkM3abU9KQa 3HxomsjUkdoW9ddE0JXH5xlh+XlYW02PYYmQH+fBsfj94so8vBVonrKnuIgVf98L V159Bt6S8g1IO/Cr80ZGwKyai9Lj7keLSwbkZFJ6qryrFqSVqXSfX2IAZkwjoiTY UxGoBEjDC06ExHlxv1dJK0xj6aCfqlCvfgfpsrOTVe/BBg8CTQMdFGHW31CsRPuc TrtAuAXzV5EI1GW+Wrv71VW+UXB6RzoZ+4R30KqSp5e7PJ0gRgf9ujBCqfVYsPka 7rd85JfLzTOICNyA+MSFK6q2FAR7pA3FK4bOhcKVen3bZz0bmsfjXcMjPFTF57jZ 3qm5NkX2xyW/kSd6WGRKyNRhGR5jx5EYjW7eIEmzwLt1S9SdAMv/TAggt+yfKSmg uasH0EPCGoVTX1rApSg= =BL8y -----END PGP SIGNATURE----- Merge tag 'v4.16-next-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into next/drivers Pull "ARM: mediatek: updates for soc drivers for v4.16-next" from Matthias Brugger: scpsy: - mt2712: update power domains to reflect design changes in the SoC - fix initialisation of power subdomains - add support for mt7623a SoC - use defines for mt2701 bus protection mask * tag 'v4.16-next-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: soc: mediatek: update power domain data of MT2712 dt-bindings: soc: update MT2712 power dt-bindings soc: mediatek: fix the mistaken pointer accessed when subdomains are added soc: mediatek: add SCPSYS power domain driver for MediaTek MT7623A SoC soc: mediatek: avoid hardcoded value with bus_prot_mask dt-bindings: soc: add header files required for MT7623A SCPSYS dt-binding dt-bindings: soc: add SCPSYS binding for MT7623 and MT7623A SoC |
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Arnd Bergmann
|
498b565154 |
soc/tegra: Changes for v4.17-rc1
This contains more Tegra194 support as well as an implementation for the MBIST workaround needed to avoid some memory-related issues on Tegra210. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlqveZMTHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zoTM+EACS/YsxSNWQJ8LQkh71Cjf9mdMg5TAb Nutd+4d10qWuMxJGm9hmpBS5i48QNRAFmZ6K5F9FZ/mSFpVN9Gni+9YkdkhKRi70 HWaCQjYM5W+oGmQKZnB+GroG0670jK1esMCd+boDgI2XAQCGS20auQb1n1ZB4f8L h4uIwoH+iN4PtxjdF/E0Mhzc7VzDPYRoJJZx5tm8MH8KLKP6aoCQ8ZTsZRg+eD6Q IbSjUJrPDq6179cQJmIYwvt4xyppLGCjtmvAD8cCoAFgEM69QMb7HzU5ju32unFl zdIxJHJ7b0/1Ttv1JIS+YZiwkDlHUhl0Xf2h5H+8T/XoZZWg0soKxlg5BaoNsphJ 3jcxRbLX136QiWc8D0HrCFoibfEsD+Ef9K/+u0qTFy0XugNR9dzDrrPL9oOaUCSq 2duJvyD7Lxqz/iAdJ34T1rWkzmzZa4qAujgWmltgqEg+fhs8GSyTw4yDM0aEesed 42lGmWfraz7fZ+e1YqBZzxv+lDpULdTR10IIt+aKwTV7tMg/ivZtwfn6kwxVjkIY gd1RPrud0T24qLm+h/xxfG69XmFOW2cS1my87vuJeCvhOZmRzDAopfVZHkWMrKlU l4tgqFStorWXvzJkzBv3UHrGvwFdTcAP2nMVtAcNtTzIw0S6VNRK3c+1vhaS4vbN jWDsDc8rW9E4DQ== =MGgs -----END PGP SIGNATURE----- Merge tag 'tegra-for-4.17-soc-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers Pull "soc/tegra: Changes for v4.17-rc1" from Thierry Reding: This contains more Tegra194 support as well as an implementation for the MBIST workaround needed to avoid some memory-related issues on Tegra210. * tag 'tegra-for-4.17-soc-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux: soc/tegra: pmc: Use the new reset APIs to manage reset controllers soc/tegra: pmc: Pass PMC to tegra_powergate_power_up() soc/tegra: pmc: MBIST work around for Tegra210 soc/tegra: pmc: Add Tegra194 compatibility string soc/tegra: Add Tegra194 SoC configuration option |
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Arnd Bergmann
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59162c9366 |
Renesas ARM Based SoC Updates for v4.17
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Arnd Bergmann
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c073f31a96 |
Amlogic 64-bit DT updates for v4.17
- AXG: add/enable UART_A, I2C, RMII, system controller, HW RNG - accept MAC from u-boot environment - misc. fixes -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAlqwTz0ACgkQWTcYmtP7 xmVt9Q/8CW7750OL2cQjPSCh9ZH3hQykjL2fbW+7Glljm98Oz3lDhFq88OWscSvD ciI5ysQxqJHLk65BSDflXdFG05m//rcPYfMbh5Qgvs9j5NFJs6FCYjwaLTDN8t9L uoRre6xYkaJO2CSPEWcVrKiEZM9gN6tnH9DR17jxf0ZUQc23atZYMDe5DfEXmEvn /D4bcuwVmkK0Md5MmWhNicvlYZsoPdDZXJ0B1luAsLTI38ynUTJYZjMtObVZRVrL ucYuhzZ6uxuDXDUXnbvOEW34/qyCVCXcoMYh+8G6SjKa95jXYnSG8iPckOe+dXW4 Oq5w4WyVUrKSQ1dqNkekdIlvw+587+OivyJ/bkc1GHaUp870gGAs1LtLUX4frAa0 tGWbJUzRHLLy2RTFl3ExSb17zYRXPQyjIUQE25IgQtNxbzjDoV3/gvx3+g4C/MLp hm3KB/mTkl8V0nKqFqsHGzF/BOxvJn2LNuxMiDn5WAOJ8f/Z9GvSo5jZbtXMyWFi w1FfhQoSOeqQpn5bBSkqHc8GyFEygUF9FYOrHtKVt/PMo++Slp3iMQTheFLE0euB CcIfNP49vgnYHPheVSVhqscZFofm8YMwZw0cgC32n9HlMgeagpj5BUP6/+cMv+in p2WyCkZtKLCkHtlQsoGWiZtkVhY/S6te9fomL+sRu9xxQ0iVdw8= =i0VK -----END PGP SIGNATURE----- Merge tag 'amlogic-dt64' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt Pull "Amlogic 64-bit DT updates for v4.17" from Kevin Hilman: - AXG: add/enable UART_A, I2C, RMII, system controller, HW RNG - accept MAC from u-boot environment - misc. fixes * tag 'amlogic-dt64' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM64: dts: meson-gx: make efuse read-only ARM64: dts: meson: bump mali450 clk to 744MHz meson-gx-socinfo: Add package id for S905H ARM64: dts: meson-gxbb-wetek: add a wetek specific dtsi to cleanup hub and play2 ARM64: dts: meson: reduce odroid-c2 eMMC maximum rate ARM64: dts: amlogic: Convert to new-style SPDX license identifiers ARM64: dts: meson-axg: fix pwm_AO_cd compatible ARM64: dts: meson-axg: add sec_AO system controller ARM64: dts: meson: accept MAC addr from u-boot environment ARM64: dts: meson s905x: accept MAC addr from u-boot environment ARM64: dts: meson-axg: enable the UART_A controller ARM64: dts: meson-axg: complete the pinctrl info for UART_AO_A ARM64: dts: meson-axg: uart: Add the pinctrl info description ARM64: dts: meson-axg: uart: drop legacy compatible name from EE UART ARM64: dts: meson-axg: add RMII pins for ethernet controller ARM64: dts: meson-axg: enable I2C Master-1 for the audio speaker ARM64: dts: meson-axg: describe pin DT info for I2C controller ARM64: dts: meson-axg: add I2C DT info for Meson-AXG SoC ARM64: meson-axg: enable hardware rng |
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David S. Miller
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03fe2debbb |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Fun set of conflict resolutions here...
For the mac80211 stuff, these were fortunately just parallel
adds. Trivially resolved.
In drivers/net/phy/phy.c we had a bug fix in 'net' that moved the
function phy_disable_interrupts() earlier in the file, whilst in
'net-next' the phy_error() call from this function was removed.
In net/ipv4/xfrm4_policy.c, David Ahern's changes to remove the
'rt_table_id' member of rtable collided with a bug fix in 'net' that
added a new struct member "rt_mtu_locked" which needs to be copied
over here.
The mlxsw driver conflict consisted of net-next separating
the span code and definitions into separate files, whilst
a 'net' bug fix made some changes to that moved code.
The mlx5 infiniband conflict resolution was quite non-trivial,
the RDMA tree's merge commit was used as a guide here, and
here are their notes:
====================
Due to bug fixes found by the syzkaller bot and taken into the for-rc
branch after development for the 4.17 merge window had already started
being taken into the for-next branch, there were fairly non-trivial
merge issues that would need to be resolved between the for-rc branch
and the for-next branch. This merge resolves those conflicts and
provides a unified base upon which ongoing development for 4.17 can
be based.
Conflicts:
drivers/infiniband/hw/mlx5/main.c - Commit
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Neil Armstrong
|
f842c41adc |
amlogic: meson-gx-socinfo: Update soc ids
Updates the Amlogic Meson SoCs IDs for the Armv8 based SoCs. It includes the new families and packages. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> |
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Vivek Gautam
|
4c817ccf73 |
soc/tegra: pmc: Use the new reset APIs to manage reset controllers
Make use of of_reset_control_array_get_exclusive() to manage an array of reset controllers available with the device. Cc: Jon Hunter <jonathanh@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> [p.zabel@pengutronix.de: switch to hidden reset control array] Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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weiyi.lu@mediatek.com
|
9f99712661 |
soc: mediatek: update power domain data of MT2712
1. split MFG power domain into MFG/MFG_SC1/MFG_SC2/MFG_SC3 according to MT2712 ECO design change 2. add subdomain support for MT2712 Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
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Arnd Bergmann
|
3bea9c5885 |
i.MX drivers update for 4.17:
- Set GENPD_FLAG_ALWAYS_ON flag for ARM power domain to avoid incorrect
power state in sysfs pm_genpd_summary output.
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Merge tag 'imx-drivers-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers
Pull "i.MX drivers update for 4.17" from Shawn Guo:
- Set GENPD_FLAG_ALWAYS_ON flag for ARM power domain to avoid incorrect
power state in sysfs pm_genpd_summary output.
* tag 'imx-drivers-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: gpc: ARM power domain should be always-on
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Madalin Bucur
|
96f413f476 |
soc/fsl/qbman: fix issue in qman_delete_cgr_safe()
The wait_for_completion() call in qman_delete_cgr_safe() was triggering a scheduling while atomic bug, replacing the kthread with a smp_call_function_single() call to fix it. Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net> |
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Sean Wang
|
73ce2ce129 |
soc: mediatek: fix the mistaken pointer accessed when subdomains are added
Fix the pointer to struct scp_subdomian not being moved forward
when each sub-domain is expected to be iteratively added through
pm_genpd_add_subdomain call.
Cc: stable@vger.kernel.org
Fixes:
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Sean Wang
|
c932ba8c38 |
soc: mediatek: add SCPSYS power domain driver for MediaTek MT7623A SoC
Add SCPSYS power domain driver for MT7623A SoC. The MT7623A's power domains are the subset of MT7623 SoC's ones. As MT7623 SoC has full features whereas MT7623A is being designed just for router applications. Thus, MT7623A doesn't include those power domains multimedia function belongs to. In order to avoid certain errors undoubtedly happening at registering those power domains on MT7623A SoC using the existing MT7623 SCPSYS driver, it's required to define another setup specifically for MT7623A SoC. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
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Sean Wang
|
c59c9c85e3 |
soc: mediatek: avoid hardcoded value with bus_prot_mask
use a meaningful definition for bus_prot_mask instead of just hardcoded for it. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
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Bjorn Andersson
|
90c29ed762 |
soc: qcom: wcnss_ctrl: Fix increment in NV upload
hdr.len includes both the size of the header and the fragment, so using
this when stepping through the firmware causes us to skip 16 bytes every
chunk of 3072 bytes; causing only the first fragment to actually be
valid data.
Instead use fragment size steps through the firmware blob.
Fixes:
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Bjorn Andersson
|
fa65f80451 |
soc: qcom: rmtfs-mem: Add support for assigning memory to remote
On some platform the remote processor's memory map is not statically configured in TrustZone, so each memory region that is to be accessed by the remote needs a call into TrustZone to set up the remote's permissions. Implement this for the rmtfs memory driver, to give the modem on 8996 access to the shared file system buffers. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org> |
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Thierry Reding
|
507c655a06 |
soc/tegra: pmc: Pass PMC to tegra_powergate_power_up()
tegra_powergate_sequence_power_up() makes up a struct tegra_powergate from scratch in order to reuse the same code as used by the generic PM domain implementation. However, subsequent patches will need to access the struct tegra_pmc * embedded in the powergate structure, so we need to make sure we always pass it in. Tested-by: Hector Martin <marcan@marcan.st> Tested-by: Andre Heider <a.heider@gmail.com> Tested-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Peter De Schrijver
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a263394a09 |
soc/tegra: pmc: MBIST work around for Tegra210
Apply the memory built-in self test work around when ungating certain Tegra210 power domains. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Hector Martin <marcan@marcan.st> Tested-by: Andre Heider <a.heider@gmail.com> Tested-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Mikko Perttunen
|
56327f54d9 |
soc/tegra: pmc: Add Tegra194 compatibility string
The Tegra194 PMC is mostly compatible with Tegra186, including in all currently supported features. As such, add a new compatibility string but point to the existing Tegra186 SoC data for now. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Mikko Perttunen
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6f9ed07fde |
soc/tegra: Add Tegra194 SoC configuration option
Add the configuration option to enable support for the Tegra194 system- on-chip. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Neil Armstrong
|
6878231f25 |
meson-gx-socinfo: Add package id for S905H
The S905H can be found on the Wetek Hub and Play2 boards. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> |
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Arnd Bergmann
|
49774d86fd |
Samsung soc drivers changes for v4.17
1. Add SPDX license identifiers.
2. Populate children syscon nodes in PMU driver to properly model HW in
DeviceTree.
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Merge tag 'samsung-drivers-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers
Pull "Samsung soc drivers changes for v4.17" from Krzysztof Kozłowski:
1. Add SPDX license identifiers.
2. Populate children syscon nodes in PMU driver to properly model HW in
DeviceTree.
* tag 'samsung-drivers-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
soc: samsung: pmu: Populate children syscon nodes
soc: samsung: Add SPDX license identifiers to headers
memory: samsung: Add SPDX license identifiers
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Arnd Bergmann
|
18b4788bad |
Add am335x and am437x PM code for v4.17
This series of changes from Dave Gerlach adds the PM related code to allow low-power suspend states. The code consists of the SoC specific assembly code and a related PM driver. -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlqdeI4RHHRvbnlAYXRv bWlkZS5jb20ACgkQG9Q+yVyrpXPRoxAA3M1qhApgnJBrvCoVbOQbDsL/Jst5geJz eQIQMjqzLTJQDd6+0SJVggjRhDYW2mKk+SYbpbzjVfmdJeKAIX3IZj9MUMstbRSD g8YCzSpW9C2EuOHlDhDDd4U6pc7/pMmWHH87PMaj05Qfct+hcSpI7OB5RfntX0Os mhQ6e3SxlM9EZikiW2BXXjjKmQHYmqkfSZHhjbiGtpEXTa/zq/fVM67NEjdez7/F 1Uy3Hefv895H0TU+P3TtzLmvcQQn4JrIXNqi4wWM7ATf6MN9d9cPMxZ9mdTweCgd B0nSYgwwzXS2bNd7KhtghAXckGqLRL+0CifB0xw+jCExwL+aOQPwKdvbfnF2JVqe R8MochWgDBUAVX8hYpYD+IJ6qeoWFfu4ZEwFeMaQ0M2T7I417SSRwtNF2P9YSYOj b6dv8Fe54m8QhPJo2OPD/bbzo2wwNuLqJ9bqI3oy9yrMe5EEAzuhtqGBeg1B4WKB zWB2TQYLLl4FVJsfxV7wgsO2fk9xzs1cn70JWqdWMQ1kUl7k0NorZhSVlXt5x+oH gPfkWO2S7+Il/FKsOAdb+HeCklDyy/xh/B0VFErHvqXOK78j1IpcUh6I9lgg1GFs OXioMaGE13p+yOKQHDGqeK42Qjw2F6cPdkCGm67Mte66IqBV0khLpwK8WwzlcEio C5jhVOor2u8= =hBzh -----END PGP SIGNATURE----- Merge tag 'omap-for-v4.17/am-pm-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc Pull "Add am335x and am437x PM code for v4.17" from Tony Lindgren: This series of changes from Dave Gerlach adds the PM related code to allow low-power suspend states. The code consists of the SoC specific assembly code and a related PM driver. * tag 'omap-for-v4.17/am-pm-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: soc: ti: Add pm33xx driver for basic suspend support ARM: OMAP2+: pm33xx-core: Add platform code needed for PM ARM: OMAP2+: Introduce low-level suspend code for AM43XX ARM: OMAP2+: Introduce low-level suspend code for AM33XX |
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Marek Szyprowski
|
edcefb96fb |
clk: samsung: exynos5250: Move PD-dependent clocks to Exynos5 sub-CMU
Clocks related to DISP1 block require special handling for power domain turn on/off sequences. Till now this was handled by Exynos power domain driver, but that approach was limited only to some special cases. This patch moves handling of those operations to clock controller driver. This gives more flexibility and allows fine tune values of some clock-specific registers. This patch moves handling of those mentioned clocks to Exynos5 sub-CMU driver instantiated from Exynos5250 driver. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> |
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Marek Szyprowski
|
ec4016ff6e |
clk: samsung: exynos5420: Move PD-dependent clocks to Exynos5 sub-CMU
Clocks related to DISP, GSC and MFC blocks require special handling for power domain turn on/off sequences. Till now this was handled by Exynos power domain driver, but that approach was limited only to some special cases. This patch moves handling of those operations to clock controller driver. This gives more flexibility and allows fine tune values of some clock-specific registers. This patch moves handling of those mentioned clocks to Exynos5 sub-CMU driver instantiated from Exynos5420 driver. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> |
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Marek Szyprowski
|
af8d30ac64 |
soc: samsung: pm_domains: Add blacklisting clock handling
Handling of clock reparenting will be move to clock controller driver, so add possibility to blacklist clock handling on systems, where the clock controller already does all needed operations. This is needed to avoid potential deadlock on clock reparenting during power domain on/off procedure. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> |
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David S. Miller
|
0f3e9c97eb |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
All of the conflicts were cases of overlapping changes. In net/core/devlink.c, we have to make care that the resouce size_params have become a struct member rather than a pointer to such an object. Signed-off-by: David S. Miller <davem@davemloft.net> |
|
|
Jeffy Chen
|
b1271993aa |
soc: rockchip: power-domain: Add a sanity check on pd->num_clks
The of_count_phandle_with_args() can fail and return error(for example,
rk3399 pd_vio doesn't have clocks). That would break the pd probe.
Add a sanity check on pd->num_clks to avoid that.
Fixes: 65084121d59d ("soc: rockchip: power-domain: use clk_bulk APIs")
Reported-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Tested-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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|
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Jeffy Chen
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d909072d05 |
soc: rockchip: power-domain: use clk_bulk APIs
Use clk_bulk APIs, and also add error handling for clk enable. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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Xiao Yao
|
6e61c891a0 |
soc: rockchip: disable jtag switching for RK3128 SoCs
Disable IO function switching between sdmmc and jtag for RK3128 SoCs. Signed-off-by: Xiao Yao <xiaoyao@rock-chips.com> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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Linus Torvalds
|
97ace515f0 |
ARM: SoC fixes for 4.16
This is the first set of bugfixes for ARM SoCs, fixing a couple
of stability problems, mostly on TI OMAP and Rockchips platforms:
- OMAP2 hwmod clocks must be enabled in the correct order
- OMAP3 Wakeup from resume through PRM IRQ was unreliable
- One regression on OMAP5 caused by a kexec fix
- Rockchip ethernet needs some settings for stable operation on Rock64
- Rockchip based Chrombook Plus needs another clock setting for
stable display suspend/resume
- Rockchip based phyCORE-RK3288 was able to run at an invalid
CPU clock frequency
- Rockchip MMC link was sometimes unreliable
- Multiple fixes to avoid crashes in the Broadcom STB DPFE driver
Other minor changes include:
- Devicetree fixes for incorrect hardware description (rockchip,
omap, Gemini, amlogic)
- Some MAINTAINER file updates to correct email and git addresses
- Some fixes addressing 'make W=1' dtc warnings (broadcom, amlogic,
cavium, qualcomm, hisilicon, zx)
- Fixes for LTO-compilation (orion, davinci, clps711x)
- One fix for an incorrect Kconfig errata selection
- A memory leak in the OMAP timer driver
- A kernel data leak in OMAP1 debugfs files
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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
"This is the first set of bugfixes for ARM SoCs, fixing a couple of
stability problems, mostly on TI OMAP and Rockchips platforms:
- OMAP2 hwmod clocks must be enabled in the correct order
- OMAP3 Wakeup from resume through PRM IRQ was unreliable
- one regression on OMAP5 caused by a kexec fix
- Rockchip ethernet needs some settings for stable operation on
Rock64
- Rockchip based Chrombook Plus needs another clock setting for
stable display suspend/resume
- Rockchip based phyCORE-RK3288 was able to run at an invalid CPU
clock frequency
- Rockchip MMC link was sometimes unreliable
- multiple fixes to avoid crashes in the Broadcom STB DPFE driver
Other minor changes include:
- Devicetree fixes for incorrect hardware description (rockchip,
omap, Gemini, amlogic)
- some MAINTAINER file updates to correct email and git addresses
- some fixes addressing 'make W=1' dtc warnings (broadcom, amlogic,
cavium, qualcomm, hisilicon, zx)
- fixes for LTO-compilation (orion, davinci, clps711x)
- one fix for an incorrect Kconfig errata selection
- a memory leak in the OMAP timer driver
- a kernel data leak in OMAP1 debugfs files"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (38 commits)
MAINTAINERS: update entries for ARM/STM32
ARM: dts: bcm283x: Move arm-pmu out of soc node
ARM: dts: bcm283x: Fix unit address of local_intc
ARM: dts: NSP: Fix amount of RAM on BCM958625HR
ARM: dts: Set D-Link DNS-313 SATA to muxmode 0
ARM: omap2: set CONFIG_LIRC=y in defconfig
ARM: dts: imx6dl: Include correct dtsi file for Engicam i.CoreM6 DualLite/Solo RQS
memory: brcmstb: dpfe: support new way of passing data from the DCPU
memory: brcmstb: dpfe: fix type declaration of variable "ret"
memory: brcmstb: dpfe: properly mask vendor error bits
ARM: BCM: dts: Remove leading 0x and 0s from bindings notation
ARM: orion: fix orion_ge00_switch_board_info initialization
ARM: davinci: mark spi_board_info arrays as const
ARM: clps711x: mark clps711x_compat as const
arm: zx: dts: Remove leading 0x and 0s from bindings notation
arm64: dts: Remove leading 0x and 0s from bindings notation
arm64: dts: cavium: fix PCI bus dtc warnings
MAINTAINERS: ARM: at91: update my email address
soc: imx: gpc: de-register power domains only if initialized
ARM: dts: rockchip: Fix DWMMC clocks
...
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Dave Gerlach
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afe761f8d3 |
soc: ti: Add pm33xx driver for basic suspend support
AM335x and AM437x support various low power modes as documented in section 8.1.4.3 of the AM335x Technical Reference Manual and section 6.4.3 of the AM437x Technical Reference Manual. DeepSleep0 mode offers the lowest power mode with limited wakeup sources without a system reboot and is mapped as the suspend state in the kernel. In this state, MPU and PER domains are turned off with the internal RAM held in retention to facilitate the resume process. As part of the boot process, the assembly code is copied over to OCMCRAM so it can be executed to turn of the EMIF and put DDR into self refresh. Both platforms have a Cortex-M3 (WKUP_M3) which assists the MPU in DeepSleep0 entry and exit. WKUP_M3 takes care of the clockdomain and powerdomain transitions based on the intended low power state. MPU needs to load the appropriate WKUP_M3 binary onto the WKUP_M3 memory space before it can leverage any of the PM features like DeepSleep. This loading is handled by the remoteproc driver wkup_m3_rproc. Communication with the WKUP_M3 is handled by a wkup_m3_ipc driver that exposes the specific PM functionality to be used the PM code. In the current implementation when the suspend process is initiated, MPU interrupts the WKUP_M3 to let it know about the intent of entering DeepSleep0 and waits for an ACK. When the ACK is received MPU continues with its suspend process to suspend all the drivers and then jumps to assembly in OCMC RAM. The assembly code puts the external RAM in self-refresh mode, gates the MPU clock, and then finally executes the WFI instruction. Execution of the WFI instruction with MPU clock gated triggers another interrupt to the WKUP_M3 which then continues with the power down sequence wherein the clockdomain and powerdomain transition takes place. As part of the sleep sequence, WKUP_M3 unmasks the interrupt lines for the wakeup sources. WFI execution on WKUP_M3 causes the hardware to disable the main oscillator of the SoC and from here system remains in sleep state until a wake source brings the system into resume path. When a wakeup event occurs, WKUP_M3 starts the power-up sequence by switching on the power domains and finally enabling the clock to MPU. Since the MPU gets powered down as part of the sleep sequence in the resume path ROM code starts executing. The ROM code detects a wakeup from sleep and then jumps to the resume location in OCMC which was populated in one of the IPC registers as part of the suspend sequence. Code is based on work by Vaibhav Bedia. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> |
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Jacopo Mondi
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bf79cd635d |
soc: renesas: rcar-rst: Add support for R-Car M3-N
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
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Ingo Molnar
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ed7158bae4 |
treewide/trivial: Remove ';;$' typo noise
On lkml suggestions were made to split up such trivial typo fixes into per subsystem
patches:
--- a/arch/x86/boot/compressed/eboot.c
+++ b/arch/x86/boot/compressed/eboot.c
@@ -439,7 +439,7 @@ setup_uga32(void **uga_handle, unsigned long size, u32 *width, u32 *height)
struct efi_uga_draw_protocol *uga = NULL, *first_uga;
efi_guid_t uga_proto = EFI_UGA_PROTOCOL_GUID;
unsigned long nr_ugas;
- u32 *handles = (u32 *)uga_handle;;
+ u32 *handles = (u32 *)uga_handle;
efi_status_t status = EFI_INVALID_PARAMETER;
int i;
This patch is the result of the following script:
$ sed -i 's/;;$/;/g' $(git grep -E ';;$' | grep "\.[ch]:" | grep -vwE 'for|ia64' | cut -d: -f1 | sort | uniq)
... followed by manual review to make sure it's all good.
Splitting this up is just crazy talk, let's get over with this and just do it.
Reported-by: Pavel Machek <pavel@ucw.cz>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Stefan Agner
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7801c545e7 |
soc: imx: gpc: de-register power domains only if initialized
If power domain information are missing in the device tree, no
power domains get initialized. However, imx_gpc_remove tries to
remove power domains always in the old DT binding case. Only
remove power domains when imx_gpc_probe initialized them in
first place.
Fixes:
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Jacopo Mondi
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a527709b78 |
soc: renesas: rcar-sysc: Add R-Car M3-N support
Add support for R-Car M3-N (R8A77965) power areas. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
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Jacopo Mondi
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bfd8398339 |
soc: renesas: Identify R-Car M3-N
Add support for indentifying R-Car M3-N (R8A77965) SoC. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
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Sergei Shtylyov
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41d6d8bd8a |
soc: renesas: rcar-sysc: add R8A77980 support
Add support for R-Car V3H (R8A77980) SoC power areas to the R-Car SYSC driver. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
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Sergei Shtylyov
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40d5c8e947 |
soc: renesas: r8a77970-sysc: fix power area parents
According to the figure 9.2(b) of the R-Car Series, 3rd Generation User’s
Manual: Hardware Rev. 0.80 the A2IRn and A2SCn power areas in R8A77970 have
the A3IR area as a parent, thus the SYSC driver has those parents wrong...
Fixes:
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