Without an ->irq_set_wake() method in an irq_chip, calls to
enable_irq_wake() will fail. This also causes these interrupts to not
be able to abort suspend (via check_wakeup_irqs() in late suspend.)
Currently, we don't implement ->irq_set_wake() for INTC interrupts
because they default to be wakeup enabled by setting the GRPSEL bits
in PM init. Even though there is no ->irq_set_wake(), we want
enable_irq_wake() to succeed so these interrupts can abort suspend
when necessary.
To fix, set IRQCHIP_SKIP_SET_WAKE flag for all the INTC
interrupts which avoids trying to check irq_chip->irq_set_wake()
and failing when it doesn't exist.
Longer term, we need to implement ->irq_set_wake() for the INTC
which can manage the appropriate GRPSEL bits.
Signed-off-by: NeilBrown <neilb@suse.de>
[khilman@ti.com: rework changelog]
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Currently cpu_is_omap3517() actually detects any device in the AM35x
family (3517 and no-SGX version 3505.) To make it more clear what is
being detected, convert the names from 3517 to AM35xx.
This adds a new soc_is_am35xx() which duplicates the cpu_is_omap3517().
In order to avoid cross-tree dependencies with clock-tree changes,
cpu_is_omap3517() is left until the clock changes are merged,
at which point cpu_is_omap3517() will be completely removed.
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
Tested-by: Mark A. Greer <mgreer@animalcreek.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
[tony@atomide.com: change to use soc_is_omap instead]
Signed-off-by: Tony Lindgren <tony@atomide.com>
There are several checks for AM35x devices done using
if (cpu_is_omap3517() || cpu_is_omap3505())
However, since the 3505 is just a 3517 without an SGX, the 3505 check
is redundant because cpu_is_omap3517() will always be true whenever
cpu_is_omap3505() is true. From <plat/cpu.h>:
#define cpu_is_omap3505() (cpu_is_omap3517() && !omap3_has_sgx())
Therefore, remove the redunant 3505 checks. This helps move towards
removal of SoC detection that depends on specific IP detection.
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
Tested-by: Mark A. Greer <mgreer@animalcreek.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The system dma module has capabiities register indicating
the support for descriptor loading, constant fill, etc.
Use this instead of OMAP revision check to identify the features
supported runtime.
This avoids patching the code for feature SOCs which has
those capabilities.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
EMIF, GMPC and DMM driver can ioremap() the address
space as part of driver intialisation and there is
no need to have static IO mapping for them.
Hence remove the un-used static IP space and let
the respective drivers manage it as part if driver
init.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Current OMAP code doesn't use any of the OMAP_WKG_ENB_SECURE_*
registers.
So remove those defines.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Since OMAP4 code base now makes use of OMAP4 specific PRCM functions,
cm2xxx_3xxx.c need not be compiled for OMAP4 only builds.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
OMAP44xx family of SoCs. There still seem to be a few missing, such
as those for the MMU IP blocks, but this seems to cover the bulk of
the remainder.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPkHNvAAoJEMePsQ0LvSpLH5cQALFSa2wEDWpJP9UZzeOPYAfV
BsyNSZCWkYenokaOFZ4UcGZZf8nk+RixVtHb4cEfiVLygbXoiH2uNCzogK56Avil
TMAcnvXPv9/uL//GW/2Mwxzl5qUKK+v9d6yZLP0bzK+nPiw8ALJqcEIPKNunedB6
Q7d2gIwrWAeHvHec+PINV4eR0ix9GTqEU2YxVwvPDhH3yQMMNWPhZLStGcgPSk5k
UGf5zsVLrIgnzZYy7DFbKOoXhODi2QWJ8+11LWH7QZFPjjCutjaCk9kDdAFDxQqd
t4HBs1MzloW0F/Mmc+DN/F2ETuEjXoK0Mugq0SYB3SPXZIQ8zdWqFR5o9vljoy8e
wLhpaxwImZLIy5bLAz4dl4aBMUrKhTMHGXu6XItekiOW3DvnTYLowpaioct5CGst
Eaw4AwPtaT2jMB3lcqWVFKjWuZhb2J6hbXBCrYmGI/qgz5Az+p5cXK014nKCuALo
g4DG/WyZZJFUIWU378wgHurRiwnonWOTNFrtSOtQ84JqmbXYMyc/8J57wiZg0Ea4
tRvUq4DHMFev9aCdpSZlBo47Y1Da8ZbWzGXv8r5ePnLaISWrVHmDv+WpTCQ+eO71
m5xJQTLYhTa3/PLLH5K2Z7AfQWeJhXwEuudk5DCmkt0PpbatD3TnqaP6NzBtK3kQ
uA4d6dh51PJuy1iBwZ1j
=ToTm
-----END PGP SIGNATURE-----
Merge tag 'omap-devel-a-for-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into devel-hwmod
Add in most of the remaining hwmods (IP block descriptions) for the
OMAP44xx family of SoCs. There still seem to be a few missing, such
as those for the MMU IP blocks, but this seems to cover the bulk of
the remainder.
control code for OMAP SoCs. In particular, this series results in
a considerable diffstat savings by changing the way that IP block
interconnections are defined.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJPkE3+AAoJEMePsQ0LvSpLzrMQAJV6ie5CZTu8FC+dIVplnn5q
Tv12c1CUb1SRCxSYRFhxVDm+jL5d7sQ99C/HZ7kStz23OVn+r8OlyFmLTLk59Bkl
tf8iBEcMyaB+oMvDddYyzcetjT3gpG0yOZC7FMYkfpwCd8DM2hk+8k4JawXe8cqu
3HzDoeXynbF5QCgZpaORAZT8FH4tmTJl1XMkENIflmuwDV8QvwrKZmcJILnr2r+p
pZhCt972xWV6PZYJ0HvdjgabbQ92jyIFggqNeA/BBNoMhfTXbhUFpZE2Oy/Y5vmu
5qXR8yKFesV7jeXyiOMBzHLhMv9Rf4ivAE6u3aVmSIGrKvYTIPNEX9ric8Ryv1Um
33y6NTLv4SsTeKqmL4gCFmbkTz9aixbonThr1yr9ZCHD7jXwjLUjkxyXyjTZRAOV
BWWgMiTKxXmJ1o2AJ/Y3xEWkWsmeafSdKpEF9aPpLyX6bW5oYObAJ1KorvnUut6W
YLWVP3JOfPFpcLHLFA/wtLbk+FwyKdbkLTyP29qJDvg3mUjJG0JGRaHA20hiZIOC
zvxmq/Or7gMvDFXOY3EY97xnDLFbiM+efT/5KuTXI2sel2ojcL8uVJU6qvxGN86h
5rz+E7RXpdtYafvtF0AKdX65Ntyqpe5EUUSnQJAB1xTC9CkFlVVn21R2PO+1P0+e
xWjiHLK/+amqrZa+zkks
=NqUz
-----END PGP SIGNATURE-----
Merge tag 'omap-cleanup-b-for-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into cleanup-hwmod
Clean up various aspects of the OMAP hwmod code, which is the IP block
control code for OMAP SoCs. In particular, this series results in
a considerable diffstat savings by changing the way that IP block
interconnections are defined.
Add a skeleton hwmod for the DEBUGSS and associated interconnect data.
This is a basic set of data that will need further additions as
further DEBUGSS information becomes available.
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the PRCM, CM, PRM, and related hwmod and associated interconnect
data. These IP blocks handle most of the on-chip power, reset, and clock
control.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Add the System Control Module hwmod and associated interconnect data.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Add the OCP-WP hwmod and associated interconnect data. The OCP-WP,
or OCP watchpoint, can be used to collect interconnect data and
transmit it via the STM port.
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the OCM RAM IP block and interconnect data. This is an oh-chip
block of SRAM connected directly to the L3 bus.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Add the OCP2SCP IP block and interconnect data. The OCP2SCP can be
used in conjunction with the on-chip embedded USB PHY, associated with
the OTG controller.
Add the on-chip full-speed USB host controller IP block and
interconnect data.
Cc: Felipe Balbi <balbi@ti.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the SL2 interface IP block and interconnect data. The SL2 is related
to the IVA-HD subsystem.
Add IP block and interconnect data for the C2C ("Chip-to-chip")
interconnect. This can provide a direct system interconnect link to
other devices stacked on the OMAP package.
Add the ELM IP block and interconnect data. The ELM can be used
to locate errors in NAND flash connected to the GPMC.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Add the McASP hwmod and associated interconnect data. The McASP is a
general-purpose audio serial port.
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the Slimbus hwmods and associated interconnect data. The Slimbus
IP blocks implement a two-wire serial interface.
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the GPU hwmod and associated interconnect data. The GPU is a
graphics accelerator.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Add the EMIF1 and 2 hwmods and associated interconnect data. The EMIFs
are SDRAM interface IP blocks.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Add the GPMC hwmod and associated interconnect data. The GPMC is a
programmable parallel-bus memory controller.
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the HDQ/1-wire hwmod and associated interconnect data. The
HDQ/1-wire IP block is a low-speed serial interconnect.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Add hwmod data for the OMAP4 FDIF IP block.
This patch also includes a change (originally from Fernando Guzman
Lugo <fernando.lugo@ti.com>) to set a softreset delay for the FDIF IP
block:
http://www.spinics.net/lists/arm-kernel/msg161874.html
Signed-off-by: Ming Lei <ming.lei@canonical.com>
Acked-by: Benoît Cousson <b-cousson@ti.com>
Cc: Fernando Guzman Lugo <fernando.lugo@ti.com>
[paul@pwsan.com: rearranged to match script output; fixed FDIF end address to
match script data; wrote trivial changelog; combined the FDIF portion of
Fernando's srst_udelay patch]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The PRM and CM implicit clockdomains will soon be used by OMAP44xx.
So, make them common to OMAP2+ and modify the OMAP4 clockdomains code
so use of these clockdomains doesn't crash the system.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
N800 logs this message on boot:
[ 0.182281] omap_hwmod: iva: cannot be enabled for reset (3)
Fix by creating basic IVA1 and DSP hwmods for OMAP2420, and a basic IVA2
hwmod for OMAP2430. There is still more information to be added, but
this should resolve the immediate issue.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The IVA hwmod data is missing some fields that cause the following
warning on boot:
[ 0.118011] omap_hwmod: iva: cannot be enabled for reset (3)
Fix by encoding the IP block's main functional clock, reset lines, and
clockdomain.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The OMAP3 hwmod data listed iva2_ck as an interface clock between the
IVA and L3. This is incorrect. iva2_ck is not an interface clock.
Since it cannot auto-idle, specifying it here prevents the IVA and at
least one of the CORE clockdomains from going idle, which causes PM
problems such as these upon system suspend:
[ 70.626129] Powerdomain (iva2_pwrdm) didn't enter target state 1
[ 70.626190] Powerdomain (core_pwrdm) didn't enter target state 1
Fix by specifying the actual interface clock in the hwmod data.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Several struct omap_hwmod_ocp_if records can be shared between OMAP2420
and OMAP2430. Move these shared records out of the chip-specific files
into mach-omap2/omap_hwmod_2xxx_interconnect_data.c. This should save some
memory and source lines, at the cost of readability.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
After the link registration conversion, it's much easier to share some
hwmod data between OMAP2420 and 2430. Move the shareable data into a
common file. This should save some memory and lines of source, at the
cost of readability.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Reorganize the hwmod data to declare the IP blocks first and the
interconnects second. This allows us to remove the forward
declarations, which this patch also does. Saves some lines of source
data. While here, take the opportunity to synchronize the order of
the OMAP44xx hwmod data with the autogenerator output -- it's slightly
different due to past mismerges -- and fix a few minor typos and
whitespace problems in the files.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Now that the data has been converted to use interface registration, we
can remove the (now unused) direct hwmod registration code.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Register interconnect links between IP blocks, rather than the IP
blocks themselves. (The IP blocks will be registered as a side-effect
of registering the links.)
The objective is to reduce the number of lines of static data and
facilitate the sharing of IP block data between different SoCs. These
objectives come at the penalty of increased boot time due to increased
computation.
While here, fix a few whitespace problems and inaccurate variable names.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Add support for direct IP block interconnect ("link") registration to
the hwmod code via a new function, omap_hwmod_register_links(). This
will replace direct registration of hwmods, and a subsequent patch
will remove omap_hwmod_register().
This change will allow a subsequent patch to remove the hwmod data
link arrays. This will reduce the size of the hwmod static data and
also make it easier to generate the data files. It will also make it
possible to share some of the struct omap_hwmod records across
multiple SoCs, since the link array pointers will be removed from the
struct omap_hwmod.
The downside is that boot time will increase. Minimizing boot time
was the reason why the link arrays were originally introduced.
Removing them will require extra computation during boot to allocate
memory and associate IP blocks with their interconnects. However,
since the current kernel development focus is on reducing the number
of lines in arch/arm/mach-omap2/, boot time impact is now seemingly
considered a lower priority.
This patch contains additional complexity to reduce the number of
memory allocations required for this change. This reduces the boot
time impact: total hwmod link registration time was ~ 2655
microseconds with a simple allocation strategy, but is now ~ 549
microseconds[1] with the approach taken by this patch.
1. Measured on a BeagleBoard 35xx @ 500MHz MPU/333 MHz CORE, average
of 7 samples. Total uncertainty is +/- 61 microseconds.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
An IP block's MPU interface port only needs to be found once. The result
can be cached to speed further lookups. This patch consolidates these
two steps into a single function.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
To reduce the number of lines of data in the OMAP portion of the Linux
code base, subsequent patches will remove the lists of hwmod
interconnect links from the static hwmod data. These lists will be
built dynamically during boot. To ease this transition, this patch
centralizes the way that interconnect links are iterated into a single
function, _fetch_next_ocp_if().
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Most IP blocks on the OMAP SoC have an interconnect link that is
intended to be used by the MPU to communicate with the IP block.
Several parts of the hwmod code need to be able to identify this link.
Currently, this is open-coded. However, future patches will change
the way that interconnect links are represented and will make
identifying the link more complex. So to avoid code duplication, this
patch centralizes the MPU port link identification code into a new
function, _find_mpu_rt_port().
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Some hwmods were commented out from the OMAP4 data, under the theory
that they shouldn't be added until drivers were ready. But part of
the utility of the hwmod code is that it can reset and properly
initialize IP blocks that have no drivers associated with them.
Rather than commenting the links in the future hwmod data conversion
patches, discussing this with Benoit, it seems best to simply
uncomment them now.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
One of the OMAP4 links was missing OCP_USER flags, since it was only
used by the DSP initiator, and we did not have an OCP_USER_DSP flag.
Future patches will switch the hwmod code and data to register
interfaces, rather than hwmods, and it will be mandatory for all
interfaces to have at least one user bit set. This patch resolves the
issue by adding OCP_USER_DSP and marking the DSP-IVA interface
appropriately.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Commit 407a6888f7 ("OMAP4: hwmod data:
Add AESS, McPDM, bandgap, counter_32k, MMC, KBD, ISS & IPU") adds a
hwmod for the bandgap die temperature sensor IP block. This IP block
has no interconnect port or firewall region, nor does it have an
independent register space or OCP control registers. Its registers
are embedded in the System Control Module (SCM) IP block. So it
appears that the bandgap device should be created by the SCM driver.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
GPTIMER12 is attached to the L4 SEC interconnect, not directly to L4 WKUP.
Add the L4 SEC interconnect and attach GPTIMER12 to it.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The OMAP3 hwmod data was missing a DSS->L3 interconnect link for the
OMAP3430 ES1 DSS hwmod. Since the hwmod code and data is being modified
to register interfaces rather than hwmods, this would result in the DSS hwmod
not being registered correctly on OMAP3430ES1.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Commit a52e2ab66d ("ARM: OMAP3: hwmod
data: disable multiblock reads on MMC1/2 on OMAP34xx/35xx <= ES2.1")
didn't link the MMC hwmods to the interconnects correctly. Future
patches will register hwmods by interface, so if this is not fixed,
the MMC IP blocks won't be registered. Update the interface data
records to point to the correct IP blocks.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Some of the 2xxx and 3xxx hwmod data files use the old naming style
for hwmods, ending in a "_hwmod". These names are used by the OMAP
integration code to map hwmods to platform_devices, so they need to be
consistent, or the platform_devices won't be created. Remove the
_hwmod suffix to conform with the rest of the OMAP SoC data.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
arch/arm/mach-omap2/timer.c pokes around inside the hwmod data
structures. Since the hwmod data structures are about to change, this
code will break. This patch modifies the timer code to use
recently-added hwmod functions instead.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
The timer integration code pokes around in hwmod data structures.
Those data structures are about to change. Define a function,
omap_hwmod_get_resource_byname(), for the timer integration code to
use instead.
The original patch has been changed to use struct resource by Tony's
request, although the caller of this function should not be a driver._
Platform drivers should get their data through the regular platform_*
functions; DT drivers through the appropriate of_* functions. This a
function is only for use by OMAP core code in arch/arm/*omap*.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
NeilBrown