Commit Graph

7896 Commits

Author SHA1 Message Date
Boris Brezillon fddf5cec1c mtd: rawnand: diskonchip: Get rid of doc2000_readbuf_dword()
The logic can easily be merged in doc2000_readbuf().

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200501143917.1388957-3-boris.brezillon@collabora.com
2020-05-11 09:51:43 +02:00
Boris Brezillon a50b0c20be mtd: rawnand: diskonchip: Make sure doc2001plus_readbuf() works for single byte reads
Single byte accesses normally go through read_byte() but we are about
to use this function in the exec_op() implementation and thus needs to
prepare for single byte reads.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200501143917.1388957-2-boris.brezillon@collabora.com
2020-05-11 09:51:43 +02:00
Boris Brezillon dace12ccfd mtd: rawnand: diskonchip: Set the NAND_NO_BBM_QUIRK flag
We have a dummy block_bad() implementation returning 0. Let's set the
NAND_NO_BBM_QUIRK flag and let the core take care of that.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200511064917.6255-3-boris.brezillon@collabora.com
2020-05-11 09:51:43 +02:00
Boris Brezillon 8420c68a16 mtd: rawnand: cafe: Set the NAND_NO_BBM_QUIRK flag
We have a dummy block_bad() implementation returning 0. Let's set the
NAND_NO_BBM_QUIRK flag and let the core take care of that.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200511064917.6255-2-boris.brezillon@collabora.com
2020-05-11 09:51:43 +02:00
Boris Brezillon ec7cfc3d76 mtd: rawnand: Add a NAND_NO_BBM_QUIRK flag
Some controllers with embedded ECC engines override the BBM marker with
data or ECC bytes, thus making bad block detection through bad block
marker impossible. Let's flag those chips so the core knows it shouldn't
check the BBM and consider all blocks good.

This should allow us to get rid of two implementers of the
legacy.block_bad() hook.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200511064917.6255-1-boris.brezillon@collabora.com
2020-05-11 09:51:43 +02:00
Miquel Raynal 22dc5f9d49 mtd: rawnand: micron: Allow controllers to overload raw accessors
Some controller drivers do not support executing regular
nand_read/write_page_raw() helpers. For that, we created
nand_monolithic_read/write_page_raw() alternatives. Let's now allow
the driver to overload the ECC ->read/write_page_raw() hooks when
these hooks are supported.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200507105241.14299-14-miquel.raynal@bootlin.com
2020-05-11 09:51:43 +02:00
Miquel Raynal 0e7f4b64ea mtd: rawnand: Allow controllers to overload soft ECC hooks
Some controller drivers do not support executing regular
nand_read/write_page_raw() helpers. For that, we created
nand_monolithic_read/write_page_raw() alternatives. Let's now allow
the driver to overload the ECC ->read/write_page_raw() hooks.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200507105241.14299-13-miquel.raynal@bootlin.com
2020-05-11 09:51:43 +02:00
Miquel Raynal 658beb6639 mtd: rawnand: Expose monolithic read/write_page_raw() helpers
The current nand_read/write_page_raw() helpers are already widely used
but do not fit the purpose of "constrained" controllers which cannot,
for instance, separate command/address cycles with data cycles.

Workaround this issue by proposing alternative helpers that can be
used by these controller drivers instead.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200507105241.14299-12-miquel.raynal@bootlin.com
2020-05-11 09:51:43 +02:00
Miquel Raynal daca31765e mtd: rawnand: jedec: Adapt the parameter page read to constraint controllers
We already know that there are controllers not able to read the three
copies of the parameter page in one go. The workaround was to first
request the controller to assert command and address cycles on the
NAND bus to trigger a parameter page read, and then do a read
operation for each page.

But there are also controllers which are not able to split the
parameter page read between the command/address cycles and the actual
data operation.

Let's use a regular PARAMETER PAGE READ operation for the first
iteration and use eithe a CHANGE READ COLUMN or a simple DATA READ
operation for the following copies, depending on what the controller
supports. The default for non-exec-op compliant drivers remains
unchanged: use a SIMPLE READ.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200507105241.14299-11-miquel.raynal@bootlin.com
2020-05-11 09:51:43 +02:00
Miquel Raynal c27842e7e1 mtd: rawnand: onfi: Adapt the parameter page read to constraint controllers
We already know that there are controllers not able to read the three
copies of the parameter page in one go. The workaround was to first
request the controller to assert command and address cycles on the
NAND bus to trigger a parameter page read, and then do a simple read
operation for each page.

But there are also controllers which are not able to split the
parameter page read between the command/address cycles and the actual
data operation.

Let's use a regular PARAMETER PAGE READ operation for the first
iteration and use either a CHANGE READ COLUMN or a simple DATA READ
operation for the following copies, depending on what the controller
supports. The default behavior for non-exec-op compliant drivers
remains the same: DATA READ.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200507105241.14299-10-miquel.raynal@bootlin.com
2020-05-11 09:51:43 +02:00
Miquel Raynal b451f5beec mtd: rawnand: Give the possibility to verify a read operation is supported
This can be used to discriminate between two path in the parameter
page detection: use data_in cycles (like before) if supported, use the
CHANGE READ COLUMN command otherwise.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200507105241.14299-9-miquel.raynal@bootlin.com
2020-05-11 09:51:42 +02:00
Miquel Raynal 930370253e mtd: rawnand: Add a helper to check supported operations
Let's use a helper to clearly check if an operation is supported or not.

Return -ENOTSUPP when ->exec_op() is not implemented as we cannot know.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200507105241.14299-8-miquel.raynal@bootlin.com
2020-05-11 09:51:42 +02:00
Miquel Raynal 21b5cf3f64 mtd: rawnand: Avoid indirect access to ->data_buf()
The logic in nand_do_read_ops() is to use a bufpoi variable, either
set to the original buffer, or set to a bounce buffer which in the end
happens to be chip->data_buf depending on the value of the
use_bounce_buf boolean. This is not a reason to call chip->data_buf
directly when we know that we are using the bounce buffer. Let's use
bufpoi instead to be consistent.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200507105241.14299-7-miquel.raynal@bootlin.com
2020-05-11 09:51:42 +02:00
Miquel Raynal 6446907307 mtd: rawnand: Rename the use_bufpoi variables
Both in nand_do_read_ops() and nand_do_write_ops() there is a boolean
called use_bufpoi which is set to true in case of unaligned request or
when there is a need for a DMA-able buffer. It basically means "use a
bounce buffer".

Depending on the value of use_bufpoi, the bufpoi variable is always
used and will either point to the original buffer or to the nand_chip
structure "internal data buffer" (this buffer is allocated with
kmalloc() on purpose so that it will be DMA-compliant).

In all cases bufpoi is used so the boolean name is misleading. Rename
use_bufpoi to be use_bouce_buf to be more accurate.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200507105241.14299-6-miquel.raynal@bootlin.com
2020-05-11 09:51:42 +02:00
Miquel Raynal 2f959949f2 mtd: rawnand: Fix comments about the use of bufpoi
Clarify these comments which are not very accurate (even wrong in the
read case).

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200507105241.14299-5-miquel.raynal@bootlin.com
2020-05-11 09:51:42 +02:00
Miquel Raynal ce8148d7b8 mtd: rawnand: Rename a NAND chip option
NAND controller drivers can set the NAND_USE_BOUNCE_BUFFER flag to a
chip 'option' field. With this flag, the core is responsible of
providing DMA-able buffers.

The current behavior is to not force the use of a bounce buffer when
the core thinks this is not needed. So in the end the name is a bit
misleading, because in theory we will always have a DMA buffer but in
practice it will not always be a bounce buffer.

Rename this flag NAND_USES_DMA to be more accurate.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200507105241.14299-4-miquel.raynal@bootlin.com
2020-05-11 09:51:42 +02:00
Boris Brezillon 66aaba3a07 ubi: Relax the 'no MLC' rule and allow MLCs operating in SLC mode
The MTD layer provides an SLC mode (purely software emulation of SLC
behavior) addressing the paired-pages corruption issue, which was the
main reason for refusing attaching MLC NANDs to UBI.

Relax this rule and allow partitions that have the
MTD_EMULATE_SLC_ON_MLC flag set to be attached.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Richard Weinberger <richard@nod.at>
Link: https://lore.kernel.org/linux-mtd/20200503155341.16712-9-miquel.raynal@bootlin.com
2020-05-11 09:51:42 +02:00
Boris Brezillon 568d841b68 mtd: cmdlinepart: Add an slc option to use SLC mode on a part
Add a new option to set the MTD_SLC_ON_MLC_EMULATION flag.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200503155341.16712-8-miquel.raynal@bootlin.com
2020-05-11 09:51:42 +02:00
Boris Brezillon 1998053c8e mtd: partitions: ofpart: Parse the slc-mode property
Parse the slc-mode property and set the MTD_MLC_IN_SLC_MODE flag
when present.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200503155341.16712-7-miquel.raynal@bootlin.com
2020-05-11 09:51:42 +02:00
Boris Brezillon 9e3307a169 mtd: Add support for emulated SLC mode on MLC NANDs
MLC NANDs can be made a bit more reliable if we only program the lower
page of each pair. At least, this solves the paired-pages corruption
issue.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200503155341.16712-5-miquel.raynal@bootlin.com
2020-05-11 09:51:41 +02:00
Boris Brezillon d652f3a5bd mtd: rawnand: toshiba: Set the pairing scheme for TC58TEG5DCLTA00
TC58TEG5DCLTA00 uses a stride of 3 between its lower and upper page.
Set the appropriate pairing scheme at init time.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200503155341.16712-4-miquel.raynal@bootlin.com
2020-05-11 09:51:41 +02:00
Boris Brezillon 18729b1776 mtd: rawnand: Define the "distance 3" MLC pairing scheme
Define a new page pairing scheme for MLC NANDs with a distance of 3
pages between the lower and upper page.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200503155341.16712-3-miquel.raynal@bootlin.com
2020-05-11 09:51:41 +02:00
Boris Brezillon 5338ef99c9 mtd: rawnand: toshiba: Add a specific init for TC58TEG5DCLTA00
TC58TEG5DCLTA00 is an MLC NAND which requires scrambling and supports
SDR timings mode 5.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200503155341.16712-2-miquel.raynal@bootlin.com
2020-05-11 09:51:41 +02:00
Boris Brezillon 51b71ac092 mtd: rawnand: cs553x: Get rid of the legacy interface implementation
Now that exec_op() is implemented we no longer need to implement the
legacy hooks.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200501090650.1138200-5-boris.brezillon@collabora.com
2020-05-11 09:51:41 +02:00
Boris Brezillon b4ed6328b9 mtd: rawnand: cs553x: Implement exec_op()
So we can later get rid of the legacy hooks.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200501090650.1138200-4-boris.brezillon@collabora.com
2020-05-11 09:51:41 +02:00
Boris Brezillon ba03e48339 mtd: rawnand: cs553x: Stop using chip->legacy.IO_ADDR_{R, W}
Now that we have our own controller struct we can keep the MMIO pointer
in there and use instead of using the chip->legacy.IO_ADDR_{R,W} fields.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200501090650.1138200-3-boris.brezillon@collabora.com
2020-05-11 09:51:41 +02:00
Boris Brezillon c9e1817ff9 mtd: rawnand: cs553x: Declare controllers instead of NAND chips
The CS553x companion chip embeds 4 NAND controllers. Declare them as
NAND controllers instead of NAND chips. That's done in preparation
of the transition to exec_op().

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200501090650.1138200-2-boris.brezillon@collabora.com
2020-05-11 09:51:41 +02:00
Miquel Raynal 432ab89d30 mtd: rawnand: jedec: Use intermediate variables to improve readability
Before reworking a little bit the JEDEC detection code, let's
clean the coding style of an if statement to improve readability.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200428094302.14624-10-miquel.raynal@bootlin.com
2020-05-11 09:51:41 +02:00
Miquel Raynal 2e8f56f2a9 mtd: rawnand: jedec: Define the number of parameter pages
Use a macro to define the number of parameter page instead of
hardcoding it everywhere.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200428094302.14624-9-miquel.raynal@bootlin.com
2020-05-11 09:51:40 +02:00
Miquel Raynal 6e9c65d87c mtd: rawnand: onfi: Drop a useless parameter page read
During detection the logic on the NAND bus is:

    /* Regular ONFI detection */
    1/ read the three NAND parameter pages

    /* Extended parameter page detection */
    2/ send "read the NAND parameter page" commands without reading
       actual data
    3/ move the column pointer to the extended page and read it

If fact, as long as there is nothing happening on the NAND bus between
1/ and 3/, the operation 2/ is redundant so remove it.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200428094302.14624-8-miquel.raynal@bootlin.com
2020-05-11 09:51:40 +02:00
Miquel Raynal 7e928263fc mtd: rawnand: onfi: Avoid doing a copy of the parameter page
There is no need for copying the parameter page, playing with
pointers does the trick.

There is not functional change.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200428094302.14624-7-miquel.raynal@bootlin.com
2020-05-11 09:51:40 +02:00
Miquel Raynal dacd1a1297 mtd: rawnand: onfi: Define the number of parameter pages
Use a macro to define the number of parameter page instead of
hardcoding it everywhere.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200428094302.14624-6-miquel.raynal@bootlin.com
2020-05-11 09:51:40 +02:00
Miquel Raynal 543e34f29d mtd: rawnand: onfi: Use intermediate variables to improve readability
Before reworking a little bit the ONFI detection code, let's
clean the coding style of the if statements to improve readability.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200428094302.14624-5-miquel.raynal@bootlin.com
2020-05-11 09:51:40 +02:00
Miquel Raynal 1d5d08ee9b mtd: rawnand: onfi: Fix redundancy detection check
During ONFI detection, the CRC derived from the parameter page and the
CRC supposed to be at the end of the parameter page are compared. If
they do not match, the second then the third copies of the page are
tried.

The current implementation compares the newly derived CRC with the CRC
contained in the first page only. So if this particular CRC area has
been corrupted, then the detection will fail for a wrong reason.

Fix this issue by checking the derived CRC against the right one.

Fixes: 39138c1f4a ("mtd: rawnand: use bit-wise majority to recover the ONFI param page")
Cc: stable@vger.kernel.org
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200428094302.14624-4-miquel.raynal@bootlin.com
2020-05-11 09:51:40 +02:00
Miquel Raynal 4d8ec041d9 mtd: rawnand: timings: Fix default tR_max and tCCS_min timings
tR and tCCS are currently wrongly expressed in femtoseconds, while we
expect these values to be expressed in picoseconds. Set right
hardcoded values.

Fixes: 6a943386ee mtd: rawnand: add default values for dynamic timings
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200428094302.14624-3-miquel.raynal@bootlin.com
2020-05-11 09:51:40 +02:00
Miquel Raynal 83c411c29b mtd: rawnand: timings: Add mode information to the timings structure
Convert the timings union into a structure containing the mode and the
actual values. The values are still a union in prevision of the
addition of the NVDDR modes.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200428094302.14624-2-miquel.raynal@bootlin.com
2020-05-11 09:51:40 +02:00
Miquel Raynal 1617942a81 mtd: rawnand: marvell: Rename the ->correct() function
There is no correction involved at this point, it is just a matter of
reading registers and checking whether bitflips have occurred or
not. Rename the function to clarify it.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200424164501.26719-7-miquel.raynal@bootlin.com
2020-05-11 09:51:40 +02:00
Miquel Raynal 82c6c04e96 mtd: rawnand: marvell: Rename a function to clarify
Cosmetic change to clarify the purpose of the function.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200424164501.26719-6-miquel.raynal@bootlin.com
2020-05-11 09:51:40 +02:00
Miquel Raynal c525b7af96 mtd: rawnand: marvell: Fix probe error path
Ensure all chips are deregistered and cleaned in case of error during
the probe.

Fixes: 02f26ecf8c ("mtd: nand: add reworked Marvell NAND controller driver")
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200424164501.26719-5-miquel.raynal@bootlin.com
2020-05-11 09:51:39 +02:00
Miquel Raynal 7a0c18fb5c mtd: rawnand: marvell: Use nand_cleanup() when the device is not yet registered
Do not call nand_release() while the MTD device has not been
registered, use nand_cleanup() instead.

Fixes: 02f26ecf8c ("mtd: nand: add reworked Marvell NAND controller driver")
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200424164501.26719-4-miquel.raynal@bootlin.com
2020-05-11 09:51:39 +02:00
Miquel Raynal 5dcc99763c mtd: rawnand: marvell: Use devm_platform_ioremap_res()
Switch from the old platform_get_resource()/devm_ioremap_resource()
couple to the newer devm_platform_ioremap_resource() helper.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200424164501.26719-3-miquel.raynal@bootlin.com
2020-05-11 09:51:39 +02:00
Miquel Raynal c27075772d mtd: rawnand: marvell: Fix the condition on a return code
In a previous fix, I changed the condition on which the timeout of an
IRQ is reached from:

    if (!ret)

into:

    if (ret && !pending)

While having a non-zero return code is usual in the Linux kernel, here
ret comes from a wait_for_completion_timeout() which returns 0 when
the waiting period is too long.

Hence, the revised condition should be:

    if (!ret && !pending)

The faulty patch did not produce any error because of the !pending
condition so this change is finally purely cosmetic and does not
change the actual driver behavior.

Fixes: cafb56dd74 ("mtd: rawnand: marvell: prevent timeouts on a loaded machine")
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200424164501.26719-2-miquel.raynal@bootlin.com
2020-05-11 09:51:39 +02:00
Miquel Raynal d10b41ba02 mtd: rawnand: Give more information about the ECC weakness
When the ECC strength is too weak compared to the NAND chip
requirements, display the values so that it is clear for people how
much they are far from the requirements (and might get in troubles in
the future).

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200421163906.7515-1-miquel.raynal@bootlin.com
2020-05-11 09:51:39 +02:00
Boris Brezillon 806adfbe88 mtd: rawnand: au1550nd: Patch the read/write buf helper prototypes
To match the types passed by au1550nd_exec_instr() function.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200419193037.1544035-5-boris.brezillon@collabora.com
2020-05-11 09:51:39 +02:00
Boris Brezillon b1593f8a43 mtd: rawnand: au1550nd: Get rid of the legacy interface implementation
Now that exec_op() is implemented we can get rid of all other hooks.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200419193037.1544035-4-boris.brezillon@collabora.com
2020-05-11 09:51:32 +02:00
Boris Brezillon a67537ef37 mtd: rawnand: au1550nd: Implement exec_op()
So we can later get rid of the legacy interface implementation.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200419193037.1544035-3-boris.brezillon@collabora.com
2020-05-10 21:18:50 +02:00
Boris Brezillon 15770370df mtd: rawnand: au1550nd: Stop using IO_ADDR_{R, W} in au_{read, write}_buf[16]()
We are about to re-use those for the exec_op() implementation which
will not rely on au1550_hwcontrol(). Let's patch those helpers to
simply use the iomem address stored in the context.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200419193037.1544035-2-boris.brezillon@collabora.com
2020-05-10 21:18:48 +02:00
Masahiro Yamada 5756f2e8da mtd: rawnand: denali: add more delays before latching incoming data
The Denali IP have several registers to specify how many clock cycles
should be waited between falling/rising signals. You can improve the
NAND access performance by programming these registers with optimized
values.

Because struct nand_sdr_timings represents the device requirement
in pico seconds, denali_setup_data_interface() computes the register
values by dividing the device timings with the clock period.

Marek Vasut reported this driver in the latest kernel does not work
on his SOCFPGA board. (The on-board NAND chip is mode 5)

The suspicious parameter is acc_clks, so this commit relaxes it.

The Denali NAND Flash Memory Controller User's Guide describes this
register as follows:

  acc_clks
    signifies the number of bus interface clk_x clock cycles,
    controller should wait from read enable going low to sending
    out a strobe of clk_x for capturing of incoming data.

Currently, acc_clks is calculated only based on tREA, the delay on the
chip side. This does not include additional delays that come from the
data path on the PCB and in the SoC, load capacity of the pins, etc.

This relatively becomes a big factor on faster timing modes like mode 5.

Before supporting the ->setup_data_interface() hook (e.g. Linux 4.12),
the Denali driver hacks acc_clks in a couple of ways [1] [2] to support
the timing mode 5.

We would not go back to the hard-coded acc_clks, but we need to include
this factor into the delay somehow. Let's say the amount of the additional
delay is 10000 pico sec.

In the new calculation, acc_clks is determined by timings->tREA_max +
data_setup_on_host.

Also, prolong the RE# low period to make sure the data hold is met.

Finally, re-center the data latch timing for extra safety.

[1] https://github.com/torvalds/linux/blob/v4.12/drivers/mtd/nand/denali.c#L276
[2] https://github.com/torvalds/linux/blob/v4.12/drivers/mtd/nand/denali.c#L282

Reported-by: Marek Vasut <marex@denx.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200317071821.9916-1-yamada.masahiro@socionext.com
2020-05-10 21:18:46 +02:00
Boris Brezillon ce446b4b2d mtd: rawnand: Take check_only into account
->exec_op() is passed a check_only argument that encodes when the
controller should just check whether the operation is supported or not
without executing it. Some controllers simply ignore this arguments,
others don't but keep modifying some of the registers before returning.
Let's fix all those drivers.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200418194217.1016060-1-boris.brezillon@collabora.com
2020-05-10 21:16:01 +02:00
YueHaibing 4ba246d7a3 mtd: rawnand: brcmnand: Remove unused including <linux/version.h>
Remove including <linux/version.h> that don't need it.

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-by: Kamal Dasu <kdasu.kdev@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200417101129.35556-1-yuehaibing@huawei.com
2020-05-10 21:15:58 +02:00
YueHaibing fb0f6f331e mtd: rawnand: cadence: Make cadence_nand_attach_chip static
Fix sparse warning:

drivers/mtd/nand/raw/cadence-nand-controller.c:2595:5:
 warning: symbol 'cadence_nand_attach_chip' was not declared. Should it be static?

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200410115228.30440-1-yuehaibing@huawei.com
2020-05-10 21:15:56 +02:00
YueHaibing 73ab61552e mtd: rawnand: ingenic: Make qi_lb60_ooblayout_ops static
Fix sparse warning:

drivers/mtd/nand/raw/ingenic/ingenic_nand_drv.c:105:32:
 warning: symbol 'qi_lb60_ooblayout_ops' was not declared. Should it be static?

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Acked-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200410115121.11852-1-yuehaibing@huawei.com
2020-05-10 21:15:54 +02:00
Fenghua Yu 7c26e6ef96 mtd: rawnand: fsmc: Change to non-atomic bit operations
No need to use expensive atomic change_bit() on dat[] and err_idx[]:
1. fsmc_bch8_correct_data() is called while mutex chip->lock is held
2. err_idx[] is a local variable.

To avoid big endian concern due to type cast to unsigned long, directly
change the bit in the specified byte instead of using non-atomic
__change_bit().

Suggested-by: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/1576886755-9788-1-git-send-email-fenghua.yu@intel.com
2020-05-10 21:15:52 +02:00
Christoph Hellwig 1cd925d583 bdi: remove the name field in struct backing_dev_info
The name is only printed for a not registered bdi in writeback.  Use the
device name there as is more useful anyway for the unlike case that the
warning triggers.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Jan Kara <jack@suse.cz>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Bart Van Assche <bvanassche@acm.org>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
2020-05-09 16:15:13 -06:00
Christoph Hellwig aef33c2ff8 bdi: simplify bdi_alloc
Merge the _node vs normal version and drop the superflous gfp_t argument.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Jan Kara <jack@suse.cz>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Bart Van Assche <bvanassche@acm.org>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
2020-05-09 16:15:13 -06:00
Jean-Philippe Brucker b359ed5184 mtd: cfi_cmdset_0001: Support the absence of protection registers
The flash controller implemented by the Arm Base platform behaves like
the Intel StrataFlash J3 device, but omits several features. In
particular it doesn't implement a protection register, so "Number of
Protection register fields" in the Primary Vendor-Specific Extended
Query, is 0.

The Intel StrataFlash J3 datasheet only lists 1 as a valid value for
NumProtectionFields. It describes the field as:

	"Number of Protection register fields in JEDEC ID space.
	“00h,” indicates that 256 protection bytes are available"

While a value of 0 may arguably not be architecturally valid, the
driver's current behavior is certainly wrong: if NumProtectionFields is
0, read_pri_intelext() adds a negative value to the unsigned extra_size,
and ends up in an infinite loop.

Fix it by ignoring a NumProtectionFields of 0.

Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Tested-by: Sudeep Holla <sudeep.holla@arm.com>
Tested-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-04-30 23:42:57 +05:30
Tudor Ambarus b846915963
mtd: spi-nor: Fix description of the sr_ready() return value
The functions return 1 if ready, 0 if not ready, -errno on errors.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-04-29 09:03:20 +03:00
Tudor Ambarus 8aadd77cd2
mtd: spi-nor: Uniformize the return value in spi_nor_*_ready()
spi_nor_ready() returns 1 if ready, 0 if not ready and -errno on errors.
Do the same in all the spi_nor_*_ready() children.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-04-29 09:03:20 +03:00
Jungseung Lee f80ff13135
mtd: spi-nor: micron-st: Enable locking for n25q00
n25q00 uses the 4 bit Block Protection scheme and supports Top/Bottom
protection via the BP and TB bits of the Status Register.
Enable locking for n25q00. Tested with cirrus controller.

Signed-off-by: Jungseung Lee <js07.lee@samsung.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-04-29 09:03:12 +03:00
Mason Yang 9f09e37d15
mtd: spi-nor: macronix: Add support for mx25u51245g
mx25u51245g is a mass production for new design and
replace mx66u51235f(phase out).

Validated by read, erase, read back, write and read back
on Xilinx Zynq PicoZed FPGA board which included
Macronix SPI Host (driver/spi/spi-mxic.c).

Signed-off-by: Mason Yang <masonccyang@mxic.com.tw>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-04-28 10:21:38 +03:00
Mason Yang 04b8edad26
mtd: spi-nor: macronix: Add support for mx25l51245g
mx25l51245g is a mass production for new design and
replace mx66l51235l(phase out).

Validated by read, erase, read back, write and read back
on Xilinx Zynq PicoZed FPGA board which included
Macronix SPI Host (driver/spi/spi-mxic.c).

Signed-off-by: Mason Yang <masonccyang@mxic.com.tw>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-04-28 10:02:15 +03:00
Sergei Shtylyov f4363e64c2
mtd: spi-nor: core: fix kernel-doc typo for spi_nor_[{info|sfdp}_]init_params()
When spi_nor_info_init_params(), spi_nor_sfdp_init_params(), and
spi_nor_init_params() were added, the kernel-doc for them contained
a typo: 'struct spi-nor' instead of 'struct spi_nor' -- fix them.

Fixes: 1c1d8d98e1 ("mtd: spi-nor: Split spi_nor_init_params()")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-04-28 09:58:46 +03:00
Sergei Shtylyov d207b0b355
mtd: spi-nor: core: fix kernel-doc typo for spi_nor_manufacturer_init_params()
When spi_nor_manufacturer_init_params() was added, the kernel-doc for it
contained a typo: 'struct spi-nor' instead of 'struct spi_nor' -- fix it.

Fixes: ce0b6f3f3c ("mtd: spi-nor: Add default_init() hook to tweak flash parameters")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-04-28 09:58:31 +03:00
Xiang Chen 150ccc1815
mtd: spi-nor: Enable locking for n25q128a11
As 4bit block protection patchset for some micron models are merged,
n25q128a11 also uses 4 bit Block Protection scheme, so enable locking
for it. Tested it on n25q128a11, the locking functions work well.

Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Reviewed-by: Jungseung Lee <js07.lee@samsung.com>
Tested-by: Shreyas Joshi <shreyasjoshi15@gmail.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-04-21 08:54:08 +03:00
Takahiro Kuwano 954fd81ce8
mtd: spi-nor: spansion: Enable dual and quad read for s25fl256s0
The s25fl256s0 supports dual and quad read like s25fl256s1.
Enable it by adding SPI_NOR_DUAL_READ and SPI_NOR_QUAD_READ
flags to the flash_info entry. Tested with the device and
confirmed that is working.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@cypress.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-04-20 14:44:41 +03:00
Guenter Roeck 2098c56470 mtd: spi-nor: Compile files in controllers/ directory
Commit a0900d0195 ("mtd: spi-nor: Prepare core / manufacturer code
split") moved various files into a new directory, but did not add the new
directory to its parent directory Makefile. The moved files no longer
build, and affected flash chips no longer instantiate.

Adding the new directory to the parent directory Makefile fixes the
problem.

Fixes: a0900d0195 ("mtd: spi-nor: Prepare core / manufacturer code split")
Cc: Boris Brezillon <bbrezillon@kernel.org>
Cc: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
2020-04-09 22:00:13 +02:00
Linus Torvalds 763dede1b2 This pull request contains fixes for UBI and UBIFS:
- Fix for memory leaks around UBIFS orphan handling
 - Fix for memory leaks around UBI fastmap
 - Remove zero-length array from ubi-media.h
 - Fix for TNC lookup in UBIFS orphan code
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Merge tag 'for-linus-5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/ubifs

Pull UBI and UBIFS updates from Richard Weinberger:

 - Fix for memory leaks around UBIFS orphan handling

 - Fix for memory leaks around UBI fastmap

 - Remove zero-length array from ubi-media.h

 - Fix for TNC lookup in UBIFS orphan code

* tag 'for-linus-5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/ubifs:
  ubi: ubi-media.h: Replace zero-length array with flexible-array member
  ubifs: Fix out-of-bounds memory access caused by abnormal value of node_len
  ubi: fastmap: Only produce the initial anchor PEB when fastmap is used
  ubi: fastmap: Free unused fastmap anchor peb during detach
  ubifs: ubifs_add_orphan: Fix a memory leak bug
  ubifs: ubifs_jnl_write_inode: Fix a memory leak bug
  ubifs: Fix ubifs_tnc_lookup() usage in do_kill_orphans()
2020-04-07 12:40:56 -07:00
Gustavo A. R. Silva 3676f32a98 ubi: ubi-media.h: Replace zero-length array with flexible-array member
The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to declare
variable-length types such as these ones is a flexible array member[1][2],
introduced in C99:

struct foo {
        int stuff;
        struct boo array[];
};

By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertently introduced[3] to the codebase from now on.

Also, notice that, dynamic memory allocations won't be affected by
this change:

"Flexible array members have incomplete type, and so the sizeof operator
may not be applied. As a quirk of the original implementation of
zero-length arrays, sizeof evaluates to zero."[1]

This issue was found with the help of Coccinelle.

[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://github.com/KSPP/linux/issues/21
[3] commit 7649773293 ("cxgb3/l2t: Fix undefined behaviour")

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
2020-03-30 23:02:37 +02:00
Hou Tao 294a8dbe34 ubi: fastmap: Only produce the initial anchor PEB when fastmap is used
Don't produce the initial anchor PEB when ubi device is read-only
or fastmap is disabled, else the resulting PEB will be unusable
to any volume.

Signed-off-by: Hou Tao <houtao1@huawei.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
2020-03-30 23:02:36 +02:00
Hou Tao c16f39d14a ubi: fastmap: Free unused fastmap anchor peb during detach
When CONFIG_MTD_UBI_FASTMAP is enabled, fm_anchor will be assigned
a free PEB during ubi_wl_init() or ubi_update_fastmap(). However
if fastmap is not used or disabled on the MTD device, ubi_wl_entry
related with the PEB will not be freed during detach.

So Fix it by freeing the unused fastmap anchor during detach.

Fixes: f9c34bb529 ("ubi: Fix producing anchor PEBs")
Reported-by: syzbot+f317896aae32eb281a58@syzkaller.appspotmail.com
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Hou Tao <houtao1@huawei.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
2020-03-30 23:02:35 +02:00
Miquel Raynal 025a06c110 mtd: Convert fallthrough comments into statements
Use Joe Perches cvt_fallthrough.pl script to convert

	/* fallthrough */

comments (and its derivatives) into a

	fallthrough;

statement. This automatically drops useless ones.

Do it MTD-wide.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Acked-by: Richard Weinberger <richard@nod.at>
Link: https://lore.kernel.org/linux-mtd/20200325212115.14170-1-miquel.raynal@bootlin.com
2020-03-30 10:14:54 +02:00
Miquel Raynal 699274b1a1 Raw NAND core changes:
* Add support for manufacturer specific suspend/resume operation
 * Add support for manufacturer specific lock/unlock operation
 * Replace zero-length array with flexible-array member
 * Fix a typo ("manufecturer")
 * Ensure nand_soft_waitrdy wait period is enough
 
 Raw NAND controller driver changes:
 * Brcmnand:
 Add support for flash-edu for dma transfers (+ bindings)
 * Cadence:
 Reinit completion before executing a new command
 Change bad block marker size
 Fix the calculation of the avaialble OOB size
 Get meta data size from registers
 * Qualcom:
 Use dma_request_chan() instead dma_request_slave_channel()
 Release resources on failure within qcom_nandc_alloc()
 * Allwinner:
 Use dma_request_chan() instead dma_request_slave_channel()
 * Marvell:
 Use dma_request_chan() instead dma_request_slave_channel()
 Release DMA channel on error
 * Freescale:
 Use dma_request_chan() instead dma_request_slave_channel()
 * Macronix:
 Add support for Macronix NAND randomizer (+ bindings)
 * Ams-delta:
 Rename structures and functions to gpio_nand*
 Make the driver custom I/O ready
 Drop useless local variable
 Support custom driver initialisation
 Add module device tables
 Handle more GPIO pins as optional
 Make read pulses optional
 Don't hardcode read/write pulse widths
 Push inversion handling to gpiolib
 Enable OF partition info support
 Drop board specific partition info
 Use struct gpio_nand_platdata
 Write protect device during probe
 * Ingenic:
 Use devm_platform_ioremap_resource()
 Add dependency on MIPS || COMPILE_TEST
 * Denali:
 Deassert write protect pin
 * ST:
 Use dma_request_chan() instead dma_request_slave_channel()
 
 Raw NAND chip driver changes:
 * Toshiba:
 Support reading the number of bitflips for BENAND (Built-in ECC NAND)
 * Macronix:
 Add support for deep power down mode
 Add support for block protection
 
 SPI-NAND core changes:
 * Do not erase the block before writing a bad block marker
 * Explicitly use MTD_OPS_RAW to write the bad block marker to OOB
 * Stop using spinand->oobbuf for buffering bad block markers
 * Rework detect procedure for different READ_ID operation
 
 SPI-NAND driver changes:
 * Toshiba:
 Support for new Kioxia Serial NAND
 Rename function name to change suffix and prefix (8Gbit)
 Add comment about Kioxia ID
 * Micron:
 Add new Micron SPI NAND devices with multiple dies
 Add M70A series Micron SPI NAND devices
 identify SPI NAND device with Continuous Read mode
 Add new Micron SPI NAND devices
 Describe the SPI NAND device MT29F2G01ABAGD
 Generalize the OOB layout structure and function names
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Merge tag 'nand/for-5.7' into mtd/next

Raw NAND core changes:
* Add support for manufacturer specific suspend/resume operation
* Add support for manufacturer specific lock/unlock operation
* Replace zero-length array with flexible-array member
* Fix a typo ("manufecturer")
* Ensure nand_soft_waitrdy wait period is enough

Raw NAND controller driver changes:
* Brcmnand:
Add support for flash-edu for dma transfers (+ bindings)
* Cadence:
Reinit completion before executing a new command
Change bad block marker size
Fix the calculation of the avaialble OOB size
Get meta data size from registers
* Qualcom:
Use dma_request_chan() instead dma_request_slave_channel()
Release resources on failure within qcom_nandc_alloc()
* Allwinner:
Use dma_request_chan() instead dma_request_slave_channel()
* Marvell:
Use dma_request_chan() instead dma_request_slave_channel()
Release DMA channel on error
* Freescale:
Use dma_request_chan() instead dma_request_slave_channel()
* Macronix:
Add support for Macronix NAND randomizer (+ bindings)
* Ams-delta:
Rename structures and functions to gpio_nand*
Make the driver custom I/O ready
Drop useless local variable
Support custom driver initialisation
Add module device tables
Handle more GPIO pins as optional
Make read pulses optional
Don't hardcode read/write pulse widths
Push inversion handling to gpiolib
Enable OF partition info support
Drop board specific partition info
Use struct gpio_nand_platdata
Write protect device during probe
* Ingenic:
Use devm_platform_ioremap_resource()
Add dependency on MIPS || COMPILE_TEST
* Denali:
Deassert write protect pin
* ST:
Use dma_request_chan() instead dma_request_slave_channel()

Raw NAND chip driver changes:
* Toshiba:
Support reading the number of bitflips for BENAND (Built-in ECC NAND)
* Macronix:
Add support for deep power down mode
Add support for block protection

SPI-NAND core changes:
* Do not erase the block before writing a bad block marker
* Explicitly use MTD_OPS_RAW to write the bad block marker to OOB
* Stop using spinand->oobbuf for buffering bad block markers
* Rework detect procedure for different READ_ID operation

SPI-NAND driver changes:
* Toshiba:
Support for new Kioxia Serial NAND
Rename function name to change suffix and prefix (8Gbit)
Add comment about Kioxia ID
* Micron:
Add new Micron SPI NAND devices with multiple dies
Add M70A series Micron SPI NAND devices
identify SPI NAND device with Continuous Read mode
Add new Micron SPI NAND devices
Describe the SPI NAND device MT29F2G01ABAGD
Generalize the OOB layout structure and function names
2020-03-30 10:14:19 +02:00
Yoshio Furuyama fca88925d7 mtd: rawnand: toshiba: Support reading the number of bitflips for BENAND (Built-in ECC NAND)
Add support vendor specific commands for KIOXIA CORPORATION BENAND.
The actual bitflips number can be retrieved by this command.

Signed-off-by: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/1585124572-4693-1-git-send-email-ytc-mb-yfuruyama7@kioxia.com
2020-03-25 22:13:04 +01:00
Miquel Raynal 245bbe80e0 SPI NOR core changes:
- move all the manufacturer specific quirks/code out of the core,
 to make the core logic more readable and thus ease maintenance.
 - move the SFDP logic out of the core, it provides a better
 separation between the SFDP parsing and core logic.
 - trim what is exposed in spi-nor.h. The SPI NOR controllers drivers
 must not be able to use structures that are meant just for the
 SPI NOR core.
 - use the spi-mem direct mapping API to let advanced controllers
 optimize the read/write operations when they support direct mapping.
 - add generic formula for the Status Register block protection
 handling. It fixes some long standing locking limitations and eases
 the addition of the 4bit block protection support.
 - add block protection support for flashes with 4 block protection
 bits in the Status Register.
 
 SPI NOR controller drivers changes:
 - the mtk-quadspi driver is replaced by the new spi-mem
 spi-mtk-nor driver. Merge tag 'mtk-mtd-spi-move' into spi-nor/next
 to avoid conflicts.
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Merge tag 'spi-nor/for-5.7' into mtd/next

SPI NOR core changes:
- move all the manufacturer specific quirks/code out of the core,
to make the core logic more readable and thus ease maintenance.
- move the SFDP logic out of the core, it provides a better
separation between the SFDP parsing and core logic.
- trim what is exposed in spi-nor.h. The SPI NOR controllers drivers
must not be able to use structures that are meant just for the
SPI NOR core.
- use the spi-mem direct mapping API to let advanced controllers
optimize the read/write operations when they support direct mapping.
- add generic formula for the Status Register block protection
handling. It fixes some long standing locking limitations and eases
the addition of the 4bit block protection support.
- add block protection support for flashes with 4 block protection
bits in the Status Register.

SPI NOR controller drivers changes:
- the mtk-quadspi driver is replaced by the new spi-mem
spi-mtk-nor driver. Merge tag 'mtk-mtd-spi-move' into spi-nor/next
to avoid conflicts.
2020-03-25 22:12:02 +01:00
Miquel Raynal 176538d9a4 HyperBus changes
* Print err msg when compatible is wrong or missing
 * Move mapping of direct access window from core to individual drivers
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Merge tag 'cfi/for-5.7' into mtd/next

HyperBus changes

* Print err msg when compatible is wrong or missing
* Move mapping of direct access window from core to individual drivers
2020-03-25 22:10:39 +01:00
Xiaoming Ni 4e4a9a828a mtd: Fix issue where write_cached_data() fails but write() still returns success
The following sequence is problematic:

mtdblock_flush()
    -->write_cached_data()
        --->erase_write()
        mtdblock: erase of region [0x40000, 0x20000] on "xxx" failed

Problem is: mtdblock_flush() always returns 0. Indeed, even if
write_cached_data() fails and data is not written to the device,
syscall_write() still returns success. Avoid this situation by
actually returning the error coming out of write_cached_data().

Signed-off-by: Xiaoming Ni <nixiaoming@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/1584674111-101462-1-git-send-email-nixiaoming@huawei.com
2020-03-24 23:02:30 +01:00
Gustavo A. R. Silva f1ffdbfad0 mtd: maps: sa1100-flash: Replace zero-length array with flexible-array member
The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to declare
variable-length types such as these ones is a flexible array member[1][2],
introduced in C99:

struct foo {
        int stuff;
        struct boo array[];
};

By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertently introduced[3] to the codebase from now on.

Also, notice that, dynamic memory allocations won't be affected by
this change:

"Flexible array members have incomplete type, and so the sizeof operator
may not be applied. As a quirk of the original implementation of
zero-length arrays, sizeof evaluates to zero."[1]

This issue was found with the help of Coccinelle.

[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://github.com/KSPP/linux/issues/21
[3] commit 7649773293 ("cxgb3/l2t: Fix undefined behaviour")

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200319224200.GA25162@embeddedor.com
2020-03-24 23:02:30 +01:00
Wen Yang 49c64df880 mtd: phram: fix a double free issue in error path
The variable 'name' is released multiple times in the error path,
which may cause double free issues.
This problem is avoided by adding a goto label to release the memory
uniformly. And this change also makes the code a bit more cleaner.

Fixes: 4f678a58d3 ("mtd: fix memory leaks in phram_setup")
Signed-off-by: Wen Yang <wenyang@linux.alibaba.com>
Cc: Joern Engel <joern@lazybastard.org>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: linux-mtd@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200318153156.25612-1-wenyang@linux.alibaba.com
2020-03-24 23:01:36 +01:00
Yoshio Furuyama 798fcdd010 mtd: spinand: toshiba: Support for new Kioxia Serial NAND
Add support for new Kioxia products.
The new Kioxia products support program load x4 command, and have
HOLD_D bit which is equivalent to QE bit.

Signed-off-by: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/aa69e455beedc5ce0d7141359b9364ed8aec9e65.1584949601.git.ytc-mb-yfuruyama7@kioxia.com
2020-03-24 22:51:22 +01:00
Yoshio Furuyama 6b49e58d6d mtd: spinand: toshiba: Rename function name to change suffix and prefix (8Gbit)
The suffix was changed from "G" to "J" to classify between 1st generation
and 2nd generation serial NAND devices (which now belong to the Kioxia
brand).
As reference that's
1st generation device of 1Gbit product is "TC58CVG0S3HRAIG"
2nd generation device of 1Gbit product is "TC58CVG0S3HRAIJ".

The 8Gbit type "TH58CxG3S0HRAIJ" is new to Kioxia's serial NAND lineup and
the prefix was changed from "TC58" to "TH58".

Thus the functions were renamed from tc58cxgxsx_*() to tx58cxgxsxraix_*().

Signed-off-by: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/0dedd9869569a17625822dba87878254d253ba0e.1584949601.git.ytc-mb-yfuruyama7@kioxia.com
2020-03-24 22:51:19 +01:00
Mason Yang 19301d5499 mtd: rawnand: macronix: Add support for deep power down mode
Macronix AD series support deep power down mode for a minimum
power consumption state.

Overload nand_suspend() & nand_resume() in Macronix specific code to
support deep power down mode.

Signed-off-by: Mason Yang <masonccyang@mxic.com.tw>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-03-24 22:51:01 +01:00
Mason Yang adc6162b9a mtd: rawnand: Add support for manufacturer specific suspend/resume operation
Patch nand_suspend() & nand_resume() to let manufacturers overwrite
suspend/resume operations.

Signed-off-by: Mason Yang <masonccyang@mxic.com.tw>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/1584517348-14486-2-git-send-email-masonccyang@mxic.com.tw
2020-03-24 22:44:45 +01:00
Jungseung Lee f3f2b7eb2f
mtd: spi-nor: Enable locking for n25q512ax3/n25q512a
n25q512ax3 and n25q512a use the 4 bit Block Protection scheme.
Enable locking for both. Tested on n25q512ax3. The other is modified
following the datasheet.

Signed-off-by: Jungseung Lee <js07.lee@samsung.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-24 11:47:52 +02:00
Jungseung Lee 05635c14a2
mtd: spi-nor: Add SR 4bit block protection support
Currently we are supporting block protection only for flash chips with
3 block protection bits (BP0-2) in the SR register.

Enable block protection support for flashes with 4 block protection bits
(BP0-3).

Add a flash_info flag for flashes that describe 4 block protection bits.
Add another flash_info flag for flashes in which BP3 bit is not adjacent
to the BP0-2 bits.

Tested with a n25q512ax3 (BP0-3) and w25q128 (BP0-2).

Signed-off-by: Jungseung Lee <js07.lee@samsung.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Tested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-24 11:47:42 +02:00
Jungseung Lee 2d284768b4
mtd: spi-nor: Add generic formula for SR block protection handling
The current mainline locking was restricted and could only be applied
to flashes that have 3 block protection bits and fixed locking ratio.

A new method of normalization was reached at the end of the discussion [1].

    (1) - if bp slot is insufficient.
    (2) - if bp slot is sufficient.

    if (bp_slots_needed > bp_slots)    // (1)
        min_prot_length = sector_size << (bp_slots_needed - bp_slots);
    else                               // (2)
        min_prot_length = sector_size;

This patch changes logic to handle block protection based on min_prot_length.
It is suitable for the overall flashes with exception of some corner cases
(see EON and catalyst) and easy to extend and apply for the case of 2bit or
4bit block protection.

[1] http://lists.infradead.org/pipermail/linux-mtd/2020-February/093934.html

Signed-off-by: Jungseung Lee <js07.lee@samsung.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Tested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-24 11:43:28 +02:00
Tudor Ambarus b0e2d252f9
mtd: spi-nor: Set all BP bits to one when lock_len == mtd->size
When there are more BP settings than needed for defining the protected
areas of the flash memory, most flashes will define the remaining
settings as "protect all", i.e. the equivalent of having all the BP bits
set to one. But there are flashes where the in-between BP values
are undefined (not mentioned), and only the "all bits set" is protecting
the entire memory. One such example is w25q80, where BP[2:0]=0b101 and
0b110 are not defined.

Set all the BP bits to one when lock_len == mtd->size, to treat this
special case.

Suggested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Jungseung Lee <js07.lee@samsung.com>
Reviewed-by: Michael Walle <michael@walle.cc>
2020-03-24 07:44:00 +02:00
Gustavo A. R. Silva 5bb783cc92
mtd: spi-nor: controllers: aspeed-smc: Replace zero-length array with flexible-array member
The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to declare
variable-length types such as these ones is a flexible array member[1][2],
introduced in C99:

struct foo {
        int stuff;
        struct boo array[];
};

By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertently introduced[3] to the codebase from now on.

Also, notice that, dynamic memory allocations won't be affected by
this change:

"Flexible array members have incomplete type, and so the sizeof operator
may not be applied. As a quirk of the original implementation of
zero-length arrays, sizeof evaluates to zero."[1]

This issue was found with the help of Coccinelle.

[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://github.com/KSPP/linux/issues/21
[3] commit 7649773293 ("cxgb3/l2t: Fix undefined behaviour")

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-23 20:01:15 +02:00
Tudor Ambarus e0fe5339d4
mtd: spi-nor: Clear WEL bit when erase or program errors occur
When an Erase or Program error occurs on a spansion/cypress or a
micron flash, the WEL bit remains set to one and should be cleared
with a WRDI command in order to protect against inadvertent writes
that can possible corrupt the contents of the memory.

Winbond, macronix, gd, etc., do not support the E_ERR and P_ERR bits in the
Status Register and always clear the WEL bit regardless of the outcome
of the erase or page program operation (ex w25q40bw, MX25L25635E).

Issue a WRDI command when erase or page program errors occur.

Reported-by: John Garry <john.garry@huawei.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tested-by: John Garry <john.garry@huawei.com>
2020-03-23 19:50:40 +02:00
Tudor Ambarus 829ec6408d
mtd: spi-nor: Trim what is exposed in spi-nor.h
The SPI NOR controllers drivers must not be able to use structures that
are meant just for the SPI NOR core.

struct spi_nor_flash_parameter is filled at run-time with info gathered
from flash_info, manufacturer and sfdp data. struct spi_nor_flash_parameter
should be opaque to the SPI NOR controller drivers, make sure it is.

spi_nor_option_flags, spi_nor_read_command, spi_nor_pp_command,
spi_nor_read_command_index and spi_nor_pp_command_index are defined for the
core use, make sure they are opaque to the SPI NOR controller drivers.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-17 09:28:07 +02:00
Tudor Ambarus d3c4bb31bf
mtd: spi-nor: Drop the MFR definitions
Cross manufacturer code is unlikely and discouraged, get rid of the
MFR definitions.

Suggested-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
2020-03-17 09:28:06 +02:00
Boris Brezillon c4fdfdc140
mtd: spi-nor: Get rid of the now empty spi_nor_ids[] table
All entries have been moved to manufacturer drivers. Get rid of this
empty table.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-17 09:28:06 +02:00
Boris Brezillon a674d5a6c8
mtd: spi-nor: Move XMC bits out of core.c
Create a SPI NOR manufacturer driver for XMC chips, and move the
XMC definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:06 +02:00
Boris Brezillon 2d47cac1ee
mtd: spi-nor: Move Xilinx bits out of core.c
Create a SPI NOR manufacturer driver for Xilinx chips, and move the
Xilinx definitions outside of core.c.

While at it, remove the SPI_S3AN flag which is now useless.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:06 +02:00
Boris Brezillon d825925726
mtd: spi-nor: Move Catalyst bits out of core.c
Create a SPI NOR manufacturer driver for Catalyst chips, and move the
Catalyst definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:05 +02:00
Boris Brezillon 7b8b22010a
mtd: spi-nor: Move Winbond bits out of core.c
Create a SPI NOR manufacturer driver for Winbond chips, and move the
Winbond definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:05 +02:00
Boris Brezillon c53b3f92b4
mtd: spi-nor: Move SST bits out of core.c
Create a SPI NOR manufacturer driver for SST chips, and move the
SST definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:05 +02:00
Boris Brezillon 0173c32a0e
mtd: spi-nor: Move Spansion bits out of core.c
Create a SPI NOR manufacturer driver for Spansion chips, and move the
Spansion definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:05 +02:00
Boris Brezillon 15f5c7e54e
mtd: spi-nor: Move Micron/ST bits out of core.c
Create a SPI NOR manufacturer driver for Micron/ST chips, and move the
Micron/ST definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:04 +02:00
Boris Brezillon 10526d85e4
mtd: spi-nor: Move Macronix bits out of core.c
Create a SPI NOR manufacturer driver for Macronix chips, and move the
Macronix definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tested-by: Xiang Chen <chenxiang66@hisilicon.com>
2020-03-17 09:28:04 +02:00
Boris Brezillon 0a37198183
mtd: spi-nor: Move ISSI bits out of core.c
Create a SPI NOR manufacturer driver for ISSI chips, and move the
ISSI definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:04 +02:00
Boris Brezillon aa6351877f
mtd: spi-nor: Move Intel bits out of core.c
Create a SPI NOR manufacturer driver for Intel chips, and move the
Intel definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-03-17 09:28:03 +02:00
Boris Brezillon acb96ecd59
mtd: spi-nor: Move GigaDevice bits out of core.c
Create a SPI NOR manufacturer driver for GigaDevice chips, and move the
GigaDevice definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:03 +02:00
Boris Brezillon 893218a8e8
mtd: spi-nor: Move Fujitsu bits out of core.c
Create a SPI NOR manufacturer driver for Fujitsu chips, and move the
Fujitsu definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:03 +02:00
Boris Brezillon 7bdbd1ceb3
mtd: spi-nor: Move Everspin bits out of core.c
Create a SPI NOR manufacturer driver for Everspin chips, and move the
Everspin definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:03 +02:00
Boris Brezillon 74c7e0e3b9
mtd: spi-nor: Move ESMT bits out of core.c
Create a SPI NOR manufacturer driver for ESMT chips, and move the
ESMT definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:02 +02:00
Boris Brezillon d22a3be613
mtd: spi-nor: Move Eon bits out of core.c
Create a SPI NOR manufacturer driver for Eon chips, and move the
Eon definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:02 +02:00
Boris Brezillon f7242bfc02
mtd: spi-nor: Move Atmel bits out of core.c
Create a SPI NOR manufacturer driver for Atmel chips, and move the
Atmel definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:02 +02:00
Boris Brezillon 9ec4bbcb20
mtd: spi-nor: Add the concept of SPI NOR manufacturer driver
Declare a spi_nor_manufacturer struct and add basic building blocks to
move manufacturer specific code outside of the core.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-17 09:28:02 +02:00
Boris Brezillon 4f50e102e2
mtd: spi-nor: Expose stuctures and functions to manufacturer drivers
Expose the flash_info struct and some function prototypes that
will be used by manufacturers.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-17 09:26:56 +02:00
Tudor Ambarus cb481b92d1
mtd: spi-nor: Move SFDP logic out of the core
It makes the core file a bit smaller and provides better separation
between the SFDP parsing and core logic.

Keep the core.h and sfdp.h definitions private in drivers/mtd/spi-nor/.
Both expose just the definitions that are required by the core and
manufacturer drivers. None of the SPI NOR controller drivers should
include them.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-16 18:28:53 +02:00
Boris Brezillon a0900d0195
mtd: spi-nor: Prepare core / manufacturer code split
Move all SPI NOR controller drivers to a controllers/ sub-directory
so that we only have SPI NOR related source files under
drivers/mtd/spi-nor/.

Rename spi-nor.c into core.c, we are about to split this file in multiple
source files (one per manufacturer, plus one for the SFDP parsing logic).

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-16 18:28:53 +02:00
Tudor Ambarus 81924dae51
mtd: spi-nor: Emphasise which is the generic set_4byte_addr_mode() method
Rename (*set_4byte)() to (*set_4byte_addr_mode)() for a better
differentiation between the 4 byte address mode and opcodes.

Rename macronix_set_4byte() to spi_nor_set_4byte_addr_mode(), it will be
the only 4 byte address mode method exposed to the manufacturer drivers.

Here's how the manufacturers enter and exit the 4 byte address mode:
- eon, gidadevice, issi, macronix, xmc use EN4B/EX4B
- micron-st needs WEN. st_micron_set_4byte_addr_mode() will become
  a private method, as they are the only ones that need WEN before the
  EN4B/EX4B commands.
- newer spansion have a 4BAM opcode (this translates to a new, public
  command). Older spansion  flashes use the BRWR command (legacy in
  core.c -> spansion_set_4byte_addr_mode())
- winbond's method is hackish and may be reason for just a flash
  fixup hook -> private method

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-16 18:28:52 +02:00
Boris Brezillon 7648a720d9
mtd: spi-nor: Stop prefixing generic functions with a manufacturer name
Replace the manufacturer prefix by something describing more precisely
what those functions do.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
[tudor.ambarus@microchip.com: prepend spi_nor_ to all modified methods.]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-16 18:28:52 +02:00
Tudor Ambarus 69228a0224 spi: Rewrite mtk-quadspi spi-nor driver with spi-mem
This patchset from Chuanhong Guo <gch981213@gmail.com> adds a spi-mem
 driver for Mediatek SPI-NOR controller, which already has limited
 support by mtk-quadspi. This new driver can make use of full quadspi
 capability of this controller.
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Merge tag 'mtk-mtd-spi-move' into spi-nor/next

spi: Rewrite mtk-quadspi spi-nor driver with spi-mem

This patchset from Chuanhong Guo <gch981213@gmail.com> adds a spi-mem
driver for Mediatek SPI-NOR controller, which already has limited
support by mtk-quadspi. This new driver can make use of full quadspi
capability of this controller.

The mtk-quadspi driver is replaced by the new spi-mtk-nor driver.
Merge it in spi-nor/next to avoid conflicts during the release cycle.
2020-03-13 17:34:13 +02:00
Shivamurthy Shastri 9f9ae0c253 mtd: spinand: micron: Add new Micron SPI NAND devices with multiple dies
Add device table for new Micron SPI NAND devices, which have multiple
dies.

Also, enable support to select the dies.

Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200311175735.2007-7-sshivamurthy@micron.com
2020-03-12 13:33:36 +01:00
Shivamurthy Shastri a7e5daccc3 mtd: spinand: micron: Add M70A series Micron SPI NAND devices
Add device table for M70A series Micron SPI NAND devices.

Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200311175735.2007-6-sshivamurthy@micron.com
2020-03-12 13:33:34 +01:00
Shivamurthy Shastri 0bc68af913 mtd: spinand: micron: identify SPI NAND device with Continuous Read mode
Add SPINAND_HAS_CR_FEAT_BIT flag to identify the SPI NAND device with
the Continuous Read mode.

Some of the Micron SPI NAND devices have the "Continuous Read" feature
enabled by default, which does not fit the subsystem needs.

In this mode, the READ CACHE command doesn't require the starting column
address. The device always output the data starting from the first
column of the cache register, and once the end of the cache register
reached, the data output continues through the next page. With the
continuous read mode, it is possible to read out the entire block using
a single READ command, and once the end of the block reached, the output
pins become High-Z state. However, during this mode the read command
doesn't output the OOB area.

Hence, we disable the feature at probe time.

Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200311175735.2007-5-sshivamurthy@micron.com
2020-03-12 13:33:32 +01:00
Shivamurthy Shastri a15335a17f mtd: spinand: micron: Add new Micron SPI NAND devices
Add device table for M79A and M78A series Micron SPI NAND devices.

Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200311175735.2007-4-sshivamurthy@micron.com
2020-03-12 13:33:30 +01:00
Shivamurthy Shastri 8511a3a993 mtd: spinand: micron: Describe the SPI NAND device MT29F2G01ABAGD
Add the SPI NAND device MT29F2G01ABAGD series number, size and voltage
details as a comment.

Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200311175735.2007-3-sshivamurthy@micron.com
2020-03-12 13:33:28 +01:00
Shivamurthy Shastri d313704344 mtd: spinand: micron: Generalize the OOB layout structure and function names
In order to add new Micron SPI NAND devices, we generalized the OOB
layout structure and function names.

Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200311175735.2007-2-sshivamurthy@micron.com
2020-03-12 13:33:26 +01:00
Chuanhong Guo e11e8473bc
mtd: spi-nor: remove mtk-quadspi driver
This driver is superseded by the new spi-mtk-nor driver.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Acked-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200306085052.28258-5-gch981213@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-03-11 19:56:08 +00:00
Kamal Dasu a5d53ad26a mtd: rawnand: brcmnand: Add support for flash-edu for dma transfers
Legacy mips soc platforms that have controller v5.0 and 6.0 use
flash-edu block for dma transfers. This change adds support for
nand dma transfers using the EDU block.

Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200122213313.35820-4-kdasu.kdev@gmail.com
2020-03-11 16:21:38 +01:00
Piotr Sroka 0d7d6c8183 mtd: rawnand: cadence: reinit completion before executing a new command
Reing the completion object before executing CDMA command to make sure
the 'done' flag is OK.

Fixes: ec4ba01e89 ("mtd: rawnand: Add new Cadence NAND driver to MTD subsystem")
Cc: stable@vger.kernel.org
Signed-off-by: Piotr Sroka <piotrs@cadence.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/1581328530-29966-4-git-send-email-piotrs@cadence.com
2020-03-11 16:17:55 +01:00
Piotr Sroka 9bf1903bed mtd: rawnand: cadence: change bad block marker size
Increase bad block marker size from one byte to two bytes.
Bad block marker is handled by skip bytes feature of HPNFC.
Controller expects this value to be an even number.

Fixes: ec4ba01e89 ("mtd: rawnand: Add new Cadence NAND driver to MTD subsystem")
Cc: stable@vger.kernel.org
Signed-off-by: Piotr Sroka <piotrs@cadence.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/1581328530-29966-3-git-send-email-piotrs@cadence.com
2020-03-11 16:17:55 +01:00
Piotr Sroka e4578af035 mtd: rawnand: cadence: fix the calculation of the avaialble OOB size
The value of cdns_chip->sector_count is not known at the moment
of the derivation of ecc_size, leading to a zero value. Fix
this by assigning ecc_size later in the code.

Fixes: ec4ba01e89 ("mtd: rawnand: Add new Cadence NAND driver to MTD subsystem")
Cc: stable@vger.kernel.org
Signed-off-by: Piotr Sroka <piotrs@cadence.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/1581328530-29966-2-git-send-email-piotrs@cadence.com
2020-03-11 16:17:55 +01:00
Piotr Sroka 397deafc02 mtd: rawnand: cadence: get meta data size from registers
Add checking size of BCH meta data size in capabilities registers
instead of using fixed value. BCH meta data is used to keep data
from NAND flash OOB area.

Signed-off-by: Piotr Sroka <piotrs@cadence.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/1581328530-29966-1-git-send-email-piotrs@cadence.com
2020-03-11 16:17:55 +01:00
Mason Yang 03a539c7a1 mtd: rawnand: Macronix: Add support for block protection
Macronix AC/AD series support using SET_FEATURES to change block
protection and unprotection. Block protection support can be checked
with GET_FEATURES.

Signed-off-by: Mason Yang <masonccyang@mxic.com.tw>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/1583220084-10890-3-git-send-email-masonccyang@mxic.com.tw
2020-03-11 16:17:55 +01:00
Mason Yang 92270086b7 mtd: rawnand: Add support for manufacturer specific lock/unlock operation
Add nand_lock() & nand_unlock() for manufacturer specific lock & unlock
operation while the device supports Block Portection function.

Signed-off-by: Mason Yang <masonccyang@mxic.com.tw>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/1583220084-10890-2-git-send-email-masonccyang@mxic.com.tw
2020-03-11 16:17:55 +01:00
Paul Cercueil e015d72f32 mtd: rawnand: ingenic: Add dependency on MIPS || COMPILE_TEST
This driver has no arch-specific instructions but is only ever useful
on MIPS; so disable this driver if we're not compiling for MIPS, unless
the driver is compile-tested.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200302184509.10666-1-paul@crapouillou.net
2020-03-11 16:17:55 +01:00
Peter Ujfalusi b35f79aa46 mtd: rawnand: stm32_fmc2: Use dma_request_chan() instead dma_request_slave_channel()
dma_request_slave_channel() is a wrapper on top of dma_request_chan()
eating up the error code.

Use using dma_request_chan() directly and inform user of error in case the
DMA request failed.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200227123749.24064-8-peter.ujfalusi@ti.com
2020-03-11 16:17:54 +01:00
Peter Ujfalusi 92f0f8efbd mtd: rawnand: qcom: Use dma_request_chan() instead dma_request_slave_channel()
dma_request_slave_channel() is a wrapper on top of dma_request_chan()
eating up the error code.

Use using dma_request_chan() directly to return the real error code.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200227123749.24064-7-peter.ujfalusi@ti.com
2020-03-11 16:17:54 +01:00
Peter Ujfalusi 80c3012e12 mtd: rawnand: qcom: Release resources on failure within qcom_nandc_alloc()
In case when DMA channel request or alloc_bam_transaction() fails,
dma_unmap_single() and any channels already requested should be released.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200227123749.24064-6-peter.ujfalusi@ti.com
2020-03-11 16:17:54 +01:00
Peter Ujfalusi ac80c55b46 mtd: rawnand: sunxi: Use dma_request_chan() instead dma_request_slave_channel()
dma_request_slave_channel() is a wrapper on top of dma_request_chan()
eating up the error code.

By using dma_request_chan() directly the driver can support deferred
probing against DMA.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200227123749.24064-5-peter.ujfalusi@ti.com
2020-03-11 16:17:54 +01:00
Peter Ujfalusi cf9e238948 mtd: rawnand: marvell: Use dma_request_chan() instead dma_request_slave_channel()
dma_request_slave_channel() is a wrapper on top of dma_request_chan()
eating up the error code.

Use using dma_request_chan() directly to return the real error code.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200227123749.24064-4-peter.ujfalusi@ti.com
2020-03-11 16:17:54 +01:00
Peter Ujfalusi aafe30baf4 mtd: rawnand: marvell: Release DMA channel on error
Release the DMA channel on errors after the channel has been successfully
requested.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200227123749.24064-3-peter.ujfalusi@ti.com
2020-03-11 16:17:54 +01:00
Peter Ujfalusi 7cd8c0adb4 mtd: rawnand: gpmi: Use dma_request_chan() instead dma_request_slave_channel()
dma_request_slave_channel() is a wrapper on top of dma_request_chan()
eating up the error code.

Use using dma_request_chan() directly to return the real error code.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200227123749.24064-2-peter.ujfalusi@ti.com
2020-03-11 16:17:54 +01:00
Gustavo A. R. Silva 49f1c33076 mtd: rawnand: Replace zero-length array with flexible-array member
The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to declare
variable-length types such as these ones is a flexible array member[1][2],
introduced in C99:

struct foo {
        int stuff;
        struct boo array[];
};

By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertently introduced[3] to the codebase from now on.

Also, notice that, dynamic memory allocations won't be affected by
this change:

"Flexible array members have incomplete type, and so the sizeof operator
may not be applied. As a quirk of the original implementation of
zero-length arrays, sizeof evaluates to zero."[1]

This issue was found with the help of Coccinelle.

[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://github.com/KSPP/linux/issues/21
[3] commit 7649773293 ("cxgb3/l2t: Fix undefined behaviour")

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200226222722.GA18020@embeddedor
2020-03-11 16:17:54 +01:00
Frieder Schrempf b645ad39d5 mtd: spinand: Do not erase the block before writing a bad block marker
Currently when marking a block, we use spinand_erase_op() to erase
the block before writing the marker to the OOB area. Doing so without
waiting for the operation to finish can lead to the marking failing
silently and no bad block marker being written to the flash.

In fact we don't need to do an erase at all before writing the BBM.
The ECC is disabled for raw accesses to the OOB data and we don't
need to work around any issues with chips reporting ECC errors as it
is known to be the case for raw NAND.

Fixes: 7529df4652 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Cc: stable@vger.kernel.org
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200218100432.32433-4-frieder.schrempf@kontron.de
2020-03-11 16:17:54 +01:00
Frieder Schrempf 621a7b780b mtd: spinand: Explicitly use MTD_OPS_RAW to write the bad block marker to OOB
When writing the bad block marker to the OOB area the access mode
should be set to MTD_OPS_RAW as it is done for reading the marker.
Currently this only works because req.mode is initialized to
MTD_OPS_PLACE_OOB (0) and spinand_write_to_cache_op() checks for
req.mode != MTD_OPS_AUTO_OOB.

Fix this by explicitly setting req.mode to MTD_OPS_RAW.

Fixes: 7529df4652 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200218100432.32433-3-frieder.schrempf@kontron.de
2020-03-11 16:17:54 +01:00
Frieder Schrempf 2148937501 mtd: spinand: Stop using spinand->oobbuf for buffering bad block markers
For reading and writing the bad block markers, spinand->oobbuf is
currently used as a buffer for the marker bytes. During the
underlying read and write operations to actually get/set the content
of the OOB area, the content of spinand->oobbuf is reused and changed
by accessing it through spinand->oobbuf and/or spinand->databuf.

This is a flaw in the original design of the SPI NAND core and at the
latest from 13c15e07ee ("mtd: spinand: Handle the case where
PROGRAM LOAD does not reset the cache") on, it results in not having
the bad block marker written at all, as the spinand->oobbuf is
cleared to 0xff after setting the marker bytes to zero.

To fix it, we now just store the two bytes for the marker on the
stack and let the read/write operations copy it from/to the page
buffer later.

Fixes: 7529df4652 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Cc: stable@vger.kernel.org
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200218100432.32433-2-frieder.schrempf@kontron.de
2020-03-11 16:17:54 +01:00
Mason Yang 8423465259 mtd: rawnand: Add support for Macronix NAND randomizer
Macronix NANDs support randomizer operation for user data scrambled,
which can be enabled with a SET_FEATURE.

User data written to the NAND device without randomizer is still readable
after randomizer function enabled.
The penalty of randomizer are subpage accesses prohibited and more time
period is needed in program operation and entering deep power-down mode.
i.e., tPROG 300us to 340us(randomizer enabled)

For more high-reliability concern, if subpage write not available with
hardware ECC and then to enable randomizer is recommended by default.
Driver checks byte 167 of Vendor Blocks in ONFI parameter page table
to see if this high-reliability function is supported. By adding a new
specific DT property in children nodes to enable randomizer function.

Signed-off-by: Mason Yang <masonccyang@mxic.com.tw>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/1581922600-25461-2-git-send-email-masonccyang@mxic.com.tw
2020-03-11 16:17:54 +01:00
Janusz Krzysztofik 16d00cd612 mtd: rawnand: ams-delta: Rename structures and functions to gpio_nand*
Another step in preparation for merging the driver with "gpio-nand".

Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200212003929.6682-15-jmkrzyszt@gmail.com
2020-03-11 16:17:53 +01:00
Janusz Krzysztofik 2b1dcee304 mtd: rawnand: ams-delta: Make the driver custom I/O ready
In order to be merged with "gpio-nand", the driver must support custom
(non-GPIO) I/O accessors.

Allow platforms to omit data GPIO port as well as NWE pin info from
device setup.  For the driver to still work on such platform, custom
I/O accessors as well as a custom probe function which initialises the
driver private structure with those accessors must be added to the
driver.

Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200212003929.6682-14-jmkrzyszt@gmail.com
2020-03-11 16:17:53 +01:00
Janusz Krzysztofik edfd8d9c76 mtd: rawnand: ams-delta: Drop useless local variable
For consistency with adjacent code patterns used in the driver probe
function, store data GPIO array pointer directly in a respective field
of the driver private structure instead of storing it intermediately
in a local variable for error checking.

Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200212003929.6682-13-jmkrzyszt@gmail.com
2020-03-11 16:17:53 +01:00
Janusz Krzysztofik d1b1a8f73a mtd: rawnand: ams-delta: Support custom driver initialisation
In preparation for extending the driver with custom I/O support, try to
obtain device specific initialisation routine from a matching device
table entry and run it as an additional step of device probe.

Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200212003929.6682-12-jmkrzyszt@gmail.com
2020-03-11 16:17:53 +01:00
Janusz Krzysztofik 7c2f66a960 mtd: rawnand: ams-delta: Add module device tables
In preparation for merging the driver with "gpio-nand", introduce
module device tables where new device models can be accommodated as
soon as respective support is added.

Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200212003929.6682-11-jmkrzyszt@gmail.com
2020-03-11 16:17:53 +01:00
Dan Carpenter 4da0ea71ea mtd: lpddr: Fix a double free in probe()
This function is only called from lpddr_probe().  We free "lpddr" both
here and in the caller, so it's a double free.  The best place to free
"lpddr" is in lpddr_probe() so let's delete this one.

Fixes: 8dc004395d ("[MTD] LPDDR qinfo probing.")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200228092554.o57igp3nqhyvf66t@kili.mountain
2020-03-11 14:49:30 +01:00
Colin Ian King 13a964665f mtd: fix spelling mistake "BlockMultiplerBits" -> "BlockMultiplierBits"
There is a spelling mistake (missing i) in pr_info messages. Fix these.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200208113612.817988-1-colin.king@canonical.com
2020-03-11 14:49:30 +01:00
Miquel Raynal 46b5889cc2 mtd: implement proper partition handling
Instead of collecting partitions in a flat list, create a hierarchy
within the mtd_info structure: use a partitions list to keep track of
the partitions of an MTD device (which might be itself a partition of
another MTD device), a pointer to the parent device (NULL when the MTD
device is the root one, not a partition).

By also saving directly in mtd_info the offset of the partition, we
can get rid of the mtd_part structure.

While at it, be consistent in the naming of the mtd_info structures to
ease the understanding of the new hierarchy: these structures are
usually called 'mtd', unless there are multiple instances of the same
structure. In this case, there is usually a parent/child bound so we
will call them 'parent' and 'child'.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200114090952.11232-1-miquel.raynal@bootlin.com
2020-03-11 14:49:30 +01:00
Janusz Krzysztofik ea5ea9fa6d mtd: rawnand: ams-delta: Handle more GPIO pins as optional
In order to make the driver more useful on platforms other than Amstrad
Delta, allow GPIO descriptor pointers of possibly non-critical NWP and
NCE pins to be initialised as NULL.

Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200212003929.6682-10-jmkrzyszt@gmail.com
2020-03-09 14:51:02 +01:00
Janusz Krzysztofik 586a746b32 mtd: rawnand: ams-delta: Make read pulses optional
Allow platforms to omit NRE pin from device configuration by requesting
that pin as optional.  In that case, also don't apply read pulse width
from chip SDR timings.  There should be no need for further code
adjustments as gpiolib can handle NULL GPIO descriptor pointers.

Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200212003929.6682-9-jmkrzyszt@gmail.com
2020-03-09 14:51:02 +01:00
Janusz Krzysztofik ccada49b05 mtd: rawnand: ams-delta: Don't hardcode read/write pulse widths
Instead of forcing Amstrad Delta specific read/write pulse widths, use
variables initialised from respective fields of chip SDR timings.

Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200212003929.6682-8-jmkrzyszt@gmail.com
2020-03-09 14:51:01 +01:00
Janusz Krzysztofik 241008ed0b mtd: rawnand: ams-delta: Push inversion handling to gpiolib
Let platforms take care of declaring correct GPIO pin polarity so we
can just ask a GPIO line to be asserted or deasserted and gpiolib deals
with the rest depending on how the platform is configured.

Inspired by similar changes to regulator drivers by Linus Walleij
<linus.walleij@linaro.org>, thanks!

Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200212003929.6682-7-jmkrzyszt@gmail.com
2020-03-09 14:51:01 +01:00
Janusz Krzysztofik 2cef3d4cf4 mtd: rawnand: ams-delta: Enable OF partition info support
Provide MTD layer with device OF node info required by OF partition
parser.

Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200212003929.6682-6-jmkrzyszt@gmail.com
2020-03-09 14:51:01 +01:00
Janusz Krzysztofik d7ffe387cc mtd: rawnand: ams-delta: Drop board specific partition info
Now as we support fetching partition info from device platform data and
the Amstrad Delta board file provides that info, drop it from the
driver code.

v2: rebase on top of gpio_nand_platdata extension

Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200212003929.6682-5-jmkrzyszt@gmail.com
2020-03-09 14:51:01 +01:00
Janusz Krzysztofik 1698ea3213 mtd: rawnand: ams-delta: Use struct gpio_nand_platdata
In order to be able to move the hardcoded Amstrad Delta partition info
from the driver code to the board file, reuse gpio_nand_platdata
structure owned by "gpio-nand" driver and try to obtain information
on device partitions from device platform data.

Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200212003929.6682-3-jmkrzyszt@gmail.com
2020-03-09 14:51:01 +01:00
Janusz Krzysztofik 91a1abfb75 mtd: rawnand: ams-delta: Write protect device during probe
Initialise NWP GPIO pin as asserted to protect the device from hazard
during setup of other GPIO pins.

Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200212003929.6682-2-jmkrzyszt@gmail.com
2020-03-09 14:51:01 +01:00
Paul Cercueil c4b7dd35d3 mtd: rawnand: ingenic: Use devm_platform_ioremap_resource()
Use devm_platform_ioremap_resource() instead of platform_get_resource()
+ devm_ioremap_resource().

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200211173151.27587-1-paul@crapouillou.net
2020-03-09 14:51:01 +01:00
Chuanhong Guo f1541773af mtd: spinand: rework detect procedure for different READ_ID operation
Currently there are 3 different variants of read_id implementation:
1. opcode only. Found in GD5FxGQ4xF.
2. opcode + 1 addr byte. Found in GD5GxGQ4xA/E
3. opcode + 1 dummy byte. Found in other currently supported chips.

Original implementation was for variant 1 and let detect function
of chips with variant 2 and 3 to ignore the first byte. This isn't
robust:

1. For chips of variant 2, if SPI master doesn't keep MOSI low
during read, chip will get a random id offset, and the entire id
buffer will shift by that offset, causing detect failure.

2. For chips of variant 1, if it happens to get a devid that equals
to manufacture id of variant 2 or 3 chips, it'll get incorrectly
detected.

This patch reworks detect procedure to address problems above. New
logic do detection for all variants separatedly, in 1-2-3 order.
Since all current detect methods do exactly the same id matching
procedure, unify them into core.c and remove detect method from
manufacture_ops.

Tested on GD5F1GQ4UAYIG and W25N01GVZEIG.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200208074439.146296-1-gch981213@gmail.com
2020-03-09 14:50:19 +01:00
Yoshio Furuyama a91f8170df mtd: spinand: toshiba: Add comment about Kioxia ID
Add a comment above NAND_MFR_TOSHIBA and SPINAND_MFR_TOSHIBA definitions
that Toshiba and Kioxia ID are the same.
Since its independence from Toshiba Group, Toshiba memory Co has become
Kioxia Co.

Signed-off-by: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/1581051561-7302-1-git-send-email-ytc-mb-yfuruyama7@kioxia.com
2020-03-09 14:49:14 +01:00
Masahiro Yamada 9afbe7c014 mtd: rawnand: denali: deassert write protect pin
If the write protect signal from this IP is connected to the NAND
device, this IP can handle the WP# pin via the WRITE_PROTECT
register.

The Denali NAND Flash Memory Controller User's Guide describes
this register like follows:

  When the controller is in reset, the WP# pin is always asserted
  to the device. Once the reset is removed, the WP# is de-asserted.
  The software will then have to come and program this bit to
  assert/de-assert the same.

    1 - Write protect de-assert
    0 - Write protect assert

The default value is 1, so the write protect is de-asserted after
the reset is removed. The driver can write to the device unless
someone has explicitly cleared register before booting the kernel.

The boot ROM of some UniPhier SoCs (LD4, Pro4, sLD8, Pro5) is the
case; the boot ROM clears the WRITE_PROTECT register when the system
is booting from the NAND device, so the NAND device becomes read-only.

Set it to 1 in the driver in order to allow the write access to the
device.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200127123934.11847-1-yamada.masahiro@socionext.com
2020-03-09 14:49:14 +01:00
Christophe Kerello 009264605c mtd: rawnand: free the nand_device object
This patch releases the resources allocated in nanddev_init function.

Fixes: a7ab085d7c ("mtd: rawnand: Initialize the nand_device object")
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/1579767768-32295-1-git-send-email-christophe.kerello@st.com
2020-03-09 14:49:14 +01:00
Martin Devera 43d8b63623 mtd: rawnand: Ensure nand_soft_waitrdy wait period is enough
The used way to compute jiffies timeout brokes when
jiffie difference is 1.
Assume that nand_soft_waitrdy is called with timeout_ms==1.
Jiffies are 1000 for example (assume something more like 1000.99
- just before incrementing to 1001).
We compute timeout_ms = 1000+msecs_to_jiffies(1) = 1001.
nand_read_data_op is called for the first time and returns 0.
During the call jiffies changes to 1001 thus "while loop" ends
here (wrongly). Notice that routine was called with expected timeout
1ms but actual timeout used was something between 0...1ms.

Fixes STM32MP1 FMC2 NAND controller which sometimes failed
exactly in this way.

Signed-off-by: Martin Devera <devik@eaxlabs.cz>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200116135431.17480-1-devik@eaxlabs.cz
2020-03-09 14:49:14 +01:00
Sergei Shtylyov b6fe8bc67d mtd: hyperbus: move direct mapping setup to AM654 HBMC driver
The Hyperbus core expects that HyperFlash is always directly mapped for
both read and write, but in reality this may not always be the case, e.g.
Renesas RPC-IF has read only direct mapping. Move the code setting up the
direct mapping from the Hyperbus core to thh TI AM554 HBMC driver.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 10:13:11 +05:30
Dirk Behme cb6176ef25 mtd: hyperbus: Add proper error message for missing compatible
In case the compatible "cypress,hyperflash" is not given
output a proper error message.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 10:12:39 +05:30
Jonathan Neuschäfer 2dcbfe365b
mtd: spi-nor: Refactor spi_nor_read_id()
- Don't use `tmp` for two purposes (return value, loop counter).
  Instead, use `i` for the loop counter, and `ret` for the return value.
- Don't use tabs between type and name in variable declarations,
  for consistency with other functions in spi-nor.c.
- Rewrite nested `if`s as `if (a && b)`.
- Remove `info` variable, and use spi_nor_ids[i] directly.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
[tudor.ambarus@microchip.com: change i's type from int to unsigned int,
reorder local variables]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-02-27 09:58:39 +02:00
Sergei Shtylyov df5c21002c
mtd: spi-nor: use spi-mem dirmap API
Make use of the spi-mem direct mapping API to let advanced controllers
optimize read/write operations when they support direct mapping.

Based on the original patch by Boris Brezillon
<boris.brezillon@bootlin.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-02-19 09:17:33 +02:00
Sergei Shtylyov b7ad6be2ee
mtd: spi-nor: split spi_nor_spimem_xfer_data()
spi_nor_spimem_xfer_data() being a helper function for the data reads/
writes contains 3 fragments that depend on the data direction; and I'm
going to add another one to call the SPI dirmap API...
I think this function should be split so that the common fragments are
put into 2 functions, spi_nor_spimem_bounce() and spi_nor_spimem_exec_op()
called from spi_nor_spimem_{read|write}_data(), and the data direction
dependent bits moved back into those read/write functions -- that way we
would be able to avoid *goto*s otherwise needed in the next patch adding
the SPI dirmap support...

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-02-19 09:17:22 +02:00
Jungseung Lee 8c79fa6c44
mtd: spi-nor: introduce SR_BP_SHIFT define
The shift variable of SR_BP is conclusive because the first bit of SR_BP
is fixed on all known flashes. Replace ffs operation with SR_BP_SHIFT.

Signed-off-by: Jungseung Lee <js07.lee@samsung.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-02-17 02:07:24 +02:00
Sergei Shtylyov 5b24efe7d5
mtd: spi-nor: use le32_to_cpu_array()
The driver calls le32_to_cpu() to convert the little-endian tables
to  a CPU endianness, where le32_to_cpus() should have been called.
Was going to use that one... and then discovered a whole array
converter, le32_to_cpu_array()! :-)

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-02-17 01:09:52 +02:00
Masahiro Yamada 45586c7078 treewide: remove redundant IS_ERR() before error code check
'PTR_ERR(p) == -E*' is a stronger condition than IS_ERR(p).
Hence, IS_ERR(p) is unneeded.

The semantic patch that generates this commit is as follows:

// <smpl>
@@
expression ptr;
constant error_code;
@@
-IS_ERR(ptr) && (PTR_ERR(ptr) == - error_code)
+PTR_ERR(ptr) == - error_code
// </smpl>

Link: http://lkml.kernel.org/r/20200106045833.1725-1-masahiroy@kernel.org
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Cc: Julia Lawall <julia.lawall@lip6.fr>
Acked-by: Stephen Boyd <sboyd@kernel.org> [drivers/clk/clk.c]
Acked-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> [GPIO]
Acked-by: Wolfram Sang <wsa@the-dreams.de> [drivers/i2c]
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> [acpi/scan.c]
Acked-by: Rob Herring <robh@kernel.org>
Cc: Eric Biggers <ebiggers@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-02-04 03:05:27 +00:00
Linus Torvalds 35c222fd32 MTD core
* block2mtd: page index should use pgoff_t
 * maps: physmap: minimal Runtime PM support
 * maps: pcmciamtd: avoid possible sleep-in-atomic-context bugs
 * concat: Fix a comment referring to an unknown symbol
 
 Raw NAND
 * Macronix: Use match_string() helper
 * Atmel: switch to using devm_fwnode_gpiod_get()
 * Denali: rework the SKIP_BYTES feature and add reset controlling
 * Brcmnand: set appropriate DMA mask
 * Cadence: add unspecified HAS_IOMEM dependency
 * Various cleanup.
 
 Onenand
 * Rename Samsung and Omap2 drivers to avoid possible build warnings
 * Enable compile testing
 * Various build issues
 * Kconfig cleanup
 
 SPI-NAND
 * Support for Toshiba TC58CVG2S0HRAIJ
 
 SPI-NOR:
 - Add support for TB selection using SR bit 6,
 - Add support for few flashes.
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Merge tag 'mtd/for-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux

Pull MTD updates from Miquel Raynal:
 "MTD core
   - block2mtd: page index should use pgoff_t
   - maps: physmap: minimal Runtime PM support
   - maps: pcmciamtd: avoid possible sleep-in-atomic-context bugs
   - concat: Fix a comment referring to an unknown symbol

  Raw NAND:
   - Macronix: Use match_string() helper
   - Atmel: switch to using devm_fwnode_gpiod_get()
   - Denali: rework the SKIP_BYTES feature and add reset controlling
   - Brcmnand: set appropriate DMA mask
   - Cadence: add unspecified HAS_IOMEM dependency
   - Various cleanup.

  Onenand:
   - Rename Samsung and Omap2 drivers to avoid possible build warnings
   - Enable compile testing
   - Various build issues
   - Kconfig cleanup

  SPI-NAND:
   - Support for Toshiba TC58CVG2S0HRAIJ

  SPI-NOR:
   - Add support for TB selection using SR bit 6,
   - Add support for few flashes"

* tag 'mtd/for-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (41 commits)
  mtd: concat: Fix a comment referring to an unknown symbol
  mtd: rawnand: add unspecified HAS_IOMEM dependency
  mtd: block2mtd: page index should use pgoff_t
  mtd: maps: physmap: Add minimal Runtime PM support
  mtd: maps: pcmciamtd: fix possible sleep-in-atomic-context bugs in pcmciamtd_set_vpp()
  mtd: onenand: Rename omap2 driver to avoid a build warning
  mtd: onenand: Use a better name for samsung driver
  mtd: rawnand: atmel: switch to using devm_fwnode_gpiod_get()
  mtd: spinand: add support for Toshiba TC58CVG2S0HRAIJ
  mtd: rawnand: macronix: Use match_string() helper to simplify the code
  mtd: sharpslpart: Fix unsigned comparison to zero
  mtd: onenand: Enable compile testing of OMAP and Samsung drivers
  mtd: onenand: samsung: Fix printing format for size_t on 64-bit
  mtd: onenand: samsung: Fix pointer cast -Wpointer-to-int-cast warnings on 64 bit
  mtd: rawnand: denali: remove hard-coded DENALI_DEFAULT_OOB_SKIP_BYTES
  mtd: rawnand: denali_dt: add reset controlling
  dt-bindings: mtd: denali_dt: document reset property
  mtd: rawnand: denali_dt: Add support for configuring SPARE_AREA_SKIP_BYTES
  mtd: rawnand: denali_dt: error out if platform has no associated data
  mtd: rawnand: brcmnand: Set appropriate DMA mask
  ...
2020-01-30 15:46:02 -08:00
Linus Torvalds e84bcd61f6 This pull request contains mostly fixes for UBI and UBIFS:
UBI:
  - Fixes for memory leaks in error paths
  - Fix for an logic error in a fastmap selfcheck
 
 UBIFS:
  - Fix for FS_IOC_SETFLAGS related to fscrypt flag
  - Support for FS_ENCRYPT_FL
  - Fix for a dead lock in bulk-read mode
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Merge tag 'upstream-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/ubifs

Pull UBI/UBIFS updates from Miquel Raynal:
 "This pull request contains mostly fixes for UBI and UBIFS:

  UBI:
   - Fixes for memory leaks in error paths
   - Fix for an logic error in a fastmap selfcheck

  UBIFS:
   - Fix for FS_IOC_SETFLAGS related to fscrypt flag
   - Support for FS_ENCRYPT_FL
   - Fix for a dead lock in bulk-read mode"

Sent on behalf of Richard Weinberger who is traveling.

* tag 'upstream-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/ubifs:
  ubi: Fix an error pointer dereference in error handling code
  ubifs: Fix memory leak from c->sup_node
  ubifs: Fix ino_t format warnings in orphan_delete()
  ubifs: Fix deadlock in concurrent bulk-read and writepage
  ubifs: Fix wrong memory allocation
  ubi: Free the normal volumes in error paths of ubi_attach_mtd_dev()
  ubi: Check the presence of volume before call ubi_fastmap_destroy_checkmap()
  ubifs: Add support for FS_ENCRYPT_FL
  ubifs: Fix FS_IOC_SETFLAGS unexpectedly clearing encrypt flag
  ubi: wl: Remove set but not used variable 'prev_e'
  ubi: fastmap: Fix inverted logic in seen selfcheck
2020-01-30 15:44:12 -08:00
Linus Torvalds 6a1000bd27 ioremap changes for 5.6
- remove ioremap_nocache given that is is equivalent to
    ioremap everywhere
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Merge tag 'ioremap-5.6' of git://git.infradead.org/users/hch/ioremap

Pull ioremap updates from Christoph Hellwig:
 "Remove the ioremap_nocache API (plus wrappers) that are always
  identical to ioremap"

* tag 'ioremap-5.6' of git://git.infradead.org/users/hch/ioremap:
  remove ioremap_nocache and devm_ioremap_nocache
  MIPS: define ioremap_nocache to ioremap
2020-01-27 13:03:00 -08:00
Miquel Raynal 4575243c5c Raw NAND
* Macronix: Use match_string() helper
 * Atmel: switch to using devm_fwnode_gpiod_get()
 * Denali: rework the SKIP_BYTES feature and add reset controlling
 * Brcmnand: set appropriate DMA mask
 * Various cleanup.
 
 Onenand drivers
 * Rename Samsung and Omap2 drivers to avoid possible build warnings
 * Enable compile testing
 * Various build issues
 * Kconfig cleanup
 
 SPI-NAND
 * Support for Toshiba TC58CVG2S0HRAIJ
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Merge tag 'nand/for-5.6' into mtd/next

Raw NAND
* Macronix: Use match_string() helper
* Atmel: switch to using devm_fwnode_gpiod_get()
* Denali: rework the SKIP_BYTES feature and add reset controlling
* Brcmnand: set appropriate DMA mask
* Various cleanup.

Onenand drivers
* Rename Samsung and Omap2 drivers to avoid possible build warnings
* Enable compile testing
* Various build issues
* Kconfig cleanup

SPI-NAND
* Support for Toshiba TC58CVG2S0HRAIJ
2020-01-27 17:49:15 +01:00
Miquel Raynal 701ddf0bbf SPI NOR core changes:
- Add support for TB selection using SR bit 6,
 - Add support for few flashes.
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Merge tag 'spi-nor/for-5.6' into mtd/next

SPI NOR core changes:
- Add support for TB selection using SR bit 6,
- Add support for few flashes.
2020-01-27 17:48:30 +01:00
Miquel Raynal 0dcf257271 mtd: concat: Fix a comment referring to an unknown symbol
Fix the comment describing what the mtd_concat_destroy() function
does. It referrers to the concat_mtd_devs symbol which has never
existed (at least not since the beginning of the Git era).

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-01-27 17:45:31 +01:00
Brendan Higgins baebaa2b13 mtd: rawnand: add unspecified HAS_IOMEM dependency
Currently CONFIG_MTD_NAND_CADENCE implicitly depends on
CONFIG_HAS_IOMEM=y; consequently, on architectures without IOMEM we get
the following build error:

ld: drivers/mtd/nand/raw/cadence-nand-controller.o: in function `cadence_nand_dt_probe.cold.31':
drivers/mtd/nand/raw/cadence-nand-controller.c:2969: undefined reference to `devm_platform_ioremap_resource'
ld: drivers/mtd/nand/raw/cadence-nand-controller.c:2977: undefined reference to `devm_ioremap_resource'

Fix the build error by adding the unspecified dependency.

Reported-by: Brendan Higgins <brendanhiggins@google.com>
Signed-off-by: Brendan Higgins <brendanhiggins@google.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-01-27 17:44:21 +01:00
Liu Song c3917a0484 mtd: block2mtd: page index should use pgoff_t
Page index use pgoff_t to prevent risk of truncation.

Signed-off-by: Liu Song <liu.song11@zte.com.cn>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-01-27 16:55:41 +01:00
Geert Uytterhoeven 0bc448b49e mtd: maps: physmap: Add minimal Runtime PM support
Add minimal runtime PM support (enable on probe, disable on remove), to
ensure proper operation with a parent device that uses runtime PM.

This is needed on systems where the FLASH is connected to a bus
controller that is contained in a PM domain and/or has a gateable
functional clock.  In such cases, before accessing any device connected
to the external bus, the PM domain must be powered up, and/or the
functional clock must be enabled, which is typically handled through
runtime PM by the bus controller driver.

An example of this is the Renesas APE6-EVM development board, which has
an Ethernet controller and a CFI FLASH connected to the Bus State
Controller (BSC) of an R-Mobile APE6 SoC.
As long as the Ethernet driver, which had Runtime PM support since
commit 3a611e26e9 ("net/smsc911x: Add minimal runtime PM
support"), keeps the BSC powered, accessing the FLASH works.
When the ethernet node in r8a73a4-ape6evm.dts is disabled, the BSC is
never powered up, and the kernel crashes when trying to access the
FLASH:

    Unhandled fault: imprecise external abort (0x1406) at 0x00000000
    pgd = (ptrval)
    [00000000] *pgd=7fef2835
    Internal error: : 1406 [#1] SMP ARM
    CPU: 0 PID: 122 Comm: hd Tainted: G        W         5.5.0-rc1-ape6evm-00814-g38ca966db25b9dbd-dirty #136
    Hardware name: Generic R8A73A4 (Flattened Device Tree)
    PC is at chip_ready+0x12c/0x380
    LR is at chip_ready+0x10c/0x380

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-01-27 16:55:31 +01:00
Jia-Ju Bai 2a0b390b47 mtd: maps: pcmciamtd: fix possible sleep-in-atomic-context bugs in pcmciamtd_set_vpp()
The driver may sleep while holding a spinlock.
The function call path (from bottom to top) in Linux 4.19 is:

drivers/pcmcia/pcmcia_resource.c, 312:
	mutex_lock in pcmcia_fixup_vpp
drivers/mtd/maps/pcmciamtd.c, 309:
	pcmcia_fixup_vpp in pcmciamtd_set_vpp
drivers/mtd/maps/pcmciamtd.c, 306:
	_raw_spin_lock_irqsave in pcmciamtd_set_vpp

drivers/pcmcia/pcmcia_resource.c, 312:
	mutex_lock in pcmcia_fixup_vpp
drivers/mtd/maps/pcmciamtd.c, 312:
	pcmcia_fixup_vpp in pcmciamtd_set_vpp
drivers/mtd/maps/pcmciamtd.c, 306:
	_raw_spin_lock_irqsave in pcmciamtd_set_vp

mutex_lock() may sleep at runtime.

To fix these bugs, the spinlock is replaced with a mutex.

These bugs are found by a static analysis tool STCheck written by
myself.

Signed-off-by: Jia-Ju Bai <baijiaju1990@gmail.com>
Reviewed-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-01-27 16:55:02 +01:00
Miquel Raynal d85339d9ea mtd: onenand: Rename omap2 driver to avoid a build warning
As previously reported by Sudip Mukherjee for the Samsung driver, the
omap2 onenand driver is called omap2.c in our directory and omap2.c in
the tty/serial/ directory. If both drivers are compiled as modules, it
would produce the following warning:

        warning: same module names found:
            drivers/tty/serial/omap2.ko
            drivers/mtd/nand/onenand/omap2.ko

Rename the onenand omap2 driver so that it fits the folder's
convention: onenand_omap2.c.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-01-21 20:00:35 +01:00
Miquel Raynal 446b6dc8d8 mtd: onenand: Use a better name for samsung driver
Commit 55ed51fff2 ("{tty: serial, nand: onenand}: samsung: rename to
fix build warning") has changed the samsung.c driver to be
samsung_mtd.c in order to avoid a conflict in module names with the
tty driver.

Since the *_mtd suffix is very undescriptive, rename it to
onenand_samsung.c, following the folder's convention. Same will be
applied to the omap2 onenand driver.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-01-21 20:00:35 +01:00
Dmitry Torokhov 7a95a72e05 mtd: rawnand: atmel: switch to using devm_fwnode_gpiod_get()
devm_fwnode_get_index_gpiod_from_child() is going away as the name is
too unwieldy, let's switch to using the new devm_fwnode_gpiod_get().

Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-01-21 20:00:34 +01:00
Robert Marko 9ee0f956cf mtd: spinand: add support for Toshiba TC58CVG2S0HRAIJ
Toshiba recently launched new revisions of their serial SLC NAND series.
TC58CVG2S0HRAIJ is a refresh of previous series with minor improvements.
Basic parameters are same so lets add support for this new revision.

Datasheet: https://business.kioxia.com/info/docget.jsp?did=58601&prodName=TC58CVG2S0HRAIJ

Tested under kernel 5.4.7.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-01-21 20:00:34 +01:00
YueHaibing db7b6aeca2 mtd: rawnand: macronix: Use match_string() helper to simplify the code
match_string() returns the array index of a matching string.
Use it instead of the open-coded implementation.

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-01-21 20:00:34 +01:00
YueHaibing f33113b542 mtd: sharpslpart: Fix unsigned comparison to zero
The unsigned variable log_num is being assigned a return value
from the call to sharpsl_nand_get_logical_num that can return
-EINVAL.

Detected using Coccinelle:
./drivers/mtd/parsers/sharpslpart.c:207:6-13: WARNING: Unsigned expression compared with zero: log_num > 0

Fixes: 8a4580e4d2 ("mtd: sharpslpart: Add sharpslpart partition parser")
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-01-21 20:00:34 +01:00
Krzysztof Kozlowski 05a5a6e57e mtd: onenand: Enable compile testing of OMAP and Samsung drivers
OMAP and Samsung OneNAND drivers can be compile tested.  The OMAP
drivers still depends on mach header so limit the compile testing to
ARMv7.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-01-21 20:00:34 +01:00
Krzysztof Kozlowski 440c24535c mtd: onenand: samsung: Fix printing format for size_t on 64-bit
Print size_t as %zu to fix -Wformat warnings when compiling on 64-bit
platform (e.g. with COMPILE_TEST):

    drivers/mtd/nand/onenand/samsung_mtd.c: In function ‘s5pc110_read_bufferram’:
    drivers/mtd/nand/onenand/samsung_mtd.c:661:16: warning:
        format ‘%d’ expects argument of type ‘int’, but argument 3 has type ‘size_t {aka long unsigned int}’ [-Wformat=]
       dev_err(dev, "Couldn't map a %d byte buffer for DMA\n", count);

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-01-21 20:00:34 +01:00
Krzysztof Kozlowski 14b292adcc mtd: onenand: samsung: Fix pointer cast -Wpointer-to-int-cast warnings on 64 bit
iomem pointers should be casted to unsigned long to avoid
-Wpointer-to-int-cast warnings when compiling on 64-bit platform (e.g.
with COMPILE_TEST):

    drivers/mtd/nand/onenand/samsung_mtd.c: In function ‘s3c_onenand_readw’:
    drivers/mtd/nand/onenand/samsung_mtd.c:251:6: warning:
        cast from pointer to integer of different size [-Wpointer-to-int-cast]
      if ((unsigned int) addr < ONENAND_DATARAM && onenand->bootram_command) {
          ^

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-01-21 20:00:33 +01:00
Masahiro Yamada a3b839e4e0 mtd: rawnand: denali: remove hard-coded DENALI_DEFAULT_OOB_SKIP_BYTES
As commit 0d55c668b2 (mtd: rawnand: denali: set SPARE_AREA_SKIP_BYTES
register to 8 if unset") says, there were three solutions discussed:

  [1] Add a DT property to specify the skipped bytes in OOB
  [2] Associate the preferred value with compatible
  [3] Hard-code the default value in the driver

At that time, [3] was chosen because I did not have enough information
about the other platforms than UniPhier.

That commit also says "The preferred value may vary by platform. If so,
please trade up to a different solution." My intention was to replace
[3] with [2], not keep both [2] and [3].

Now that we have switched to [2] for SOCFPGA's SPARE_AREA_SKIP_BYTES=2,
[3] should be removed. This should be OK because denali_pci.c just
gets back to the original behavior.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-01-21 20:00:33 +01:00
Masahiro Yamada 711fafc287 mtd: rawnand: denali_dt: add reset controlling
According to the Denali NAND Flash Memory Controller User's Guide,
this IP has two reset signals.

  rst_n:     reset most of FFs in the controller core
  reg_rst_n: reset all FFs in the register interface, and in the
             initialization sequencer

This commit supports controlling those reset signals.

It is possible to control them separately from the IP point of view
although they might be often tied up together in actual SoC integration.

The IP spec says, asserting only the reg_rst_n without asserting rst_n
will cause unpredictable behavior in the controller. So, the driver
deasserts ->rst_reg and ->rst in this order.

Another thing that should be kept in mind is the automated initialization
sequence (a.k.a. 'bootstrap' process) is kicked off when reg_rst_n is
deasserted.

When the reset is deasserted, the controller issues a RESET command
to the chip select 0, and attempts to read out the chip ID, and further
more, ONFI parameters if it is an ONFI-compliant device. Then, the
controller sets up the relevant registers based on the detected
device parameters.

This process might be useful for tiny boot firmware, but is redundant
for Linux Kernel because nand_scan_ident() probes devices and sets up
parameters accordingly. Rather, this hardware feature is annoying
because it ends up with misdetection due to bugs.

So, commit 0615e7ad5d ("mtd: nand: denali: remove Toshiba and Hynix
specific fixup code") changed the driver to not rely on it.

However, there is no way to prevent it from running. The IP provides
the 'bootstrap_inhibit_init' port to suppress this sequence, but it is
usually out of software control, and dependent on SoC implementation.
As for the Socionext UniPhier platform, LD4 always enables it. For the
later SoCs, the bootstrap sequence runs depending on the boot mode.

I added usleep_range() to make the driver wait until the sequence
finishes. Otherwise, the driver would fail to detect the chip due
to the race between the driver and hardware-controlled sequence.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-01-21 20:00:33 +01:00
Marek Vasut f5561a7c42 mtd: rawnand: denali_dt: Add support for configuring SPARE_AREA_SKIP_BYTES
The SPARE_AREA_SKIP_BYTES register is reset when the controller reset
signal is toggled. Yet, this register must be configured to match the
content of the NAND OOB area. The current default value is always set
to 8 and is programmed into the hardware in case the hardware was not
programmed before (e.g. in a bootloader) with a different value. This
however does not work when the block is reset properly by Linux.

On Altera SoCFPGA CycloneV, ArriaV and Arria10, which are the SoCFPGA
platforms which support booting from NAND, the SPARE_AREA_SKIP_BYTES
value must be set to 2. On Socionext Uniphier, the value is 8. This
patch adds support for preconfiguring the default value and handles
the special SoCFPGA case by setting the default to 2 on all SoCFPGA
platforms, while retaining the original behavior and default value of
8 on all the other platforms.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
To: linux-mtd@lists.infradead.org
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-01-21 20:00:33 +01:00
Masahiro Yamada 8234820138 mtd: rawnand: denali_dt: error out if platform has no associated data
denali->ecc_caps is a mandatory parameter. If it were left unset,
nand_ecc_choose_conf() would end up with NULL pointer access.

So, every compatible must be associated with proper denali_dt_data.
If of_device_get_match_data() returns NULL, let it fail immediately.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-01-21 20:00:33 +01:00
Florian Fainelli 393947e582 mtd: rawnand: brcmnand: Set appropriate DMA mask
NAND controllers >= 7.0 with FLASH_DMA support physical addresses up to
40-bit, set an appropriate DMA mask for that purpose.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-01-21 20:00:33 +01:00
Nathan Chancellor 0e7ca83e82 mtd: onenand_base: Adjust indentation in onenand_read_ops_nolock
Clang warns:

../drivers/mtd/nand/onenand/onenand_base.c:1269:3: warning: misleading
indentation; statement is not part of the previous 'if'
[-Wmisleading-indentation]
        while (!ret) {
        ^
../drivers/mtd/nand/onenand/onenand_base.c:1266:2: note: previous
statement is here
        if (column + thislen > writesize)
        ^
1 warning generated.

This warning occurs because there is a space before the tab of the while
loop. There are spaces at the beginning of a lot of the lines in this
block, remove them so that the indentation is consistent with the Linux
kernel coding style and clang no longer warns.

Fixes: a8de85d557 ("[MTD] OneNAND: Implement read-while-load")
Link: https://github.com/ClangBuiltLinux/linux/issues/794
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-01-21 20:00:32 +01:00
zhengbin 73b265ae7b mtd: rawnand: mpc5121: Remove unneeded semicolon
Fixes coccicheck warning:

drivers/mtd/nand/raw/mpc5121_nfc.c:441:2-3: Unneeded semicolon

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: zhengbin <zhengbin13@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-01-21 20:00:16 +01:00
Chen Wandun 75b3ff79c5 mtd: onenand: samsung: remove set but not used variable
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/mtd/nand/onenand/samsung_mtd.c: In function s3c_onenand_check_lock_status:
drivers/mtd/nand/onenand/samsung_mtd.c:731:6: warning: variable tmp set but not used [-Wunused-but-set-variable]

Signed-off-by: Chen Wandun <chenwandun@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-01-21 19:59:34 +01:00
Krzysztof Kozlowski 296a32b54a mtd: onenand: Fix Kconfig indentation
Adjust indentation from spaces to tab (+optional two spaces) as in
coding style with command like:
	$ sed -e 's/^        /\t/' -i */Kconfig

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-01-21 19:59:34 +01:00
Dan Carpenter 5d3805af27 ubi: Fix an error pointer dereference in error handling code
If "seen_pebs = init_seen(ubi);" fails then "seen_pebs" is an error pointer
and we try to kfree() it which results in an Oops.

This patch re-arranges the error handling so now it only frees things
which have been allocated successfully.

Fixes: daef3dd1f0 ("UBI: Fastmap: Add self check to detect absent PEBs")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
2020-01-19 23:23:28 +01:00