Commit Graph

244 Commits

Author SHA1 Message Date
Felipe Balbi 42f8eb7a10 usb: dwc3: gadget: don't force 'LST' always
the LST bit is to be set on the last of a series
of consecutive TRBs. We had a workaround for a
problem where data would get corrupted but that
doesn't happen anymore. It's likely that it was
caused by some FPGA instability during development
phase.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-12-21 13:24:46 +02:00
Felipe Balbi 68e823e24a usb: dwc3: gadget: don't return anything on prepare trbs
all that function does is setup a TRB to be sent
to HW later. There's no need to return anything
actually.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-12-21 13:24:45 +02:00
Felipe Balbi c71fc37c19 usb: dwc3: gadget: re-factor dwc3_prepare_trbs()
In order to make it easier to add SG support,
let's split the big loop out to its own function.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-12-21 13:24:45 +02:00
Felipe Balbi 961906edb5 usb: dwc3: gadget: move us to Default State after reset
After a bus reset, we should move our state to
Default, in order to be able to re-enumerate again.

I only managed to trigger this problem with g_ether
by removing the cable after a few transfers had been
completed.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-12-20 18:28:06 +02:00
Greg Kroah-Hartman 121a8cdd79 Merge branch 'for-next/gadget' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
* 'for-next/gadget' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb: (50 commits)
  usb: renesas_usbhs: show error reason on usbhsh_urb_enqueu()
  usb: renesas_usbhs: add force packet remove method
  usb: renesas_usbhs: care usb_hcd_giveback_urb() status
  usb: renesas_usbhs: add usbhsh_is_running()
  usb: renesas_usbhs: disable attch irq after device attached
  usb: renesas_usbhs: care pipe sequence
  usb: renesas_usbhs: add usbhs_pipe_attach() method
  usb: renesas_usbhs: add usbhsh_endpoint_detach_all() for error case
  usb: renesas_usbhs: modify device attach method
  usb: renesas_usbhs: pop packet when urb dequeued
  usb: renesas_usbhs: add lost error value when enqueue
  usb: gadget: mv_udc: replace some debug info
  usb: gadget: mv_udc: refine suspend/resume function
  usb: gadget: mv_udc: refine the clock relative code
  usb: gadget: mv_udc: disable ISR when stopped
  usb: gadget: mv_udc: add otg relative code
  usb: gadget: Use kcalloc instead of kzalloc to allocate array
  usb: renesas_usbhs: remove the_controller_link
  usb: renesas_usbhs: add test-mode support
  usb: renesas_usbhs: call usbhsg_queue_pop() when pipe disable.
  ...
2011-12-13 09:37:40 -08:00
Felipe Balbi c90bfaece9 usb: dwc3: gadget: fix stream enable bit
ep->max_streams is a mere hint to the gadget
driver that 'ep' supports stream handling. Using
that as a decision variable for enabling streams
was my worst brain-fart to date.

Instead, we should check from the Superspeed
Endpoint Companion Descriptor if the endpoint
has requested streams. For that we need a little
re-factoring but it is now correct.

Debugged-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-12-12 11:48:47 +02:00
Felipe Balbi df62df56e1 usb: dwc3: workaround: missing disconnect event
DWC3 revisions <1.88a have an issue which would
case a missing Disconnect event if cable is
disconnected while there's a Setup packet
pending the FIFO.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-12-12 11:48:42 +02:00
Felipe Balbi 05870c5ba2 usb: dwc3: workaround: missing USB3 Reset event
DWC3 revisions <1.90a have an issue which would cause
a missing USB3 Reset event. In such cases, it's
suggested that we follow the steps of a normal
USB3 Reset on Connection Done Event.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-12-12 11:48:35 +02:00
Felipe Balbi fae2b904aa usb: dwc3: workaround: U1/U2 -> U0 transiton
RTL revisions <1.83a have an issue where, depending
on the link partner, the USB link might do multiple
entry/exit of low power states before a transfer
takes place causing degraded throughput.

The suggested workaround is to clear bits
12:9 of DCTL register if we see a transition
from U1|U2 to U0 and only re-enable that on
a transfer complete IRQ and we have no pending
transfers on any of the enabled endpoints.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-12-12 11:48:34 +02:00
Sebastian Andrzej Siewior d39ee7be2a usb: dwc3: gadget: return early in dwc3_cleanup_done_reqs()
This patch avoids the compiler spitting out the following warning:
|drivers/usb/dwc3/gadget.c:1304: warning: 'trb' is used uninitialized \
	in this function

This is only uninitialized if the list of to-cleanup TRBs is empty which
should not be the case because we call this functions once a transfer
completed so it should be on list.

In order to make the warning disappear we return early. This should
never happen and the WARN_ON_ONCE(1) is there in case it happens
so we can investigate what went wrong.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-12-12 11:48:32 +02:00
Felipe Balbi 25b8ff68bf usb: dwc3: fix few coding style problems
There were a few coding style issues with this driver
which are now fixed:

drivers/usb/dwc3/debugfs.c:48: WARNING: Use #include \
	<linux/uaccess.h> instead of <asm/uaccess.h>
drivers/usb/dwc3/debugfs.c:484: ERROR: space required \
	before the open brace '{'
drivers/usb/dwc3/ep0.c:261: WARNING: line over 80 characters
drivers/usb/dwc3/ep0.c:287: WARNING: suspect code indent \
	for conditional statements (16, 23)
drivers/usb/dwc3/gadget.c:749: WARNING: line over 80 characters
drivers/usb/dwc3/gadget.c:1267: WARNING: line over 80 characters
drivers/usb/dwc3/gadget.h:116: WARNING: line over 80 characters
drivers/usb/dwc3/io.h:42: WARNING: Use #include \
	<linux/io.h> instead of <asm/io.h>

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-12-12 11:48:29 +02:00
Sebastian Andrzej Siewior 4878a02898 usb: dwc3: move generic dwc3 code from gadget into core
A few inits like the scale value or the removal of the DISSCRAMBLE is
done in the gadget code however it touches a general register.
Move this piece to the core.c file since it is likely to be requied by
both, parts of the core (device and host).

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-12-12 11:48:27 +02:00
Sebastian Andrzej Siewior 3140e8cbfe usb: dwc3: use a helper function for operation mode setting
There are two where need to set operational mode:
- during initialization while we decide to run in host,device or DRD
  mode
- at runtime via the debugfs interface.

This patch provides a new function which sets the operational mode and
moves its initialiation to the mode switch instead in the gadget code
itself.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-12-12 11:48:26 +02:00
Felipe Balbi 9f622b2a40 usb: dwc3: calculate number of event buffers dynamically
This will allow us to only allocate memory when
we actually need.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-12-12 11:48:11 +02:00
Felipe Balbi 6c167fc9b0 usb: dwc3: allow forcing a maximum speed
this is mainly for testing. In order to be able
to test if we're enumerating correctly on all
speeds, let that be controlled by a module
parameter.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-12-12 11:48:10 +02:00
Felipe Balbi b2c2271c82 usb: dwc3: gadget: don't disable endpoints on exit
when we remove the gadget driver, it will already
do that for us.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-12-12 11:48:09 +02:00
Michal Nazarewicz d327ab5b6d usb: gadget: replace usb_gadget::is_dualspeed with max_speed
This commit replaces usb_gadget's is_dualspeed field with
a max_speed field.

[ balbi@ti.com : Fixed DWC3 driver ]

Signed-off-by: Michal Nazarewicz <mina86@mina86.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-12-12 11:45:11 +02:00
Sebastian Andrzej Siewior 12d36c16bd usb: dwc3: gadget: initialize max_streams
Without this the gadget will never be able to allocate a stream capable
endpoint. The manual says that the stream id is a 16bit id. It does not
talk about an upper limit in any other way. So I think 15 is a
reasonable limit :)

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-11-14 11:51:31 -08:00
Felipe Balbi dc1c70a774 usb: dwc3: convert structures into bitshifts
our parameter structures need to be written to
HW, so instead of assuming little endian, we
convert those into bit shifts.

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-10-04 10:25:56 -07:00
Felipe Balbi aabb707523 usb: dwc3: gadget: allow clock gating to work
The dwc3 core has internal clock gating support.

Let's allow that to happen by clearing the disable
bit in GCTL register.

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-10-04 10:25:56 -07:00
Felipe Balbi 879631aa65 usb: dwc3: gadget: implement streams support
The following patch adds support for streams
to dwc3 driver.

While at that, also fix one small issue on
endpoint disable where we should clear all
flags not only ENABLED.

Reviewied-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-10-04 10:25:54 -07:00
Felipe Balbi a4af9008bb usb: dwc3: gadget: add support for Bursts
We already have the value from gadget drivers,
just need to pass it to our controller.

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-10-04 10:25:54 -07:00
Paul Zimmerman c439ef87c3 usb: dwc3: gadget: fix DMA offset calculation
Fix offset calculation in dwc3_trb_dma_offset()

Signed-off-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-10-04 10:25:53 -07:00
Paul Zimmerman 5275455a6e usb: dwc3: gadget: make DWC3_EP_WEDGE do the right thing
This makes DWC3_EP_WEDGE do the right thing, which is
prevent DWC3_EP_WEDGE from ever being cleared by a
ClearFeature(HALT) command.

[ balbi@ti.com : allowed set_wedge to send SetHalt command
	to controller ]

Signed-off-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-10-04 10:25:53 -07:00
Paul Zimmerman 82828ca77b usb: dwc3: gadget: driver should not wait for RxFIFO to drain
An older version of the databook said to wait for the FIFO to
drain, but that has been removed from the newer databooks.

Waiting for RxFIFO to drain caused problems when testing against
one of the host controllers available in the market.

After talking to one of the RTL engineers, he stated that we
should _not_ wait for RxFIFO to drain.

Signed-off-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-10-04 10:25:53 -07:00
Paul Zimmerman b23c843992 usb: dwc3: gadget: fix DEPSTARTCFG for non-EP0 EPs
DEPSTARTCFG for non-EP0 EPs must only be sent once per config

[ balbi@ti.com : changed config_start to start_config_issued ]

Signed-off-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-10-04 10:25:52 -07:00
Sebastian Andrzej Siewior 49a25cc9a7 usb: dwc: remove "All rights reserved" statement.
Some people think that this line is not compatible with the GPL. The
statement was required due to the Buenos Aires Convention and is now
deprecated. I remove it because it is said that it is pointless nowdays.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-10-04 10:25:52 -07:00
Felipe Balbi 019ac83252 usb: dwc3: gadget: improve debug on link state change
It's useful to know which states core is going
through, as it might help us figure out misbehavior
on specific link states.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:05:31 +03:00
Felipe Balbi bb7ea2841e usb: dwc3: gadget: drop the useless dma_sync_single* calls
if req->dma isn't DMA_ADDR_INVALID it means gadget driver
mapped the request or allocated from coherent, so it's
unnecessary to do anything.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:05:26 +03:00
Felipe Balbi 771f184ece usb: dwc3: gadget: fix GCTL programming
ensure a few bits are cleared before enabling
what we need.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:05:25 +03:00
Sebastian Andrzej Siewior 78c58a53c9 usb: dwc3: gadget: do not map/unmap ZLP transfers
If the gadget drivers sends a ZLP we are trying to map this this request
which does not work on all implementations. So we simply skip mapping
it.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:03:46 +03:00
Felipe Balbi 0b7836a9eb usb: dwc3: drop EP0_STALL state
Whenever we issue a Set Stall command on EP0,
the state machine will be restarted and Stall
is cleared automatically, when core receives
the next SETUP packet.

There's no need to track that EP0_STALL state.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:17 +03:00
Sebastian Andrzej Siewior 61d58242f6 usb: dwc3: gadget: replace mdelay with udelay in the busy loop
There are two spots where we wait until the HW finishes processing a
certain command. Initially we had a few problems and we used 500ms as a
limit to be on a the safe side. Paul Zimmerman mentioned this is little too
much. After a debugging session, we noticed that we hardly ever go over 20us
and didn't pass 30usec so far. Using mdelay() seems way overloaded.

Giving the current numbers 500usec as the upper limit is more than  enough.
Should it ever timeout then something is definitely wrong.

While here, also replace the type with u32 since long does not really
fit here.

Cc: Paul Zimmerman <paul.zimmerman@synopsys.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:13 +03:00
Sebastian Andrzej Siewior 624407f96f usb: dwc3: gadget: rework the dequeue on RESET & DISCONNECT
- since a while we are disabling an endpoint and purging every requests on
  RESET and DISCONNECT which leads to a warning since the endpoint was
  disabled twice (once by the UDC, and second time by the gadget). I
  think UDC should nuke all requests because all those requests
  become invalid. It's gadget driver's responsability, though, to disable
  its used endpoints. This is done by merging dwc3_stop_active_transfer()
  and dwc3_gadget_nuke_reqs() into dwc3_remove_requests().

- dwc3_stop_active_transfer() is now no longer called unconditionaly.
  This has the advantage that it is always called to disable an active
  transfer which means if res_trans_idx 0 than something went wrong and
  it is an error condition because we can't clean up the requests.

- Remove the DWC3_EP_WILL_SHUTDOWN which was introduced while
  introducing the command complete part for dequeue. All requests on
  req_queued list should be removed during the dwc3_cleanup_done_reqs()
  callback so there is no reason to go through the list again.
  We consider it an error condition if requests are still on this
  list since we never queue TRB without LST=1 (the last requests has
  always LST=1, there are no requests with LST=0 behind it).

[ balbi@ti.com : reworked commit log a bit, made patch apply ]

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:10 +03:00
Felipe Balbi c7fcdeb262 usb: dwc3: ep0: simplify EP0 state machine
The DesignWare USB3 core tells us which phase
of a control transfer should be started, it
also tells us which physical endpoint needs
that transfer.

With these two informations, we have all we
need to simply EP0 handling quite a lot and
get rid rid of the SW state machine tracking
ep0 states.

For achieving this perfectly, we needed to
add support for situations where we get
XferNotReady while endpoint is still busy
and XferNotReady while gadget driver still
hasn't queued a request.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:07 +03:00
Felipe Balbi 5812b1c236 usb: dwc3: add a bounce buffer for control endpoints
This core cannot handle OUT transfers which aren't
aligned to wMaxPacketSize, but that can happen at
least on control endpoint with the USB Audio Class.

This patch adds a bounce buffer to be used on the
case of a non-aligned ep0out request is queued.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:04 +03:00
Felipe Balbi 164f6e141e usb: dwc3: gadget: improve command completion debug message
the previous message had too little meaning. Make
it more human readable and use the macro we already
had for extracting the command completion status out
of DEPCMDn register.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:02 +03:00
Felipe Balbi f198ead21b usb: dwc3: gadget: set request dma to invalid when unmapping
if we don't set DMA address to invalid when unmapping,
we might fall in a situation where request buffer
can't be mapped to DMA again.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:01 +03:00
Sebastian Andrzej Siewior 0156cf8603 usb: dwc3: gaget: clear DWC3_EP_WILL_SHUTDOWN bit
Without this patch we won't clear that bit and instead will
clear all other bits on our endpoint flag.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:01:57 +03:00
Sebastian Andrzej Siewior 5a18999ebd usb: dwc3: gadget: use TRB type 6 for ISOC transfers
Type 6 should be used for the first transfer during an interval. This is
also what the reference driver is using. Type 7 seems to be for following
or additional transfers within the same interval.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:01:56 +03:00
Sebastian Andrzej Siewior a1ae9be5fc usb: dwc3: gadget: reset resource index to zero
If we collected two requests together (i.e. only the last of them has
LST=1) then we only have to stop transfer once: The clean-up code will
cleanup everything until first TRB with the LST bit set.
After XferComplete this index should be no longer valid since there is
no transfer pending.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:01:55 +03:00
Sebastian Andrzej Siewior 0d2f475853 usb: dwc3: gadget: fixing dequeue of TRBs
A TRB which is dequeued seems to have its HWO bits set to 1. Therefore
we ignore it if we dequeue it after the command is completed.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:01:54 +03:00
Kuninori Morimoto 29cc88979a USB: use usb_endpoint_maxp() instead of le16_to_cpu()
Now ${LINUX}/drivers/usb/* can use usb_endpoint_maxp(desc) to get maximum packet size
instead of le16_to_cpu(desc->wMaxPacketSize).
This patch fix it up

Cc: Armin Fuerst <fuerst@in.tum.de>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Johannes Erdfelt <johannes@erdfelt.com>
Cc: Vojtech Pavlik <vojtech@suse.cz>
Cc: Oliver Neukum <oliver@neukum.name>
Cc: David Kubicek <dave@awk.cz>
Cc: Johan Hovold <jhovold@gmail.com>
Cc: Brad Hards <bhards@bigpond.net.au>
Acked-by: Felipe Balbi <balbi@ti.com>
Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Cc: Thomas Dahlmann <dahlmann.thomas@arcor.de>
Cc: David Brownell <david-b@pacbell.net>
Cc: David Lopo <dlopo@chipidea.mips.com>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: Michal Nazarewicz <m.nazarewicz@samsung.com>
Cc: Xie Xiaobo <X.Xie@freescale.com>
Cc: Li Yang <leoli@freescale.com>
Cc: Jiang Bo <tanya.jiang@freescale.com>
Cc: Yuan-hsin Chen <yhchen@faraday-tech.com>
Cc: Darius Augulis <augulis.darius@gmail.com>
Cc: Xiaochen Shen <xiaochen.shen@intel.com>
Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: OKI SEMICONDUCTOR, <toshiharu-linux@dsn.okisemi.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Cc: Ben Dooks <ben@simtec.co.uk>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Cc: Herbert Pötzl <herbert@13thfloor.at>
Cc: Arnaud Patard <arnaud.patard@rtp-net.org>
Cc: Roman Weissgaerber <weissg@vienna.at>
Acked-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Cc: Tony Olech <tony.olech@elandigitalsystems.com>
Cc: Florian Floe Echtler <echtler@fs.tum.de>
Cc: Christian Lucht <lucht@codemercs.com>
Cc: Juergen Stuber <starblue@sourceforge.net>
Cc: Georges Toth <g.toth@e-biz.lu>
Cc: Bill Ryder <bryder@sgi.com>
Cc: Kuba Ober <kuba@mareimbrium.org>
Cc: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-08-23 09:47:40 -07:00
Felipe Balbi 72246da40f usb: Introduce DesignWare USB3 DRD Driver
The DesignWare USB3 is a highly
configurable IP Core which can be
instantiated as Dual-Role Device (DRD),
Peripheral Only and Host Only (XHCI)
configurations.

Several other parameters can be configured
like amount of FIFO space, amount of TX and
RX endpoints, amount of Host Interrupters,
etc.

The current driver has been validated with
a virtual model of version 1.73a of that core
and with an FPGA burned with version 1.83a
of the DRD core. We have support for PCIe
bus, which is used on FPGA prototyping, and
for the OMAP5, more adaptation (or glue)
layers can be easily added and the driver
is half prepared to handle any possible
configuration the HW engineer has chosen
considering we have the information on
one of the GHWPARAMS registers to do
runtime checking of certain features.

More runtime checks can, and should, be added
in order to make this driver even more flexible
with regards to number of endpoints, FIFO sizes,
transfer types, etc.

While this supports only the device side, for
now, we will add support for Host side (xHCI -
see the updated series Sebastian has sent [1])
and OTG after we have it all stabilized.

[1] http://marc.info/?l=linux-usb&m=131341992020339&w=2

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-08-22 16:03:11 -07:00