Commit Graph

9 Commits

Author SHA1 Message Date
Shawn Guo 9e1ac462b9 ARM: imx: fix .is_enabled() of shared gate clock
Commit 63288b721a ("ARM: imx: fix shared gate clock") attempted to fix
an issue with particular enable/disable sequence from two shared gate
clocks.  But unfortunately, while it partially fixed the issue, it also
did something wrong in .is_enabled() function hook.  In case of shared
gate, the function shouldn't really query the hardware state via
share_count, because the function is trying to query the enabling state
of the clock in question, not the hardware state which is shared by
multiple clocks.

Fix the issue by returning the enable_count of the clock itself which is
maintained by clock core, in case it's a clock sharing hardware gate
with others.  As the result, the initialization of share_count per
hardware state is not needed now.  So remove it.

Reported-by: Fabio Estevam <fabio.estevam@freescale.com>
Fixes: 63288b721a ("ARM: imx: fix shared gate clock")
Cc: <stable@vger.kernel.org>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2014-09-22 21:49:20 -07:00
Shawn Guo 63288b721a ARM: imx: fix shared gate clock
Let's say clock A and B are two gate clocks that share the same register
bit in hardware.  Therefore they are registered as shared gate clocks
with imx_clk_gate2_shared().

In a scenario that only clock A is enabled by clk_enable(A) while B is
not used, the shared gate will be unexpectedly disabled in hardware.
It happens because clk_enable(A) increments the share_count from 0 to 1,
while clock B is unused to clock core, and therefore the core function
will just disable B by calling clk->ops->disable() directly.  The
consequence of that call is share_count is decremented to 0 and the gate
is disabled in hardware, even though clock A is still in use.

The patch fixes the issue by initializing the share_count per hardware
state and returns enable state per share_count from .is_enabled() hook,
in case it's a shared gate.

While at it, add a check in clk_gate2_disable() to ensure it's never
called with a zero share_count.

Reported-by: Fabio Estevam <fabio.estevam@freescale.com>
Fixes: f9f28cdf21 ("ARM: imx: add shared gate clock support")
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2014-07-07 21:21:11 -07:00
Shawn Guo f9f28cdf21 ARM: imx: add shared gate clock support
It's quite common on i.MX that one gate bit controls the gating of
multiple clocks, i.e. this is a shared gate.  The patch adds the
function imx_clk_gate2_shared() for such case.  The clocks controlled
by the same gate bits should call this function with a pointer to a
single share count variable, so that the gate bits will only be
operated on the first enabling and the last disabling of these shared
gate clocks.

Thanks to Gerhard Sittig <gsi@denx.de> for this idea.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-12 22:58:48 +08:00
Shawn Guo 94b5c02882 ARM: imx: lock is always valid for clk_gate2
The imx specific clk_gate2 always has a valid lock with the clock.  So
the validation on gate->lock is not really needed.  Remove it.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-12 22:58:48 +08:00
Shawn Guo 54ee1471f8 ARM: imx: define struct clk_gate2 on our own
The imx clk-gate2 driver implements an i.MX specific gate clock, which
has two bits controlling the gate states.  While this is a completely
separate gate driver from the common clk-gate one, it reuses the common
clk_gate structure.  Such reusing makes the extending of clk_gate2
clumsy.  Let's define struct clk_gate2 on our own to make the driver
independent of the common clk-gate one, and ease the clk_gate2 extending
at a later time.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-12 22:58:48 +08:00
Anson Huang b4e844f019 ARM: imx: improve status check of clock gate
For ccm clock gate, both 2b'11 and 2b'01 should be treated
as clock enabled, see below description in CCM, whenver CPU
trys to check clock gate's status, system will be in run mode.

2b'00: clock is off during all modes;
2b'01: clock is on in run mode, but off in wait and stop mode;
2b'10: Not applicable;
2b'11: clock is on during all modes, except stop mode.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-12-31 09:36:46 +08:00
Fabio Estevam d7b8c030f6 ARM: mach-imx: clk-gate2: Include "clk.h"
Fix the following sparse warning:

arch/arm/mach-imx/clk-gate2.c:86:12: warning: symbol 'clk_register_gate2' was not declared. Should it be static?

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-01 16:17:50 +08:00
Wei Yongjun ecf026dc34 ARM i.MX: fix error-valued pointer dereference in clk_register_gate2()
The error-valued pointer clk is used for the arg of kfree, it should be
kfree(gate) if clk_register() return ERR_PTR().

dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-11-16 15:53:57 +01:00
Sascha Hauer b75c015143 ARM i.MX: Add common clock support for 2bit gate
This gate consists of two bits:

0b00: clk disabled
0b01: clk enabled in run mode and disabled in sleep mode
0b11: clk enabled

Currently only disabled and enabled are supported. As it's unlikely
that we find something like this in another SoC create a i.MX specific
clk helper for this.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-05-02 12:08:13 +02:00