Commit Graph

7 Commits

Author SHA1 Message Date
Jacky Bai 8cd117e712 clk: imx: keep uart clock on during system boot
Keep uart clocks enabled when earlyprintk or
earlycon is active.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-04-29 16:02:01 -07:00
Leonard Crestez 6ff46d77ca clk: imx6sll: Fix mispelling uart4_serial as serail
This looks like a copy-paste error. This string is not referenced
anywhere so it's safe to rename it.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-04-25 14:46:01 -07:00
Anson Huang aac7ff2048 clk: imx6sll: add mmdc1 ipg clock
i.MX6SLL has MMDC1 ipg clock in CCM CCGR, add it into
clock tree for clock management.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 11:15:44 -07:00
Stephen Boyd 032405a754 Merge branches 'clk-imx6-ocram', 'clk-missing-put', 'clk-tegra-sdmmc-jitter', 'clk-allwinner' and 'clk-uniphier' into clk-next
* clk-imx6-ocram:
  :  - i.MX6SX ocram_s clk support
  clk: imx: add ocram_s clock for i.mx6sx

* clk-missing-put:
  :  - Add missing of_node_put()s in some i.MX clk drivers
  clk: imx6sll: fix missing of_node_put()
  clk: imx6ul: fix missing of_node_put()

* clk-tegra-sdmmc-jitter:
  :  - Tegra SDMMC clk jitter improvements with high speed signaling modes
  clk: tegra: make sdmmc2 and sdmmc4 as sdmmc clocks
  clk: tegra: Add sdmmc mux divider clock
  clk: tegra: Refactor fractional divider calculation
  clk: tegra: Fix includes required by fence_udelay()

* clk-allwinner:
  clk: sunxi-ng: add A64 compatible string
  dt-bindings: add compatible string for the A64 DE2 CCU
  clk: sunxi-ng: r40: Export video PLLs
  clk: sunxi-ng: r40: Allow setting parent rate to display related clocks
  clk: sunxi-ng: r40: Add minimal rate for video PLLs

* clk-uniphier:
  :  - Uniphier NAND, USB3 PHY, and SPI clk support
  clk: uniphier: add clock frequency support for SPI
  clk: uniphier: add more USB3 PHY clocks
  clk: uniphier: add NAND 200MHz clock
2018-08-14 22:58:53 -07:00
Nicholas Mc Guire 7f5eac5934 clk: imx6sll: fix missing of_node_put()
of_find_compatible_node() is returning a device node with refcount
incremented and must be explicitly decremented after the last use
which is right after the us in of_iomap() here.

Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Fixes: 4a5f720b65 ("clk: imx: add clock driver for imx6sll")
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-07-25 13:35:00 -07:00
Anson Huang 9d8108f9f3 clk: imx6sll: add GPIO LPCGs
According to Reference Manual Rev.0, 06/2017, there are GPIO LPCGs
defined in CCM CCGRs, add them into clock tree.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-07-06 13:58:20 -07:00
Bai Ping 4a5f720b65 clk: imx: add clock driver for imx6sll
Add clk driver support for imx6sll.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
Acked-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-04-06 11:27:27 -07:00