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Author SHA1 Message Date
Xiubo Li c99428d035 spi: fsl-dspi: Convert to use regmap framework's endianness method. 
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Acked-by: Chao Fu <b44548@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
 2014-08-18 09:41:54 -05:00
Chao Fu 1acbdeb92c spi/fsl-dspi: Convert to use regmap and add big-endian support 
Freescale DSPI module will have two endianess in different platform,
but ARM is little endian. So when DSPI in big endian, core in little endian,
readl and writel can not adjust R/W register in this condition.
This patch will remove general readl/writel, and import regmap mechanism.
Data endian will be transfered in regmap APIs.

Documents: dspi add bool "big-endian" in dts node if DSPI module
work in big endian.

Signed-off-by: Chao Fu <b44548@freescale.com>
Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
 2014-02-16 09:15:23 +08:00
Chao Fu 9cbd72e577 Documentation: DT: Add Freescale DSPI driver 
This patch adds the document for DSPI driver under
Documentation/devicetree/bindings/spi/.

Signed-off-by: Chao Fu <b44548@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
 2013-08-22 11:33:13 +01:00