Commit Graph

4 Commits

Author SHA1 Message Date
Julia Lawall 8d2f9e8eca clk: ti: dra7: return error code in failure case
Add a returned error code in the MAX_APLL_WAIT_TRIES case.  Remove the
updating of the return variable r to 0 if MAX_APLL_WAIT_TRIES is not yet
reached, because r is already 0 at this point.

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2014-06-19 14:52:31 +03:00
Dan Carpenter 6c7ee8905d clk: ti: apll: not allocating enough data
There is a cut and paste bug here which will lead to memory corruption
because we don't allocate enough data.

Fixes: 4d008589e2 ('CLK: TI: APLL: add support for omap2 aplls')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2014-06-19 14:52:31 +03:00
Tero Kristo 4d008589e2 CLK: TI: APLL: add support for omap2 aplls
This patch adds support for omap2 type aplls, which have gating and
autoidle functionality.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2014-05-28 12:30:02 +03:00
J Keerthy 3cf467a996 CLK: TI: DRA7: Add APLL support
The patch adds support for DRA7 PCIe APLL. The APLL
sources the optional functional clocks for PCIe module.

APLL stands for Analog PLL. This is different when comapred
with DPLL meaning Digital PLL, the phase detection is done
using an analog circuit.

Signed-off-by: J Keerthy <j-keerthy@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-17 12:35:31 -08:00