mirror of https://gitee.com/openkylin/linux.git
567 Commits
| Author | SHA1 | Message | Date |
|---|---|---|---|
Imre Deak
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4d071c3238 |
PCI/PM: Add needs_resume flag to avoid suspend complete optimization
Some drivers - like i915 - may not support the system suspend direct complete optimization due to differences in their runtime and system suspend sequence. Add a flag that when set resumes the device before calling the driver's system suspend handlers which effectively disables the optimization. Needed by a future patch fixing suspend/resume on i915. Suggested by Rafael. Signed-off-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Cc: stable@vger.kernel.org |
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Bjorn Helgaas
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ef1b5dad5a |
Merge branch 'pci/virtualization' into next
* pci/virtualization: ixgbe: Use pcie_flr() instead of duplicating it IB/hfi1: Use pcie_flr() instead of duplicating it PCI: Call pcie_flr() from reset_chelsio_generic_dev() PCI: Call pcie_flr() from reset_intel_82599_sfp_virtfn() PCI: Export pcie_flr() PCI: Add sysfs sriov_drivers_autoprobe to control VF driver binding PCI: Avoid FLR for Intel 82579 NICs Conflicts: include/linux/pci.h |
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Bjorn Helgaas
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78f098383a |
Merge branch 'pci/resource' into next
* pci/resource: PCI: Don't resize resources when realigning all devices in system PCI: Don't reassign resources that are already aligned PCI: Factor pci_reassigndev_resource_alignment() powerpc/powernv: Override pcibios_default_alignment() to force PCI devices to be page aligned PCI: Add pcibios_default_alignment() for arch-specific alignment control PCI: Fix calculation of bridge window's size and alignment PCI: Ignore requested alignment for IOV BARs PCI: Make PCI_ROM_ADDRESS_MASK a 32-bit constant |
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Bjorn Helgaas
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acc886ec93 |
Merge branch 'pci/pm' into next
* pci/pm: PCI: Freeze PME scan before suspending devices PCI/PM: Don't sleep at all when d3_delay or d3cold_delay is zero |
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Bjorn Helgaas
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0b0ee66c4f |
Merge branch 'pci/ioremap' into next
* pci/ioremap: PCI: versatile: Update PCI config space remap function PCI: keystone-dw: Update PCI config space remap function PCI: layerscape: Update PCI config space remap function PCI: hisi: Update PCI config space remap function PCI: tegra: Update PCI config space remap function PCI: xgene: Update PCI config space remap function PCI: armada8k: Update PCI config space remap function PCI: designware: Update PCI config space remap function PCI: iproc-platform: Update PCI config space remap function PCI: qcom: Update PCI config space remap function PCI: rockchip: Update PCI config space remap function PCI: spear13xx: Update PCI config space remap function PCI: xilinx-nwl: Update PCI config space remap function PCI: xilinx: Update PCI config space remap function PCI: ECAM: Map config region with pci_remap_cfgspace() PCI: Implement devm_pci_remap_cfgspace() devres: fix devm_ioremap_*() offset parameter kerneldoc description ARM: Implement pci_remap_cfgspace() interface ARM64: Implement pci_remap_cfgspace() interface linux/io.h: Add pci_remap_cfgspace() interface PCI: Remove __weak tag from pci_remap_iospace() |
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Bjorn Helgaas
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f503ee4cbe |
Merge branch 'pci/enumeration' into next
* pci/enumeration: PCI: Include PCI-to-PCIe bridges as "Downstream Ports" PCI: Improve __pci_read_base() robustness PCI: Short-circuit pci_device_is_present() for disconnected devices PCI/MSI: Skip disabling disconnected devices PCI: Don't attempt config access to disconnected devices PCI: Add device disconnected state PCI: Export PCI device config accessors |
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Lorenzo Pieralisi
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490cb6ddb1 |
PCI: Implement devm_pci_remap_cfgspace()
The introduction of the pci_remap_cfgspace() interface allows PCI host controller drivers to map PCI config space through a dedicated kernel interface. Current PCI host controller drivers use the devm_ioremap_*() devres interfaces to map PCI configuration space regions so in order to update them to the new pci_remap_cfgspace() mapping interface a new set of devres interfaces should be implemented so that PCI host controller drivers can make use of them. Introduce two new functions in the PCI kernel layer and Devres documentation: - devm_pci_remap_cfgspace() - devm_pci_remap_cfg_resource() so that PCI host controller drivers can make use of them to map PCI configuration space regions. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Jonathan Corbet <corbet@lwn.net> |
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Brian Norris
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f90b087546 |
PCI: Export pci_remap_iospace() and pci_unmap_iospace()
These are useful for PCIe host drivers, and those drivers can be modules. [bhelgaas: don't remove __weak; it's removed elsewhere] Signed-off-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Shawn Lin <shawn.lin@rock-chips.com> |
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Christoph Hellwig
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a60a2b73ba |
PCI: Export pcie_flr()
Currently we opencode the FLR sequence in lots of place; export a core helper instead. We split out the probing for FLR support as all the non-core callers already know their hardware. Note that in the new pci_has_flr() function the quirk check has been moved before the capability check as there is no point in reading the capability in this case. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
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Lorenzo Pieralisi
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7b309aef04 |
PCI: Remove __weak tag from pci_remap_iospace()
pci_remap_iospace() is marked as a weak symbol even though no architecture is currently overriding it; given that its implementation internals have already code paths that are arch specific (ie PCI_IOBASE and ioremap_page_range() attributes) there is no need to leave the weak symbol in the kernel since the same functionality can be achieved by customizing per-arch the corresponding functionality. Remove the __weak symbol from pci_remap_iospace(). Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Arnd Bergmann <arnd@arndb.de> |
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Yongji Xie
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e3adec72a3 |
PCI: Don't resize resources when realigning all devices in system
The "pci=resource_alignment" argument aligns BARs of designated devices by artificially increasing their size. Increasing the size increases the alignment and prevents other resources from being assigned in the same alignment region, e.g., in the same page, but it can break drivers that use the BAR size to locate things, e.g., ilo_map_device() does this: off = pci_resource_len(pdev, bar) - 0x2000; The new pcibios_default_alignment() interface allows an arch to request that *all* BARs in the system be aligned to a larger size. In this case, we don't need to artificially increase the resource size because we know every BAR of every device will be realigned, so nothing will share the same alignment region. Use IORESOURCE_STARTALIGN to request realignment of PCI BARs when we know we're realigning all BARs in the system. [bhelgaas: comment, changelog] Signed-off-by: Yongji Xie <elohimes@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
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Bjorn Helgaas
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0dde1c08d1 |
PCI: Don't reassign resources that are already aligned
The "pci=resource_alignment=" kernel argument designates devices for which we want alignment greater than is required by the PCI specs. Previously we set IORESOURCE_UNSET for every MEM resource of those devices, even if the resource was *already* sufficiently aligned. If a resource is already sufficiently aligned, leave it alone and don't try to reassign it. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
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Bjorn Helgaas
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81a5e70e0d |
PCI: Factor pci_reassigndev_resource_alignment()
Pull the BAR size adjustment out into a new function, pci_request_resource_alignment(), and add a comment about how and why we increase the resource size and alignment. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
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Yongji Xie
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0a701aa637 |
PCI: Add pcibios_default_alignment() for arch-specific alignment control
When VFIO passes through a PCI device to a guest, it does not allow the guest to mmap BARs that are smaller than PAGE_SIZE unless it can reserve the rest of the page (see vfio_pci_probe_mmaps()). This is because a page might contain several small BARs for unrelated devices and a guest should not be able to access all of them. VFIO emulates guest accesses to non-mappable BARs, which is functional but slow. On systems with large page sizes, e.g., PowerNV with 64K pages, BARs are more likely to share a page and performance is more likely to be a problem. Add a weak function to set default alignment for all PCI devices. An arch can override it to force the PCI core to place memory BARs on their own pages. Signed-off-by: Yongji Xie <elohimes@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
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Lukas Wunner
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ea00353f36 |
PCI: Freeze PME scan before suspending devices
Laurent Pinchart reported that the Renesas R-Car H2 Lager board (r8a7790)
crashes during suspend tests. Geert Uytterhoeven managed to reproduce the
issue on an M2-W Koelsch board (r8a7791):
It occurs when the PME scan runs, once per second. During PME scan, the
PCI host bridge (rcar-pci) registers are accessed while its module clock
has already been disabled, leading to the crash.
One reproducer is to configure s2ram to use "s2idle" instead of "deep"
suspend:
# echo 0 > /sys/module/printk/parameters/console_suspend
# echo s2idle > /sys/power/mem_sleep
# echo mem > /sys/power/state
Another reproducer is to write either "platform" or "processors" to
/sys/power/pm_test. It does not (or is less likely) to happen during full
system suspend ("core" or "none") because system suspend also disables
timers, and thus the workqueue handling PME scans no longer runs. Geert
believes the issue may still happen in the small window between disabling
module clocks and disabling timers:
# echo 0 > /sys/module/printk/parameters/console_suspend
# echo platform > /sys/power/pm_test # Or "processors"
# echo mem > /sys/power/state
(Make sure CONFIG_PCI_RCAR_GEN2 and CONFIG_USB_OHCI_HCD_PCI are enabled.)
Rafael Wysocki agrees that PME scans should be suspended before the host
bridge registers become inaccessible. To that end, queue the task on a
workqueue that gets frozen before devices suspend.
Rafael notes however that as a result, some wakeup events may be missed if
they are delivered via PME from a device without working IRQ (which hence
must be polled) and occur after the workqueue has been frozen. If that
turns out to be an issue in practice, it may be possible to solve it by
calling pci_pme_list_scan() once directly from one of the host bridge's
pm_ops callbacks.
Stacktrace for posterity:
PM: Syncing filesystems ... [ 38.566237] done.
PM: Preparing system for sleep (mem)
Freezing user space processes ... [ 38.579813] (elapsed 0.001 seconds) done.
Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
PM: Suspending system (mem)
PM: suspend of devices complete after 152.456 msecs
PM: late suspend of devices complete after 2.809 msecs
PM: noirq suspend of devices complete after 29.863 msecs
suspend debug: Waiting for 5 second(s).
Unhandled fault: asynchronous external abort (0x1211) at 0x00000000
pgd = c0003000
[00000000] *pgd=80000040004003, *pmd=00000000
Internal error: : 1211 [#1] SMP ARM
Modules linked in:
CPU: 1 PID: 20 Comm: kworker/1:1 Not tainted
4.9.0-rc1-koelsch-00011-g68db9bc814362e7f #3383
Hardware name: Generic R8A7791 (Flattened Device Tree)
Workqueue: events pci_pme_list_scan
task: eb56e140 task.stack: eb58e000
PC is at pci_generic_config_read+0x64/0x6c
LR is at rcar_pci_cfg_base+0x64/0x84
pc : [<c041d7b4>] lr : [<c04309a0>] psr: 600d0093
sp : eb58fe98 ip : c041d750 fp : 00000008
r10: c0e2283c r9 : 00000000 r8 : 600d0013
r7 : 00000008 r6 : eb58fed6 r5 : 00000002 r4 : eb58feb4
r3 : 00000000 r2 : 00000044 r1 : 00000008 r0 : 00000000
Flags: nZCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment user
Control: 30c5387d Table: 6a9f6c80 DAC: 55555555
Process kworker/1:1 (pid: 20, stack limit = 0xeb58e210)
Stack: (0xeb58fe98 to 0xeb590000)
fe80: 00000002 00000044
fea0: eb6f5800 c041d9b0 eb58feb4 00000008 00000044 00000000 eb78a000 eb78a000
fec0: 00000044 00000000 eb9aff00 c0424bf0 eb78a000 00000000 eb78a000 c0e22830
fee0: ea8a6fc0 c0424c5c eaae79c0 c0424ce0 eb55f380 c0e22838 eb9a9800 c0235fbc
ff00: eb55f380 c0e22838 eb55f380 eb9a9800 eb9a9800 eb58e000 eb9a9824 c0e02100
ff20: eb55f398 c02366c4 eb56e140 eb5631c0 00000000 eb55f380 c023641c 00000000
ff40: 00000000 00000000 00000000 c023a928 cd105598 00000000 40506a34 eb55f380
ff60: 00000000 00000000 dead4ead ffffffff ffffffff eb58ff74 eb58ff74 00000000
ff80: 00000000 dead4ead ffffffff ffffffff eb58ff90 eb58ff90 eb58ffac eb5631c0
ffa0: c023a844 00000000 00000000 c0206d68 00000000 00000000 00000000 00000000
ffc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
ffe0: 00000000 00000000 00000000 00000000 00000013 00000000 3a81336c 10ccd1dd
[<c041d7b4>] (pci_generic_config_read) from [<c041d9b0>]
(pci_bus_read_config_word+0x58/0x80)
[<c041d9b0>] (pci_bus_read_config_word) from [<c0424bf0>]
(pci_check_pme_status+0x34/0x78)
[<c0424bf0>] (pci_check_pme_status) from [<c0424c5c>] (pci_pme_wakeup+0x28/0x54)
[<c0424c5c>] (pci_pme_wakeup) from [<c0424ce0>] (pci_pme_list_scan+0x58/0xb4)
[<c0424ce0>] (pci_pme_list_scan) from [<c0235fbc>]
(process_one_work+0x1bc/0x308)
[<c0235fbc>] (process_one_work) from [<c02366c4>] (worker_thread+0x2a8/0x3e0)
[<c02366c4>] (worker_thread) from [<c023a928>] (kthread+0xe4/0xfc)
[<c023a928>] (kthread) from [<c0206d68>] (ret_from_fork+0x14/0x2c)
Code: ea000000 e5903000 f57ff04f e3a00000 (e5843000)
---[ end trace 667d43ba3aa9e589 ]---
Fixes:
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Yongji Xie
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ea629d873f |
PCI: Ignore requested alignment for IOV BARs
We would call pci_reassigndev_resource_alignment() before pci_init_capabilities(). So the requested alignment would never work for IOV BARs. Furthermore, it's meaningless to request additional alignment for IOV BARs, the IOV BAR alignment is only determined by the VF BAR size. Signed-off-by: Yongji Xie <xyjxie@linux.vnet.ibm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Gavin Shan <gwshan@linux.vnet.ibm.com> |
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Sasha Neftin
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f65fd1aa4f |
PCI: Avoid FLR for Intel 82579 NICs
Per Intel Specification Update 335553-002 (see link below), some 82579 network adapters advertise a Function Level Reset (FLR) capability, but they can hang when an FLR is triggered. To reproduce the problem, attach the device to a VM, then detach and try to attach again. Add a quirk to prevent the use of FLR on these devices. [bhelgaas: changelog, comments] Link: http://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/82579lm-82579v-gigabit-network-connection-spec-update.pdf Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
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Keith Busch
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fe2bd75b22 |
PCI: Short-circuit pci_device_is_present() for disconnected devices
If the PCI device is disconnected, return false immediately from pci_device_is_present(). pci_device_is_present() uses the bus accessors, so the early return in the device accessors doesn't help here. Tested-by: Krishna Dhulipala <krishnad@fb.com> Signed-off-by: Keith Busch <keith.busch@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Wei Zhang <wzhang@fb.com> |
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Adrian Hunter
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50b2b540c0 |
PCI/PM: Don't sleep at all when d3_delay or d3cold_delay is zero
msleep() still sleeps 1 jiffy even when told to sleep for zero milliseconds. That can end up being 1-2 milliseconds or more. In the cases of d3_delay and d3cold_delay, that unnecessarily increases suspend and/or resume latencies. Do not sleep at all for the respective cases if d3_delay is zero or d3cold_delay is zero. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
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Bjorn Helgaas
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d98e092907 |
Revert "PCI: pciehp: Add runtime PM support for PCIe hotplug ports"
This reverts commit |
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Bjorn Helgaas
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2583157141 |
Merge branch 'pci/virtualization' into next
* pci/virtualization: PCI: Add comments about ROM BAR updating PCI: Decouple IORESOURCE_ROM_ENABLE and PCI_ROM_ADDRESS_ENABLE PCI: Remove pci_resource_bar() and pci_iov_resource_bar() PCI: Don't update VF BARs while VF memory space is enabled PCI: Separate VF BAR updates from standard BAR updates PCI: Update BARs using property bits appropriate for type PCI: Ignore BAR updates on virtual functions PCI: Do any VF BAR updates before enabling the BARs PCI: Support INTx masking on ConnectX-4 with firmware x.14.1100+ PCI: Convert Mellanox broken INTx quirks to be for listed devices only PCI: Convert broken INTx masking quirks from HEADER to FINAL net/mlx4_core: Use device ID defines PCI: Add Mellanox device IDs |
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Bjorn Helgaas
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286c2378aa |
PCI: Remove pci_resource_bar() and pci_iov_resource_bar()
pci_std_update_resource() only deals with standard BARs, so we don't have to worry about the complications of VF BARs in an SR-IOV capability. Compute the BAR address inline and remove pci_resource_bar(). That makes pci_iov_resource_bar() unused, so remove that as well. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Gavin Shan <gwshan@linux.vnet.ibm.com> |
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Bjorn Helgaas
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63880b230a |
PCI: Ignore BAR updates on virtual functions
VF BARs are read-only zero, so updating VF BARs will not have any effect.
See the SR-IOV spec r1.1, sec 3.4.1.11.
We already ignore these updates because of
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Lukas Wunner
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68db9bc814 |
PCI: pciehp: Add runtime PM support for PCIe hotplug ports
Linux 4.8 added support for runtime suspending PCIe ports to D3hot with
commit
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Lukas Wunner
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718a0609ae |
PCI: Unfold conditions to block runtime PM on PCIe ports
The conditions to block D3 on parent ports are currently condensed into a single expression in pci_dev_check_d3cold(). Upcoming commits will add further conditions for hotplug ports, making this expression fairly large and impenetrable. Unfold the conditions to maintain readability when they are amended. No functional change intended. Signed-off-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Mika Westerberg <mika.westerberg@linux.intel.com> CC: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
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Lukas Wunner
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97a90aee5d |
PCI: Consolidate conditions to allow runtime PM on PCIe ports
The conditions to allow runtime PM on PCIe ports are currently spread across two different files: The condition relating to hotplug ports is located in portdrv_pci.c whereas all other conditions are located in pci.c. Consolidate all conditions in a single place in pci.c, thus making it easier to follow the logic and amend conditions down the road. Note that the condition relating to hotplug ports is inserted *before* the condition relating to the "pcie_port_pm=force" command line option, so runtime PM is not afforded to hotplug ports even if this option is given. That's exactly how the code behaved up until now. If this is not desired, the ordering of the conditions can simply be reversed. No functional change intended. Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
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Lukas Wunner
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c6a6330706 |
PCI: Activate runtime PM on a PCIe port only if it can suspend
Currently pcie_portdrv_probe() activates runtime PM on a PCIe port even if it will never actually suspend because the BIOS is too old or the "pcie_port_pm=off" option was specified on the kernel command line. A few CPU cycles can be saved by not activating runtime PM at all in these cases, because rpm_idle() and rpm_suspend() will bail out right at the beginning when calling rpm_check_suspend_allowed(), instead of carrying out various locking and assignments, invoking rpm_callback(), getting back -EBUSY and rolling everything back. The conditions checked in pci_bridge_d3_possible() are all static, they never change during uptime of the system, hence it's safe to call this to determine if runtime PM should be activated. No functional change intended. Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
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Lukas Wunner
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e8559b7100 |
PCI: Speed up algorithm in pci_bridge_d3_update()
After a device has been added, removed or had its D3cold attributes
changed, we recheck whether its parent bridge may runtime suspend to D3hot
with pci_bridge_d3_update().
The most naive algorithm would be to iterate over the bridge's children and
check if any of them are blocking D3.
The function already tries to be a bit smarter than that by first checking
the device that was changed. If this device already blocks D3 on the
bridge, then walking over all the other children can be skipped. A
drawback of this approach is that if the device is *not* blocking D3, it
will be checked a second time by pci_walk_bus(). But that's cheap and is
outweighed by the performance gain of potentially skipping pci_walk_bus()
altogether.
The algorithm can be optimized further by taking into account if D3 is
currently allowed for the bridge, as shown in the following truth table:
(a) remove && bridge_d3: D3 is currently allowed for the bridge and
removing one of its children won't change
that. No action necessary.
(b) remove && !bridge_d3: D3 may now be allowed for the bridge if the
removed child was the only one blocking it.
Check all its siblings to verify that.
(c) !remove && bridge_d3: D3 may now be disallowed but this can only
be caused by the added/changed child, not
any of its siblings. Check only that single
device.
(d) !remove && !bridge_d3: D3 may now be allowed for the bridge if the
changed child was the only one blocking it.
Check all its siblings to verify that.
By checking beforehand if the changed child
is blocking D3, we may be able to skip
checking its siblings.
Currently we do not special-case option (a) and in case of option (c) we
gratuitously call pci_walk_bus(). Speed up the algorithm by adding these
optimizations. Reword the comments a bit in an attempt to improve clarity.
No functional change intended.
Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Lukas Wunner
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1ed276a7b9 |
PCI: Autosense device removal in pci_bridge_d3_update()
The algorithm to update the flag indicating whether a bridge may go to D3 makes a few optimizations based on whether the update was caused by the removal of a device on the one hand, versus the addition of a device or the change of its D3cold flags on the other hand. The information whether the update pertains to a removal is currently passed in by the caller, but the function may as well determine that itself by examining the device in question, thereby allowing for a considerable simplification and reduction of the code. Out of several options to determine removal, I've chosen the function device_is_registered() because it's cheap: It merely returns the dev->kobj.state_in_sysfs flag. That flag is set through device_add() when the root bus is scanned and cleared through device_remove(). The call to pci_bridge_d3_update() happens after each of these calls, respectively, so the ordering is correct. No functional change intended. Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
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Lukas Wunner
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738a7edbfc |
PCI: Don't acquire ref on parent in pci_bridge_d3_update()
This function is always called with an existing pci_dev struct, which holds a reference on the pci_bus struct it resides on, which in turn holds a reference on pci_bus->bridge, which is the pci_dev's parent. Hence there's no need to acquire an additional ref on the parent. More specifically, the pci_dev exists until pci_destroy_dev() drops the final reference on it, so all calls to pci_bridge_d3_update() must be finished before that. It is arguably the caller's responsibility to ensure that it doesn't call pci_bridge_d3_update() with a pci_dev that might suddenly disappear, but in any case the existing callers are all safe: - The call in pci_destroy_dev() happens before the call to put_device(). - The call in pci_bus_add_device() is synchronized with pci_destroy_dev() using pci_lock_rescan_remove(). - The calls to pci_d3cold_disable() from the xhci and nouveau drivers are safe because a ref on the pci_dev is held as long as it's bound to a driver. - The calls to pci_d3cold_enable() / pci_d3cold_disable() when modifying the sysfs "d3cold_allowed" entry are also safe because kernfs_drain() waits for existing sysfs users to finish before removing the entry, and pci_destroy_dev() is called way after that. No functional change intended. Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
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Alan Stern
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6496ebd7ed |
PCI: Check for PME in targeted sleep state
One some systems, the firmware does not allow certain PCI devices to be put in deep D-states. This can cause problems for wakeup signalling, if the device does not support PME# in the deepest allowed suspend state. For example, Pierre reports that on his system, ACPI does not permit his xHCI host controller to go into D3 during runtime suspend -- but D3 is the only state in which the controller can generate PME# signals. As a result, the controller goes into runtime suspend but never wakes up, so it doesn't work properly. USB devices plugged into the controller are never detected. If the device relies on PME# for wakeup signals but is not capable of generating PME# in the target state, the PCI core should accurately report that it cannot do wakeup from runtime suspend. This patch modifies the pci_dev_run_wake() routine to add this check. Reported-by: Pierre de Villemereuil <flyos@mailoo.org> Tested-by: Pierre de Villemereuil <flyos@mailoo.org> Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> CC: stable@vger.kernel.org CC: Lukas Wunner <lukas@wunner.de> |
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Linus Torvalds
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e6e3d8f8f4 |
PCI changes for the v4.9 merge window:
Enumeration
microblaze: Add multidomain support for procfs (Bharat Kumar Gogada)
Resource management
Ignore requested alignment for PROBE_ONLY and fixed resources (Yongji Xie)
Ignore requested alignment for VF BARs (Yongji Xie)
PCI device hotplug
Make core explicitly non-modular (Paul Gortmaker)
PCIe native device hotplug
Rename pcie_isr() locals for clarity (Bjorn Helgaas)
Return IRQ_NONE when we can't read interrupt status (Bjorn Helgaas)
Remove unnecessary guard (Bjorn Helgaas)
Clean up dmesg "Slot(%s)" messages (Bjorn Helgaas)
Remove useless pciehp_get_latch_status() calls (Bjorn Helgaas)
Clear attention LED on device add (Keith Busch)
Allow exclusive userspace control of indicators (Keith Busch)
Process all hotplug events before looking for new ones (Mayurkumar Patel)
Don't re-read Slot Status when queuing hotplug event (Mayurkumar Patel)
Don't re-read Slot Status when handling surprise event (Mayurkumar Patel)
Make explicitly non-modular (Paul Gortmaker)
Power management
Afford direct-complete to devices with non-standard PM (Lukas Wunner)
Query platform firmware for device power state (Lukas Wunner)
Recognize D3cold in pci_update_current_state() (Lukas Wunner)
Avoid unnecessary resume after direct-complete (Lukas Wunner)
Make explicitly non-modular (Paul Gortmaker)
Virtualization
Mark Atheros AR9580 to avoid bus reset (Maik Broemme)
Check for pci_setup_device() failure in pci_iov_add_virtfn() (Po Liu)
MSI
Enable PCI_MSI_IRQ_DOMAIN support for ARC (Joao Pinto)
AER
Remove aerdriver.nosourceid kernel parameter (Bjorn Helgaas)
Remove aerdriver.forceload kernel parameter (Bjorn Helgaas)
Fix aer_probe() kernel-doc comment (Cao jin)
Add bus flag to skip source ID matching (Jon Derrick)
Avoid memory allocation in interrupt handling path (Jon Derrick)
Cache capability position (Keith Busch)
Make explicitly non-modular (Paul Gortmaker)
Remove duplicate AER severity translation (Tyler Baicar)
Send correct severity to calculate AER severity (Tyler Baicar)
Precision Time Measurement
Add Precision Time Measurement (PTM) support (Jonathan Yong)
Add PTM clock granularity information (Bjorn Helgaas)
Add pci_enable_ptm() for drivers to enable PTM on endpoints (Bjorn Helgaas)
Generic host bridge driver
Fix pci_remap_iospace() failure path (Lorenzo Pieralisi)
Make explicitly non-modular (Paul Gortmaker)
Altera host bridge driver
Remove redundant platform_get_resource() return value check (Bjorn Helgaas)
Poll for link training status after retraining the link (Ley Foon Tan)
Rework config accessors for use without a struct pci_bus (Ley Foon Tan)
Move retrain from fixup to altera_pcie_host_init() (Ley Foon Tan)
Make MSI explicitly non-modular (Paul Gortmaker)
Make explicitly non-modular (Paul Gortmaker)
Relax device number checking to allow SR-IOV (Po Liu)
ARM Versatile host bridge driver
Fix pci_remap_iospace() failure path (Lorenzo Pieralisi)
Axis ARTPEC-6 host bridge driver
Drop __init from artpec6_add_pcie_port() (Niklas Cassel)
Freescale i.MX6 host bridge driver
Make explicitly non-modular (Paul Gortmaker)
Intel VMD host bridge driver
Add quirk for AER to ignore source ID (Jon Derrick)
Allocate IRQ lists with correct MSI-X count (Jon Derrick)
Convert to use pci_alloc_irq_vectors() API (Jon Derrick)
Eliminate vmd_vector member from list type (Jon Derrick)
Eliminate index member from IRQ list (Jon Derrick)
Synchronize with RCU freeing MSI IRQ descs (Keith Busch)
Request userspace control of PCIe hotplug indicators (Keith Busch)
Move VMD driver to drivers/pci/host (Keith Busch)
Marvell Aardvark host bridge driver
Fix pci_remap_iospace() failure path (Lorenzo Pieralisi)
Remove redundant dev_err call in advk_pcie_probe() (Wei Yongjun)
Microsoft Hyper-V host bridge driver
Use zero-length array in struct pci_packet (Dexuan Cui)
Use pci_function_description[0] in struct definitions (Dexuan Cui)
Remove the unused 'wrk' in struct hv_pcibus_device (Dexuan Cui)
Handle vmbus_sendpacket() failure in hv_compose_msi_msg() (Dexuan Cui)
Handle hv_pci_generic_compl() error case (Dexuan Cui)
Use list_move_tail() instead of list_del() + list_add_tail() (Wei Yongjun)
NVIDIA Tegra host bridge driver
Fix pci_remap_iospace() failure path (Lorenzo Pieralisi)
Remove redundant _data suffix (Thierry Reding)
Use of_device_get_match_data() (Thierry Reding)
Qualcomm host bridge driver
Make explicitly non-modular (Paul Gortmaker)
Renesas R-Car host bridge driver
Consolidate register space lookup and ioremap (Bjorn Helgaas)
Don't disable/unprepare clocks on prepare/enable failure (Geert Uytterhoeven)
Add multi-MSI support (Grigory Kletsko)
Fix pci_remap_iospace() failure path (Lorenzo Pieralisi)
Fix some checkpatch warnings (Sergei Shtylyov)
Try increasing PCIe link speed to 5 GT/s at boot (Sergei Shtylyov)
Rockchip host bridge driver
Add DT bindings for Rockchip PCIe controller (Shawn Lin)
Add Rockchip PCIe controller support (Shawn Lin)
Improve the deassert sequence of four reset pins (Shawn Lin)
Fix wrong transmitted FTS count (Shawn Lin)
Increase the Max Credit update interval (Rajat Jain)
Samsung Exynos host bridge driver
Make explicitly non-modular (Paul Gortmaker)
ST Microelectronics SPEAr13xx host bridge driver
Make explicitly non-modular (Paul Gortmaker)
Synopsys DesignWare host bridge driver
Return data directly from dw_pcie_readl_rc() (Bjorn Helgaas)
Exchange viewport of `MEMORYs' and `CFGs/IOs' (Dong Bo)
Check LTSSM training bit before deciding link is up (Jisheng Zhang)
Move link wait definitions to .c file (Joao Pinto)
Wait for iATU enable (Joao Pinto)
Add iATU Unroll feature (Joao Pinto)
Fix pci_remap_iospace() failure path (Lorenzo Pieralisi)
Make explicitly non-modular (Paul Gortmaker)
Relax device number checking to allow SR-IOV (Po Liu)
Keep viewport fixed for IO transaction if num_viewport > 2 (Pratyush Anand)
Remove redundant platform_get_resource() return value check (Wei Yongjun)
TI DRA7xx host bridge driver
Make explicitly non-modular (Paul Gortmaker)
TI Keystone host bridge driver
Propagate request_irq() failure (Wei Yongjun)
Xilinx AXI host bridge driver
Keep both legacy and MSI interrupt domain references (Bharat Kumar Gogada)
Clear interrupt register for invalid interrupt (Bharat Kumar Gogada)
Clear correct MSI set bit (Bharat Kumar Gogada)
Dispose of MSI virtual IRQ (Bharat Kumar Gogada)
Make explicitly non-modular (Paul Gortmaker)
Relax device number checking to allow SR-IOV (Po Liu)
Xilinx NWL host bridge driver
Expand error logging (Bharat Kumar Gogada)
Enable all MSI interrupts using MSI mask (Bharat Kumar Gogada)
Make explicitly non-modular (Paul Gortmaker)
Miscellaneous
Drop CONFIG_KEXEC_CORE ifdeffery (Lukas Wunner)
portdrv: Make explicitly non-modular (Paul Gortmaker)
Make DPC explicitly non-modular (Paul Gortmaker)
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Merge tag 'pci-v4.9-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI updates from Bjorn Helgaas:
"Summary of PCI changes for the v4.9 merge window:
Enumeration:
- microblaze: Add multidomain support for procfs (Bharat Kumar Gogada)
Resource management:
- Ignore requested alignment for PROBE_ONLY and fixed resources (Yongji Xie)
- Ignore requested alignment for VF BARs (Yongji Xie)
PCI device hotplug:
- Make core explicitly non-modular (Paul Gortmaker)
PCIe native device hotplug:
- Rename pcie_isr() locals for clarity (Bjorn Helgaas)
- Return IRQ_NONE when we can't read interrupt status (Bjorn Helgaas)
- Remove unnecessary guard (Bjorn Helgaas)
- Clean up dmesg "Slot(%s)" messages (Bjorn Helgaas)
- Remove useless pciehp_get_latch_status() calls (Bjorn Helgaas)
- Clear attention LED on device add (Keith Busch)
- Allow exclusive userspace control of indicators (Keith Busch)
- Process all hotplug events before looking for new ones (Mayurkumar Patel)
- Don't re-read Slot Status when queuing hotplug event (Mayurkumar Patel)
- Don't re-read Slot Status when handling surprise event (Mayurkumar Patel)
- Make explicitly non-modular (Paul Gortmaker)
Power management:
- Afford direct-complete to devices with non-standard PM (Lukas Wunner)
- Query platform firmware for device power state (Lukas Wunner)
- Recognize D3cold in pci_update_current_state() (Lukas Wunner)
- Avoid unnecessary resume after direct-complete (Lukas Wunner)
- Make explicitly non-modular (Paul Gortmaker)
Virtualization:
- Mark Atheros AR9580 to avoid bus reset (Maik Broemme)
- Check for pci_setup_device() failure in pci_iov_add_virtfn() (Po Liu)
MSI:
- Enable PCI_MSI_IRQ_DOMAIN support for ARC (Joao Pinto)
AER:
- Remove aerdriver.nosourceid kernel parameter (Bjorn Helgaas)
- Remove aerdriver.forceload kernel parameter (Bjorn Helgaas)
- Fix aer_probe() kernel-doc comment (Cao jin)
- Add bus flag to skip source ID matching (Jon Derrick)
- Avoid memory allocation in interrupt handling path (Jon Derrick)
- Cache capability position (Keith Busch)
- Make explicitly non-modular (Paul Gortmaker)
- Remove duplicate AER severity translation (Tyler Baicar)
- Send correct severity to calculate AER severity (Tyler Baicar)
Precision Time Measurement:
- Add Precision Time Measurement (PTM) support (Jonathan Yong)
- Add PTM clock granularity information (Bjorn Helgaas)
- Add pci_enable_ptm() for drivers to enable PTM on endpoints (Bjorn Helgaas)
Generic host bridge driver:
- Fix pci_remap_iospace() failure path (Lorenzo Pieralisi)
- Make explicitly non-modular (Paul Gortmaker)
Altera host bridge driver:
- Remove redundant platform_get_resource() return value check (Bjorn Helgaas)
- Poll for link training status after retraining the link (Ley Foon Tan)
- Rework config accessors for use without a struct pci_bus (Ley Foon Tan)
- Move retrain from fixup to altera_pcie_host_init() (Ley Foon Tan)
- Make MSI explicitly non-modular (Paul Gortmaker)
- Make explicitly non-modular (Paul Gortmaker)
- Relax device number checking to allow SR-IOV (Po Liu)
ARM Versatile host bridge driver:
- Fix pci_remap_iospace() failure path (Lorenzo Pieralisi)
Axis ARTPEC-6 host bridge driver:
- Drop __init from artpec6_add_pcie_port() (Niklas Cassel)
Freescale i.MX6 host bridge driver:
- Make explicitly non-modular (Paul Gortmaker)
Intel VMD host bridge driver:
- Add quirk for AER to ignore source ID (Jon Derrick)
- Allocate IRQ lists with correct MSI-X count (Jon Derrick)
- Convert to use pci_alloc_irq_vectors() API (Jon Derrick)
- Eliminate vmd_vector member from list type (Jon Derrick)
- Eliminate index member from IRQ list (Jon Derrick)
- Synchronize with RCU freeing MSI IRQ descs (Keith Busch)
- Request userspace control of PCIe hotplug indicators (Keith Busch)
- Move VMD driver to drivers/pci/host (Keith Busch)
Marvell Aardvark host bridge driver:
- Fix pci_remap_iospace() failure path (Lorenzo Pieralisi)
- Remove redundant dev_err call in advk_pcie_probe() (Wei Yongjun)
Microsoft Hyper-V host bridge driver:
- Use zero-length array in struct pci_packet (Dexuan Cui)
- Use pci_function_description[0] in struct definitions (Dexuan Cui)
- Remove the unused 'wrk' in struct hv_pcibus_device (Dexuan Cui)
- Handle vmbus_sendpacket() failure in hv_compose_msi_msg() (Dexuan Cui)
- Handle hv_pci_generic_compl() error case (Dexuan Cui)
- Use list_move_tail() instead of list_del() + list_add_tail() (Wei Yongjun)
NVIDIA Tegra host bridge driver:
- Fix pci_remap_iospace() failure path (Lorenzo Pieralisi)
- Remove redundant _data suffix (Thierry Reding)
- Use of_device_get_match_data() (Thierry Reding)
Qualcomm host bridge driver:
- Make explicitly non-modular (Paul Gortmaker)
Renesas R-Car host bridge driver:
- Consolidate register space lookup and ioremap (Bjorn Helgaas)
- Don't disable/unprepare clocks on prepare/enable failure (Geert Uytterhoeven)
- Add multi-MSI support (Grigory Kletsko)
- Fix pci_remap_iospace() failure path (Lorenzo Pieralisi)
- Fix some checkpatch warnings (Sergei Shtylyov)
- Try increasing PCIe link speed to 5 GT/s at boot (Sergei Shtylyov)
Rockchip host bridge driver:
- Add DT bindings for Rockchip PCIe controller (Shawn Lin)
- Add Rockchip PCIe controller support (Shawn Lin)
- Improve the deassert sequence of four reset pins (Shawn Lin)
- Fix wrong transmitted FTS count (Shawn Lin)
- Increase the Max Credit update interval (Rajat Jain)
Samsung Exynos host bridge driver:
- Make explicitly non-modular (Paul Gortmaker)
ST Microelectronics SPEAr13xx host bridge driver:
- Make explicitly non-modular (Paul Gortmaker)
Synopsys DesignWare host bridge driver:
- Return data directly from dw_pcie_readl_rc() (Bjorn Helgaas)
- Exchange viewport of `MEMORYs' and `CFGs/IOs' (Dong Bo)
- Check LTSSM training bit before deciding link is up (Jisheng Zhang)
- Move link wait definitions to .c file (Joao Pinto)
- Wait for iATU enable (Joao Pinto)
- Add iATU Unroll feature (Joao Pinto)
- Fix pci_remap_iospace() failure path (Lorenzo Pieralisi)
- Make explicitly non-modular (Paul Gortmaker)
- Relax device number checking to allow SR-IOV (Po Liu)
- Keep viewport fixed for IO transaction if num_viewport > 2 (Pratyush Anand)
- Remove redundant platform_get_resource() return value check (Wei Yongjun)
TI DRA7xx host bridge driver:
- Make explicitly non-modular (Paul Gortmaker)
TI Keystone host bridge driver:
- Propagate request_irq() failure (Wei Yongjun)
Xilinx AXI host bridge driver:
- Keep both legacy and MSI interrupt domain references (Bharat Kumar Gogada)
- Clear interrupt register for invalid interrupt (Bharat Kumar Gogada)
- Clear correct MSI set bit (Bharat Kumar Gogada)
- Dispose of MSI virtual IRQ (Bharat Kumar Gogada)
- Make explicitly non-modular (Paul Gortmaker)
- Relax device number checking to allow SR-IOV (Po Liu)
Xilinx NWL host bridge driver:
- Expand error logging (Bharat Kumar Gogada)
- Enable all MSI interrupts using MSI mask (Bharat Kumar Gogada)
- Make explicitly non-modular (Paul Gortmaker)
Miscellaneous:
- Drop CONFIG_KEXEC_CORE ifdeffery (Lukas Wunner)
- portdrv: Make explicitly non-modular (Paul Gortmaker)
- Make DPC explicitly non-modular (Paul Gortmaker)"
* tag 'pci-v4.9-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (105 commits)
x86/PCI: VMD: Move VMD driver to drivers/pci/host
PCI: rockchip: Fix wrong transmitted FTS count
PCI: rockchip: Improve the deassert sequence of four reset pins
PCI: rockchip: Increase the Max Credit update interval
PCI: rcar: Try increasing PCIe link speed to 5 GT/s at boot
PCI/AER: Fix aer_probe() kernel-doc comment
PCI: Ignore requested alignment for VF BARs
PCI: Ignore requested alignment for PROBE_ONLY and fixed resources
PCI: Avoid unnecessary resume after direct-complete
PCI: Recognize D3cold in pci_update_current_state()
PCI: Query platform firmware for device power state
PCI: Afford direct-complete to devices with non-standard PM
PCI/AER: Cache capability position
PCI/AER: Avoid memory allocation in interrupt handling path
x86/PCI: VMD: Request userspace control of PCIe hotplug indicators
PCI: pciehp: Allow exclusive userspace control of indicators
ACPI / APEI: Send correct severity to calculate AER severity
PCI/AER: Remove duplicate AER severity translation
x86/PCI: VMD: Synchronize with RCU freeing MSI IRQ descs
x86/PCI: VMD: Eliminate index member from IRQ list
...
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Bjorn Helgaas
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e15194d2a7 |
Merge branch 'pci/resource' into next
* pci/resource: PCI: Ignore requested alignment for VF BARs PCI: Ignore requested alignment for PROBE_ONLY and fixed resources |
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Yongji Xie
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62d9a78f32 |
PCI: Ignore requested alignment for VF BARs
Resource allocation for VFs is done via the VF BARx registers in the PF's SR-IOV Capability, and the BARs in the VFs themselves are read-only zeros (see SR-IOV spec r1.1, secs 3.3.14 and 3.4.1.11). Even though the actual VF BARs are read-only zeros, the VF dev->resource[] structs describe the space allocated for the VF (this is a piece of the space described by the VF BARx register in the PF's SR-IOV capability). It's meaningless to request additional alignment for a VF: the VF BAR alignment is completely determined by the alignment of the VF BARx in the PF and the size of the VF BAR. Ignore the user's alignment requests for VF devices. Signed-off-by: Yongji Xie <xyjxie@linux.vnet.ibm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
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Yongji Xie
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f0b99f70e9 |
PCI: Ignore requested alignment for PROBE_ONLY and fixed resources
Users may request additional alignment of PCI resources, e.g., to align BARs on page boundaries so they can be shared with guests via VFIO. This of course may require reallocation if firmware has already assigned the BARs with smaller alignments. If the platform has requested PCI_PROBE_ONLY, we should never change any PCI BARs, so we can't provide any additional alignment. Also, if a BAR is marked as IORESOURCE_PCI_FIXED, e.g., for PCI Enhanced Allocation or if the firmware depends on the current BAR value, we can't change the alignment. In these cases, log a message and ignore the user's alignment requests. [bhelgaas: changelog, use goto to simplify PCI_PROBE_ONLY check] Signed-off-by: Yongji Xie <xyjxie@linux.vnet.ibm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
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Lukas Wunner
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a6a64026c0 |
PCI: Recognize D3cold in pci_update_current_state()
Whenever a device is resumed or its power state is changed using the platform, its new power state is read from the PM Control & Status Register and cached in pci_dev->current_state by calling pci_update_current_state(). If the device is in D3cold, reading from config space typically results in a fabricated "all ones" response. But if it's in D3hot, the two bits representing the power state in the PMCSR are *also* set to 1. Thus D3hot and D3cold are not discernible by just reading the PMCSR. To account for this, pci_update_current_state() uses two workarounds: - When transitioning to D3cold using pci_platform_power_transition(), the new power state is set blindly by pci_update_current_state(), i.e. without verifying that the device actually *is* in D3cold. This is achieved by setting the "state" argument to PCI_D3cold. The "state" argument was originally intended to convey the new state in case the device doesn't have the PM capability. It is *also* used to convey the device state if the PM capability is present and the new state is D3cold, but this was never explained in the kerneldoc. - Once the current_state is set to D3cold, further invocations of pci_update_current_state() will blindly assume that the device is still in D3cold and leave the current_state unmodified. To get out of this impasse, the current_state has to be set directly, typically by calling pci_raw_set_power_state() or pci_enable_device(). It would be desirable if pci_update_current_state() could reliably detect D3cold by itself. That would allow us to do away with these workarounds, and it would allow for a smarter, more energy conserving runtime resume strategy after system sleep: Currently devices which utilize direct_complete are mandatorily runtime resumed in their ->complete stage. This can be avoided if their power state after system sleep is the same as before, but it requires a mechanism to detect the power state reliably. We've just gained the ability to query the platform firmware for its opinion on the device's power state. On platforms conforming to ACPI 4.0 or newer, this allows recognition of D3cold. Pre-4.0 platforms lack _PR3 and therefore the deepest power state that will ever be reported is D3hot, even though the device may actually be in D3cold. To detect D3cold in those cases, accessibility of the vendor ID in config space is probed using pci_device_is_present(). This also works for devices which are not platform-power-manageable at all, but can be suspended to D3cold using a nonstandard mechanism (e.g. some hybrid graphics laptops or Thunderbolt on the Mac). Signed-off-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
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Lukas Wunner
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cc7cc02bad |
PCI: Query platform firmware for device power state
Usually the most accurate way to determine a PCI device's power state is to read its PM Control & Status Register. There are two cases however when this is not an option: If the device doesn't have the PM capability at all, or if it is in D3cold (in which case its config space is inaccessible). In both cases, we can alternatively query the platform firmware for its opinion on the device's power state. To facilitate this, augment struct pci_platform_pm_ops with a ->get_power callback and implement it for acpi_pci_platform_pm (the only pci_platform_pm_ops existing so far). It is used by a forthcoming commit to let pci_update_current_state() recognize D3cold. Signed-off-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
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Lukas Wunner
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4132a577a0 |
PCI: Afford direct-complete to devices with non-standard PM
There are devices not power-manageable by the platform, but still able to runtime suspend to D3cold with a non-standard mechanism. One example is laptop hybrid graphics where the discrete GPU and its built-in HDA controller are power-managed either with a _DSM (AMD PowerXpress, Nvidia Optimus) or a separate gmux controller (MacBook Pro). Another example is Thunderbolt on Macs which is power-managed with custom ACPI methods. When putting the system to sleep, we currently handle such devices improperly by transitioning them from D3cold to D3hot (the default power state defined at the top of pci_target_state()). This wastes energy and prolongs the suspend sequence (powering up the Thunderbolt controller takes 2 seconds). Avoid that by assuming that a non-standard PM mechanism is at work if the device is not platform-power-manageable but currently in D3cold. If the device is wakeup enabled, we might still have to wake it up from D3cold if PME cannot be signaled from that power state. The check for devices without PM capability comes before the check for D3cold since such devices could in theory also be powered down by non-standard means and should then be afforded direct-complete as well. Signed-off-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
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Mika Westerberg
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afd29f9017 |
PCI: Add pci_find_resource()
Add a new helper function pci_find_resource() that can be used to find out whether a given resource (for example from a child device) is contained within given PCI device's standard resources. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
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Linus Torvalds
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c8d0267efd |
PCI changes for the v4.8 merge window:
Enumeration
Move ecam.h to linux/include/pci-ecam.h (Jayachandran C)
Add parent device field to ECAM struct pci_config_window (Jayachandran C)
Add generic MCFG table handling (Tomasz Nowicki)
Refactor pci_bus_assign_domain_nr() for CONFIG_PCI_DOMAINS_GENERIC (Tomasz Nowicki)
Factor DT-specific pci_bus_find_domain_nr() code out (Tomasz Nowicki)
Resource management
Add devm_request_pci_bus_resources() (Bjorn Helgaas)
Unify pci_resource_to_user() declarations (Bjorn Helgaas)
Implement pci_resource_to_user() with pcibios_resource_to_bus() (microblaze, powerpc, sparc) (Bjorn Helgaas)
Request host bridge window resources (designware, iproc, rcar, xgene, xilinx, xilinx-nwl) (Bjorn Helgaas)
Make PCI I/O space optional on ARM32 (Bjorn Helgaas)
Ignore write combining when mapping I/O port space (Bjorn Helgaas)
Claim bus resources on MIPS PCI_PROBE_ONLY set-ups (Bjorn Helgaas)
Remove unicore32 pci=firmware command line parameter handling (Bjorn Helgaas)
Support I/O resources when parsing host bridge resources (Jayachandran C)
Add helpers to request/release memory and I/O regions (Johannes Thumshirn)
Use pci_(request|release)_mem_regions (NVMe, lpfc, GenWQE, ethernet/intel, alx) (Johannes Thumshirn)
Extend pci=resource_alignment to specify device/vendor IDs (Koehrer Mathias (ETAS/ESW5))
Add generic pci_bus_claim_resources() (Lorenzo Pieralisi)
Claim bus resources on ARM32 PCI_PROBE_ONLY set-ups (Lorenzo Pieralisi)
Remove ARM32 and ARM64 arch-specific pcibios_enable_device() (Lorenzo Pieralisi)
Add pci_unmap_iospace() to unmap I/O resources (Sinan Kaya)
Remove powerpc __pci_mmap_set_pgprot() (Yinghai Lu)
PCI device hotplug
Allow additional bus numbers for hotplug bridges (Keith Busch)
Ignore interrupts during D3cold (Lukas Wunner)
Power management
Enforce type casting for pci_power_t (Andy Shevchenko)
Don't clear d3cold_allowed for PCIe ports (Mika Westerberg)
Put PCIe ports into D3 during suspend (Mika Westerberg)
Power on bridges before scanning new devices (Mika Westerberg)
Runtime resume bridge before rescan (Mika Westerberg)
Add runtime PM support for PCIe ports (Mika Westerberg)
Remove redundant check of pcie_set_clkpm (Shawn Lin)
Virtualization
Add function 1 DMA alias quirk for Marvell 88SE9182 (Aaron Sierra)
Add DMA alias quirk for Adaptec 3805 (Alex Williamson)
Mark Atheros AR9485 and QCA9882 to avoid bus reset (Chris Blake)
Add ACS quirk for Solarflare SFC9220 (Edward Cree)
MSI
Fix PCI_MSI dependencies (Arnd Bergmann)
Add pci_msix_desc_addr() helper (Christoph Hellwig)
Switch msix_program_entries() to use pci_msix_desc_addr() (Christoph Hellwig)
Make the "entries" argument to pci_enable_msix() optional (Christoph Hellwig)
Provide sensible IRQ vector alloc/free routines (Christoph Hellwig)
Spread interrupt vectors in pci_alloc_irq_vectors() (Christoph Hellwig)
Error Handling
Bind DPC to Root Ports as well as Downstream Ports (Keith Busch)
Remove DPC tristate module option (Keith Busch)
Convert Downstream Port Containment driver to use devm_* functions (Mika Westerberg)
Generic host bridge driver
Select IRQ_DOMAIN (Arnd Bergmann)
Claim bus resources on PCI_PROBE_ONLY set-ups (Lorenzo Pieralisi)
ACPI host bridge driver
Add ARM64 acpi_pci_bus_find_domain_nr() (Tomasz Nowicki)
Add ARM64 ACPI support for legacy IRQs parsing and consolidation with DT code (Tomasz Nowicki)
Implement ARM64 AML accessors for PCI_Config region (Tomasz Nowicki)
Support ARM64 ACPI-based PCI host controller (Tomasz Nowicki)
Altera host bridge driver
Check link status before retrain link (Ley Foon Tan)
Poll for link up status after retraining the link (Ley Foon Tan)
Axis ARTPEC-6 host bridge driver
Add PCI_MSI_IRQ_DOMAIN dependency (Arnd Bergmann)
Add DT binding for Axis ARTPEC-6 PCIe controller (Niklas Cassel)
Add Axis ARTPEC-6 PCIe controller driver (Niklas Cassel)
Intel VMD host bridge driver
Use lock save/restore in interrupt enable path (Jon Derrick)
Select device dma ops to override (Keith Busch)
Initialize list item in IRQ disable (Keith Busch)
Use x86_vector_domain as parent domain (Keith Busch)
Separate MSI and MSI-X vector sharing (Keith Busch)
Marvell Aardvark host bridge driver
Add DT binding for the Aardvark PCIe controller (Thomas Petazzoni)
Add Aardvark PCI host controller driver (Thomas Petazzoni)
Add Aardvark PCIe support for Armada 3700 (Thomas Petazzoni)
Microsoft Hyper-V host bridge driver
Fix interrupt cleanup path (Cathy Avery)
Don't leak buffer in hv_pci_onchannelcallback() (Vitaly Kuznetsov)
Handle all pending messages in hv_pci_onchannelcallback() (Vitaly Kuznetsov)
NVIDIA Tegra host bridge driver
Program PADS_REFCLK_CFG* always, not just on legacy SoCs (Stephen Warren)
Program PADS_REFCLK_CFG* registers with per-SoC values (Stephen Warren)
Use lower-case hex consistently for register definitions (Thierry Reding)
Use generic pci_remap_iospace() rather than ARM32-specific one (Thierry Reding)
Stop setting pcibios_min_mem (Thierry Reding)
Renesas R-Car host bridge driver
Drop gen2 dummy I/O port region (Bjorn Helgaas)
TI DRA7xx host bridge driver
Fix return value in case of error (Christophe JAILLET)
Xilinx AXI host bridge driver
Fix return value in case of error (Christophe JAILLET)
Miscellaneous
Make bus_attr_resource_alignment static (Ben Dooks)
Include <asm/dma.h> for isa_dma_bridge_buggy (Ben Dooks)
MAINTAINERS: Add file patterns for PCI device tree bindings (Geert Uytterhoeven)
Make host bridge drivers explicitly non-modular (Paul Gortmaker)
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Merge tag 'pci-v4.8-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI updates from Bjorn Helgaas:
"Highlights:
- ARM64 support for ACPI host bridges
- new drivers for Axis ARTPEC-6 and Marvell Aardvark
- new pci_alloc_irq_vectors() interface for MSI-X, MSI, legacy INTx
- pci_resource_to_user() cleanup (more to come)
Detailed summary:
Enumeration:
- Move ecam.h to linux/include/pci-ecam.h (Jayachandran C)
- Add parent device field to ECAM struct pci_config_window (Jayachandran C)
- Add generic MCFG table handling (Tomasz Nowicki)
- Refactor pci_bus_assign_domain_nr() for CONFIG_PCI_DOMAINS_GENERIC (Tomasz Nowicki)
- Factor DT-specific pci_bus_find_domain_nr() code out (Tomasz Nowicki)
Resource management:
- Add devm_request_pci_bus_resources() (Bjorn Helgaas)
- Unify pci_resource_to_user() declarations (Bjorn Helgaas)
- Implement pci_resource_to_user() with pcibios_resource_to_bus() (microblaze, powerpc, sparc) (Bjorn Helgaas)
- Request host bridge window resources (designware, iproc, rcar, xgene, xilinx, xilinx-nwl) (Bjorn Helgaas)
- Make PCI I/O space optional on ARM32 (Bjorn Helgaas)
- Ignore write combining when mapping I/O port space (Bjorn Helgaas)
- Claim bus resources on MIPS PCI_PROBE_ONLY set-ups (Bjorn Helgaas)
- Remove unicore32 pci=firmware command line parameter handling (Bjorn Helgaas)
- Support I/O resources when parsing host bridge resources (Jayachandran C)
- Add helpers to request/release memory and I/O regions (Johannes Thumshirn)
- Use pci_(request|release)_mem_regions (NVMe, lpfc, GenWQE, ethernet/intel, alx) (Johannes Thumshirn)
- Extend pci=resource_alignment to specify device/vendor IDs (Koehrer Mathias (ETAS/ESW5))
- Add generic pci_bus_claim_resources() (Lorenzo Pieralisi)
- Claim bus resources on ARM32 PCI_PROBE_ONLY set-ups (Lorenzo Pieralisi)
- Remove ARM32 and ARM64 arch-specific pcibios_enable_device() (Lorenzo Pieralisi)
- Add pci_unmap_iospace() to unmap I/O resources (Sinan Kaya)
- Remove powerpc __pci_mmap_set_pgprot() (Yinghai Lu)
PCI device hotplug:
- Allow additional bus numbers for hotplug bridges (Keith Busch)
- Ignore interrupts during D3cold (Lukas Wunner)
Power management:
- Enforce type casting for pci_power_t (Andy Shevchenko)
- Don't clear d3cold_allowed for PCIe ports (Mika Westerberg)
- Put PCIe ports into D3 during suspend (Mika Westerberg)
- Power on bridges before scanning new devices (Mika Westerberg)
- Runtime resume bridge before rescan (Mika Westerberg)
- Add runtime PM support for PCIe ports (Mika Westerberg)
- Remove redundant check of pcie_set_clkpm (Shawn Lin)
Virtualization:
- Add function 1 DMA alias quirk for Marvell 88SE9182 (Aaron Sierra)
- Add DMA alias quirk for Adaptec 3805 (Alex Williamson)
- Mark Atheros AR9485 and QCA9882 to avoid bus reset (Chris Blake)
- Add ACS quirk for Solarflare SFC9220 (Edward Cree)
MSI:
- Fix PCI_MSI dependencies (Arnd Bergmann)
- Add pci_msix_desc_addr() helper (Christoph Hellwig)
- Switch msix_program_entries() to use pci_msix_desc_addr() (Christoph Hellwig)
- Make the "entries" argument to pci_enable_msix() optional (Christoph Hellwig)
- Provide sensible IRQ vector alloc/free routines (Christoph Hellwig)
- Spread interrupt vectors in pci_alloc_irq_vectors() (Christoph Hellwig)
Error Handling:
- Bind DPC to Root Ports as well as Downstream Ports (Keith Busch)
- Remove DPC tristate module option (Keith Busch)
- Convert Downstream Port Containment driver to use devm_* functions (Mika Westerberg)
Generic host bridge driver:
- Select IRQ_DOMAIN (Arnd Bergmann)
- Claim bus resources on PCI_PROBE_ONLY set-ups (Lorenzo Pieralisi)
ACPI host bridge driver:
- Add ARM64 acpi_pci_bus_find_domain_nr() (Tomasz Nowicki)
- Add ARM64 ACPI support for legacy IRQs parsing and consolidation with DT code (Tomasz Nowicki)
- Implement ARM64 AML accessors for PCI_Config region (Tomasz Nowicki)
- Support ARM64 ACPI-based PCI host controller (Tomasz Nowicki)
Altera host bridge driver:
- Check link status before retrain link (Ley Foon Tan)
- Poll for link up status after retraining the link (Ley Foon Tan)
Axis ARTPEC-6 host bridge driver:
- Add PCI_MSI_IRQ_DOMAIN dependency (Arnd Bergmann)
- Add DT binding for Axis ARTPEC-6 PCIe controller (Niklas Cassel)
- Add Axis ARTPEC-6 PCIe controller driver (Niklas Cassel)
Intel VMD host bridge driver:
- Use lock save/restore in interrupt enable path (Jon Derrick)
- Select device dma ops to override (Keith Busch)
- Initialize list item in IRQ disable (Keith Busch)
- Use x86_vector_domain as parent domain (Keith Busch)
- Separate MSI and MSI-X vector sharing (Keith Busch)
Marvell Aardvark host bridge driver:
- Add DT binding for the Aardvark PCIe controller (Thomas Petazzoni)
- Add Aardvark PCI host controller driver (Thomas Petazzoni)
- Add Aardvark PCIe support for Armada 3700 (Thomas Petazzoni)
Microsoft Hyper-V host bridge driver:
- Fix interrupt cleanup path (Cathy Avery)
- Don't leak buffer in hv_pci_onchannelcallback() (Vitaly Kuznetsov)
- Handle all pending messages in hv_pci_onchannelcallback() (Vitaly Kuznetsov)
NVIDIA Tegra host bridge driver:
- Program PADS_REFCLK_CFG* always, not just on legacy SoCs (Stephen Warren)
- Program PADS_REFCLK_CFG* registers with per-SoC values (Stephen Warren)
- Use lower-case hex consistently for register definitions (Thierry Reding)
- Use generic pci_remap_iospace() rather than ARM32-specific one (Thierry Reding)
- Stop setting pcibios_min_mem (Thierry Reding)
Renesas R-Car host bridge driver:
- Drop gen2 dummy I/O port region (Bjorn Helgaas)
TI DRA7xx host bridge driver:
- Fix return value in case of error (Christophe JAILLET)
Xilinx AXI host bridge driver:
- Fix return value in case of error (Christophe JAILLET)
Miscellaneous:
- Make bus_attr_resource_alignment static (Ben Dooks)
- Include <asm/dma.h> for isa_dma_bridge_buggy (Ben Dooks)
- MAINTAINERS: Add file patterns for PCI device tree bindings (Geert Uytterhoeven)
- Make host bridge drivers explicitly non-modular (Paul Gortmaker)"
* tag 'pci-v4.8-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (125 commits)
PCI: xgene: Make explicitly non-modular
PCI: thunder-pem: Make explicitly non-modular
PCI: thunder-ecam: Make explicitly non-modular
PCI: tegra: Make explicitly non-modular
PCI: rcar-gen2: Make explicitly non-modular
PCI: rcar: Make explicitly non-modular
PCI: mvebu: Make explicitly non-modular
PCI: layerscape: Make explicitly non-modular
PCI: keystone: Make explicitly non-modular
PCI: hisi: Make explicitly non-modular
PCI: generic: Make explicitly non-modular
PCI: designware-plat: Make it explicitly non-modular
PCI: artpec6: Make explicitly non-modular
PCI: armada8k: Make explicitly non-modular
PCI: artpec: Add PCI_MSI_IRQ_DOMAIN dependency
PCI: Add ACS quirk for Solarflare SFC9220
arm64: dts: marvell: Add Aardvark PCIe support for Armada 3700
PCI: aardvark: Add Aardvark PCI host controller driver
dt-bindings: add DT binding for the Aardvark PCIe controller
PCI: tegra: Program PADS_REFCLK_CFG* registers with per-SoC values
...
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Bjorn Helgaas
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3efc702378 |
Merge branch 'pci/resource' into next
* pci/resource: unicore32/PCI: Remove pci=firmware command line parameter handling ARM/PCI: Remove arch-specific pcibios_enable_device() ARM64/PCI: Remove arch-specific pcibios_enable_device() MIPS/PCI: Claim bus resources on PCI_PROBE_ONLY set-ups ARM/PCI: Claim bus resources on PCI_PROBE_ONLY set-ups PCI: generic: Claim bus resources on PCI_PROBE_ONLY set-ups PCI: Add generic pci_bus_claim_resources() alx: Use pci_(request|release)_mem_regions ethernet/intel: Use pci_(request|release)_mem_regions GenWQE: Use pci_(request|release)_mem_regions lpfc: Use pci_(request|release)_mem_regions NVMe: Use pci_(request|release)_mem_regions PCI: Add helpers to request/release memory and I/O regions PCI: Extending pci=resource_alignment to specify device/vendor IDs sparc/PCI: Implement pci_resource_to_user() with pcibios_resource_to_bus() powerpc/pci: Implement pci_resource_to_user() with pcibios_resource_to_bus() microblaze/PCI: Implement pci_resource_to_user() with pcibios_resource_to_bus() PCI: Unify pci_resource_to_user() declarations microblaze/PCI: Remove useless __pci_mmap_set_pgprot() powerpc/pci: Remove __pci_mmap_set_pgprot() PCI: Ignore write combining when mapping I/O port space |
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Bjorn Helgaas
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a00c74c166 |
Merge branches 'pci/aspm', 'pci/dpc', 'pci/hotplug', 'pci/misc', 'pci/msi', 'pci/pm' and 'pci/virtualization' into next
* pci/aspm: PCI/ASPM: Remove redundant check of pcie_set_clkpm * pci/dpc: PCI: Remove DPC tristate module option PCI: Bind DPC to Root Ports as well as Downstream Ports PCI: Fix whitespace in struct dpc_dev PCI: Convert Downstream Port Containment driver to use devm_* functions * pci/hotplug: PCI: Allow additional bus numbers for hotplug bridges * pci/misc: PCI: Include <asm/dma.h> for isa_dma_bridge_buggy PCI: Make bus_attr_resource_alignment static MAINTAINERS: Add file patterns for PCI device tree bindings PCI: Fix comment typo * pci/msi: PCI/MSI: irqchip: Fix PCI_MSI dependencies * pci/pm: PCI: pciehp: Ignore interrupts during D3cold PCI: Document connection between pci_power_t and hardware PM capability PCI: Add runtime PM support for PCIe ports ACPI / hotplug / PCI: Runtime resume bridge before rescan PCI: Power on bridges before scanning new devices PCI: Put PCIe ports into D3 during suspend PCI: Don't clear d3cold_allowed for PCIe ports PCI / PM: Enforce type casting for pci_power_t * pci/virtualization: PCI: Add ACS quirk for Solarflare SFC9220 PCI: Add DMA alias quirk for Adaptec 3805 PCI: Mark Atheros AR9485 and QCA9882 to avoid bus reset PCI: Add function 1 DMA alias quirk for Marvell 88SE9182 |
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Keith Busch
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e16b466059 |
PCI: Allow additional bus numbers for hotplug bridges
A user may hot add a switch requiring more than one bus to enumerate. This previously required a system reboot if BIOS did not sufficiently pad the bus resource, which they frequently don't do. Add a kernel parameter so a user can specify the minimum number of bus numbers to reserve for a hotplug bridge's subordinate buses so rebooting won't be necessary. The default is 1, which is equivalent to previous behavior. Signed-off-by: Keith Busch <keith.busch@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
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Andy Shevchenko
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6ec39cf5cd |
PCI / PM: check all fields in pci_set_platform_pm()
When assign new PCI platform PM operations check for all mandatory fields to prevent NULL pointer dereference. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
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Ben Dooks
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2a2aca316a |
PCI: Include <asm/dma.h> for isa_dma_bridge_buggy
At least on arm, <asm/dma.h> does not get included when building drivers/pci/pci.o. This causes the following build warning which can be fixed by including <asm/dma.h>: drivers/pci/pci.c:37:5: warning: symbol 'isa_dma_bridge_buggy' was not declared. Should it be static? Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
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Koehrer Mathias (ETAS/ESW5)
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644a544fd9 |
PCI: Extending pci=resource_alignment to specify device/vendor IDs
Some uio-based PCI drivers, e.g., uio_cif do not work if the assigned PCI memory resources are not page aligned. By using the kernel option "pci=resource_alignment" it is possible to force single PCI boards to use page alignment for their memory resources. However, this is fairly cumbersome if several of these boards are in use as the specification of the cards has to be done via PCI bus/slot/function number which might change, e.g., by adding another board. Extend the kernel option "pci=resource_alignment" to allow specification of relevant devices via PCI device/vendor (and subdevice/subvendor) IDs. The specification of the devices via device/vendor is indicated by a leading string "pci:" as argument to "pci=resource_alignment". The format of the specification is pci:<vendor>:<device>[:<subvendor>:<subdevice>] Signed-off-by: Mathias Koehrer <mathias.koehrer@etas.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
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Mika Westerberg
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9d26d3a8f1 |
PCI: Put PCIe ports into D3 during suspend
Currently the Linux PCI core does not touch power state of PCI bridges and
PCIe ports when system suspend is entered. Leaving them in D0 consumes
power unnecessarily and may prevent the CPU from entering deeper C-states.
With recent PCIe hardware we can power down the ports to save power given
that we take into account few restrictions:
- The PCIe port hardware is recent enough, starting from 2015.
- Devices connected to PCIe ports are effectively in D3cold once the port
is transitioned to D3 (the config space is not accessible anymore and
the link may be powered down).
- Devices behind the PCIe port need to be allowed to transition to D3cold
and back. There is a way both drivers and userspace can forbid this.
- If the device behind the PCIe port is capable of waking the system it
needs to be able to do so from D3cold.
This patch adds a new flag to struct pci_device called 'bridge_d3'. This
flag is set and cleared by the PCI core whenever there is a change in power
management state of any of the devices behind the PCIe port. When system
later on is suspended we only need to check this flag and if it is true
transition the port to D3 otherwise we leave it in D0.
Also provide override mechanism via command line parameter
"pcie_port_pm=[off|force]" that can be used to disable or enable the
feature regardless of the BIOS manufacturing date.
Tested-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Ben Dooks
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21751a9a4e |
PCI: Make bus_attr_resource_alignment static
The symbol bus_attr_resource_alignment is not exported or declared elsewhere, so make it static to fix the following warning: drivers/pci/pci.c:4900:1: warning: symbol 'bus_attr_resource_alignment' was not declared. Should it be static? Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
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Tomasz Nowicki
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2ab51ddeca |
ARM64: PCI: Add acpi_pci_bus_find_domain_nr()
Extend pci_bus_find_domain_nr() so it can find the domain from either: - ACPI, via the new acpi_pci_bus_find_domain_nr() interface, or - DT, via of_pci_bus_find_domain_nr() Note that this is only used for CONFIG_PCI_DOMAINS_GENERIC=y, so it does not affect x86 or ia64. [bhelgaas: changelog] Signed-off-by: Tomasz Nowicki <tn@semihalf.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
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Tomasz Nowicki
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1a4f93f711 |
PCI: Factor DT-specific pci_bus_find_domain_nr() code out
pci_bus_find_domain_nr() retrieves the host bridge domain number in a DT-specific way. Rename it to of_pci_bus_find_domain_nr() to reflect that, so we can add a corresponding function for ACPI. [bhelgaas: changelog] Signed-off-by: Tomasz Nowicki <tn@semihalf.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> |