Commit Graph

13 Commits

Author SHA1 Message Date
Vinod Koul fb203adc28 ASoC: Intel: Skylake: Revert previous broken fix memory leak fix
This reverts commit 87b5ed8ecb ("ASoC: Intel:
Skylake: fix memory leak") as it causes regression on Skylake devices

The SKL drivers can be deferred probe. The topology file based widgets can
have references to topology file so this can't be freed until card is fully
created, so revert this patch for now

[   66.682767] BUG: unable to handle kernel paging request at ffffc900001363fc
[   66.690735] IP: [<ffffffff806c94dd>] strnlen+0xd/0x40
[   66.696509] PGD 16e035067 PUD 16e036067 PMD 16e038067 PTE 0
[   66.702925] Oops: 0000 [#1] PREEMPT SMP
[   66.768390] CPU: 3 PID: 57 Comm: kworker/u16:3 Tainted: G O 4.4.0-rc7-skl #62
[   66.778869] Hardware name: Intel Corporation Skylake Client platform
[   66.793201] Workqueue: deferwq deferred_probe_work_func
[   66.799173] task: ffff88008b700f40 ti: ffff88008b704000 task.ti: ffff88008b704000
[   66.807692] RIP: 0010:[<ffffffff806c94dd>]  [<ffffffff806c94dd>] strnlen+0xd/0x40
[   66.816243] RSP: 0018:ffff88008b707878  EFLAGS: 00010286
[   66.822293] RAX: ffffffff80e60a82 RBX: 000000000000000e RCX: fffffffffffffffe
[   66.830406] RDX: ffffc900001363fc RSI: ffffffffffffffff RDI: ffffc900001363fc
[   66.838520] RBP: ffff88008b707878 R08: 000000000000ffff R09: 000000000000ffff
[   66.846649] R10: 0000000000000001 R11: ffffffffa01c6368 R12: ffffc900001363fc
[   66.854765] R13: 0000000000000000 R14: 00000000ffffffff R15: 0000000000000000
[   66.862910] FS:  0000000000000000(0000) GS:ffff88016ecc0000(0000) knlGS:0000000000000000
[   66.872150] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[   66.878696] CR2: ffffc900001363fc CR3: 0000000002c09000 CR4: 00000000003406e0
[   66.886820] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
[   66.894938] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
[   66.903052] Stack:
[   66.905346]  ffff88008b7078b0 ffffffff806cb1db 000000000000000e 0000000000000000
[   66.913854]  ffff88008b707928 ffffffffa00d1050 ffffffffa00d104e ffff88008b707918
[   66.922353]  ffffffff806ccbd6 ffff88008b707948 0000000000000046 ffff88008b707940
[   66.930855] Call Trace:
[   66.933646]  [<ffffffff806cb1db>] string.isra.4+0x3b/0xd0
[   66.939793]  [<ffffffff806ccbd6>] vsnprintf+0x116/0x540
[   66.945742]  [<ffffffff806d02f0>] kvasprintf+0x40/0x80
[   66.951591]  [<ffffffff806d0370>] kasprintf+0x40/0x50
[   66.957359]  [<ffffffffa00c085f>] dapm_create_or_share_kcontrol+0x1cf/0x300 [snd_soc_core]
[   66.966771]  [<ffffffff8057dd1e>] ? __kmalloc+0x16e/0x2a0
[   66.972931]  [<ffffffffa00c0dab>] snd_soc_dapm_new_widgets+0x41b/0x4b0 [snd_soc_core]
[   66.981857]  [<ffffffffa00be8c0>] ? snd_soc_dapm_add_routes+0xb0/0xd0 [snd_soc_core]
[   67.007828]  [<ffffffffa00b92ed>] soc_probe_component+0x23d/0x360 [snd_soc_core]
[   67.016244]  [<ffffffff80b14e69>] ? mutex_unlock+0x9/0x10
[   67.022405]  [<ffffffffa00ba02f>] snd_soc_instantiate_card+0x47f/0xd10 [snd_soc_core]
[   67.031329]  [<ffffffff8049eeb2>] ? debug_mutex_init+0x32/0x40
[   67.037973]  [<ffffffffa00baa92>] snd_soc_register_card+0x1d2/0x2b0 [snd_soc_core]
[   67.046619]  [<ffffffffa00c8b54>] devm_snd_soc_register_card+0x44/0x80 [snd_soc_core]
[   67.055539]  [<ffffffffa01c303b>] skylake_audio_probe+0x1b/0x20 [snd_soc_skl_rt286]
[   67.064292]  [<ffffffff808aa887>] platform_drv_probe+0x37/0x90

Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2016-01-05 11:48:39 +00:00
Sudip Mukherjee 87b5ed8ecb ASoC: Intel: Skylake: fix memory leak
We have requested the firmware but missed releasing it.

Signed-off-by: Sudip Mukherjee <sudip@vectorindia.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-11-23 11:29:12 +00:00
Jeeja KP 6abca1d71b ASoC: Intel: Skylake: Add support to topology for module static pin
Some module pin connection are static and defined by the topology.
This patch adds support for static pin definitions in topology widget
private data

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-24 01:31:34 +09:00
Subhransu S. Prusty 4d8adccb22 ASoC: Intel: Skylake: Fix to fill all sink/source pipe params
Currently params only for first copier widget identified in the
source/sink path is queried from NHLT. In the dapm route the
playback/capture widget may be connected to more than one copier
widget. This patch adds return check to return only for any error
case.

Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-24 01:31:34 +09:00
Subhransu S. Prusty f0900eb213 ASoC: Intel: Skylake: Fix to use correct macros for the path iteration
In case of playback, for the BE dai source path should be iterated to find
the pipe params. With sink path iterated, this resulted in a loop and kernel
panic with page request failure.
Similar are the cases for Capture and FE dais. Using correct macros to fix
the panic

Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-24 01:31:34 +09:00
Jeeja KP bc03281a5c ASoC: Intel: Skylake: Remove BE copier blob memcpy
The BE copier private data allowed endpoint configuration blobs, now these
are queried from BIOS, we don't need to copy the blob, but only capability.

Removing the blob from private data will not allocate memory for module
specific config in which case memcpy will fail. Fix is to assign the ptr
queried from the NHLT table for the endpoint configuration.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-24 01:31:34 +09:00
Vinod Koul 3373f71683 ASoC: Intel: Skylake: Modify the log level
dev_info is too noisy for tplg wiget loading, so move it to
debug level

Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-08 09:46:22 +01:00
Jeeja KP b663a8c5c9 ASoC: Intel: Skylake: Initialize and load DSP controls
Initialize and creates DSP controls if processing pipe capability
is supported by HW. Updates the dma_id, hw_params to module param
to be used when DSP module has to be configured.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-07 16:04:15 +01:00
Vinod Koul 3af36706ff ASoC: Intel: Skylake: Add topology core init and handlers
The SKL driver does not code DSP topology in driver. It uses the
newly added ASoC topology core to parse the topology information
(controls, widgets and map) from topology binary.
Each topology element passed private data which contains
information that driver used to identify the module instance
within firmware and send IPCs for that module to DSP firmware
along with parameters.
This patch adds init routine to invoke topology load and callback
for topology creation.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-07 16:04:14 +01:00
Vinod Koul cfb0a87383 ASoC: Intel: Skylake: Add FE and BE hw_params handling
For FE and BE, the PCM parameters come from FE and BE hw_params
values passed. For a FE we convert the FE params to DSP expected
module format and pass to DSP. For a BE we need to find the
gateway settings (i2s/PDM) to be applied. These are queried from
NHLT table and applied.

Further for BE based on direction the settings are applied as
either source or destination parameters.

These helpers here allow the format to be calculated and queried
as per firmware format.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-07 15:30:16 +01:00
Vinod Koul d93f8e550f ASoC: Intel: Skylake: add DSP platform widget event handlers
The Skylake driver topology model tries to model the firmware
rule for pipeline and module creation.
The creation rule is:
 - Create Pipe
 - Add modules to Pipe
 - Connect the modules (bind)
 - Start the pipes

Similarly destroy rule is:
 - Stop the pipe
 - Disconnect it (unbind)
 - Delete the pipe

In driver we use Mixer, as there will always be ONE mixer in a
pipeline to model a pipe. The modules in pipe are modelled as PGA
widgets.  The DAPM sequencing rules (mixer and then PGA) are used
to create the sequence DSP expects as depicted above, and then
widget handlers for PMU and PMD events help in that.

This patch adds widget event handlers for PRE/POST PMU and
PRE/POST PMD event for mixer and pga modules.  These event
handlers invoke pipeline creation, destroy, module creation,
module bind, unbind and pipeline bind unbind

Event handler sequencing is implement to target the DSP FW
sequence expectations to enable path from source to sink pipe for
Playback/Capture.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Hardik T Shah <hardik.t.shah@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-07 15:30:15 +01:00
Jeeja KP f7590d4f15 ASoC: Intel: Skylake: Add module configuration helpers
To configure a module, driver needs to send input and output PCM
params for a module in DSP. The FE PCM params come from hw_params
ie from user, for a BE they also come from hw_params but from
BE-link fixups.
So based on PCM params required driver has to find a converter
module (src/updown/format) and then do the conversion and
calculate PCM params in these pipelines In this patch we add the
helper modules which allow driver to do these calculations.

Signed-off-by: Hardik T Shah <hardik.t.shah@intel.com>
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-07 15:30:15 +01:00
Jeeja KP e4e2d2f452 ASoC: Intel: Skylake: Add pipe and modules handlers
SKL driver needs to instantiate pipelines and modules in the DSP.
The topology in the DSP is modelled as DAPM graph with a PGA
representing a module instance and mixer representing a pipeline
for a group of modules along with the mixer itself.

Here we start adding building block for handling these. We add
resource checks (memory/compute) for pipelines, find the modules
in a pipeline, init modules in a pipe and lastly bind/unbind
modules in a pipe These will be used by pipe event handlers in
subsequent patches

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-07 15:30:15 +01:00