Commit Graph

3 Commits

Author SHA1 Message Date
Will Deacon 1c2672b49a locking/atomics/sh: Don't pull in all of <linux/bitops.h> in <asm/cmpxchg-xchg.h>
The sh implementation of <asm/cmpxchg-xchg.h> pulls in <linux/bitops.h>
so that it can refer to BITS_PER_BYTE. It also transitively relies on
this pulling in <linux/compiler.h> for READ_ONCE().

Replace the #include with <linux/bits.h> and <linux/compiler.h>.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: yamada.masahiro@socionext.com
Link: https://lore.kernel.org/lkml/1529412794-17720-6-git-send-email-will.deacon@arm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2018-06-21 12:52:11 +02:00
Pan Xinhui ff18143cee sh: cmpxchg: fix a bit shift bug in big_endian os
Correct bitoff in big endian OS.
Current code works correctly for 1 byte but not for 2 bytes.

Fixes: 3226aad81a ("sh: support 1 and 2 byte xchg")
Signed-off-by: Pan Xinhui <xinhui.pan@linux.vnet.ibm.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Rich Felker <dalias@libc.org>
2016-07-31 03:33:32 +00:00
Michael S. Tsirkin 9e3f84ce41 sh: move xchg_cmpxchg to a header by itself
Looks like future sh variants will support a 4-byte cas which will be
used to implement 1 and 2 byte xchg.

This is exactly what we do for llsc now, move the portable part of the
code into a separate header so it's easy to reuse.

Suggested-by:  Rich Felker <dalias@libc.org>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
2016-01-12 20:47:02 +02:00