/* * TI DA850/OMAP-L138 EVM board * * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/ * * Derived from: arch/arm/mach-davinci/board-da830-evm.c * Original Copyrights follow: * * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under * the terms of the GNU General Public License version 2. This program * is licensed "as is" without any warranty of any kind, whether express * or implied. */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #define DA850_EVM_PHY_MASK 0x1 #define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */ #define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8) #define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15) #define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0) #define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1) static struct mtd_partition da850_evm_norflash_partition[] = { { .name = "NOR filesystem", .offset = 0, .size = MTDPART_SIZ_FULL, .mask_flags = 0, }, }; static struct physmap_flash_data da850_evm_norflash_data = { .width = 2, .parts = da850_evm_norflash_partition, .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition), }; static struct resource da850_evm_norflash_resource[] = { { .start = DA8XX_AEMIF_CS2_BASE, .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1, .flags = IORESOURCE_MEM, }, }; static struct platform_device da850_evm_norflash_device = { .name = "physmap-flash", .id = 0, .dev = { .platform_data = &da850_evm_norflash_data, }, .num_resources = 1, .resource = da850_evm_norflash_resource, }; /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash * (128K blocks). It may be used instead of the (default) SPI flash * to boot, using TI's tools to install the secondary boot loader * (UBL) and U-Boot. */ struct mtd_partition da850_evm_nandflash_partition[] = { { .name = "u-boot env", .offset = 0, .size = SZ_128K, .mask_flags = MTD_WRITEABLE, }, { .name = "UBL", .offset = MTDPART_OFS_APPEND, .size = SZ_128K, .mask_flags = MTD_WRITEABLE, }, { .name = "u-boot", .offset = MTDPART_OFS_APPEND, .size = 4 * SZ_128K, .mask_flags = MTD_WRITEABLE, }, { .name = "kernel", .offset = 0x200000, .size = SZ_2M, .mask_flags = 0, }, { .name = "filesystem", .offset = MTDPART_OFS_APPEND, .size = MTDPART_SIZ_FULL, .mask_flags = 0, }, }; static struct davinci_nand_pdata da850_evm_nandflash_data = { .parts = da850_evm_nandflash_partition, .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition), .ecc_mode = NAND_ECC_HW, .options = NAND_USE_FLASH_BBT, }; static struct resource da850_evm_nandflash_resource[] = { { .start = DA8XX_AEMIF_CS3_BASE, .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1, .flags = IORESOURCE_MEM, }, { .start = DA8XX_AEMIF_CTL_BASE, .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, .flags = IORESOURCE_MEM, }, }; static struct platform_device da850_evm_nandflash_device = { .name = "davinci_nand", .id = 1, .dev = { .platform_data = &da850_evm_nandflash_data, }, .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource), .resource = da850_evm_nandflash_resource, }; static struct i2c_board_info __initdata da850_evm_i2c_devices[] = { { I2C_BOARD_INFO("tlv320aic3x", 0x18), } }; static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = { .bus_freq = 100, /* kHz */ .bus_delay = 0, /* usec */ }; static struct davinci_uart_config da850_evm_uart_config __initdata = { .enabled_uarts = 0x7, }; static struct platform_device *da850_evm_devices[] __initdata = { &da850_evm_nandflash_device, &da850_evm_norflash_device, }; /* davinci da850 evm audio machine driver */ static u8 da850_iis_serializer_direction[] = { INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, }; static struct snd_platform_data da850_evm_snd_data = { .tx_dma_offset = 0x2000, .rx_dma_offset = 0x2000, .op_mode = DAVINCI_MCASP_IIS_MODE, .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction), .tdm_slots = 2, .serial_dir = da850_iis_serializer_direction, .eventq_no = EVENTQ_1, .version = MCASP_VERSION_2, .txnumevt = 1, .rxnumevt = 1, }; static int da850_evm_mmc_get_ro(int index) { return gpio_get_value(DA850_MMCSD_WP_PIN); } static int da850_evm_mmc_get_cd(int index) { return !gpio_get_value(DA850_MMCSD_CD_PIN); } static struct davinci_mmc_config da850_mmc_config = { .get_ro = da850_evm_mmc_get_ro, .get_cd = da850_evm_mmc_get_cd, .wires = 4, .version = MMC_CTLR_VERSION_2, }; static int da850_lcd_hw_init(void) { int status; status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n"); if (status < 0) return status; status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n"); if (status < 0) { gpio_free(DA850_LCD_BL_PIN); return status; } gpio_direction_output(DA850_LCD_BL_PIN, 0); gpio_direction_output(DA850_LCD_PWR_PIN, 0); /* disable lcd backlight */ gpio_set_value(DA850_LCD_BL_PIN, 0); /* disable lcd power */ gpio_set_value(DA850_LCD_PWR_PIN, 0); /* enable lcd power */ gpio_set_value(DA850_LCD_PWR_PIN, 1); /* enable lcd backlight */ gpio_set_value(DA850_LCD_BL_PIN, 1); return 0; } #define DA8XX_AEMIF_CE2CFG_OFFSET 0x10 #define DA8XX_AEMIF_ASIZE_16BIT 0x1 static void __init da850_evm_init_nor(void) { void __iomem *aemif_addr; aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K); /* Configure data bus width of CS2 to 16 bit */ writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) | DA8XX_AEMIF_ASIZE_16BIT, aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET); iounmap(aemif_addr); } #if defined(CONFIG_MTD_PHYSMAP) || \ defined(CONFIG_MTD_PHYSMAP_MODULE) #define HAS_NOR 1 #else #define HAS_NOR 0 #endif #if defined(CONFIG_MMC_DAVINCI) || \ defined(CONFIG_MMC_DAVINCI_MODULE) #define HAS_MMC 1 #else #define HAS_MMC 0 #endif static const short da850_evm_lcdc_pins[] = { DA850_GPIO2_8, DA850_GPIO2_15, -1 }; static __init void da850_evm_init(void) { struct davinci_soc_info *soc_info = &davinci_soc_info; int ret; ret = da8xx_pinmux_setup(da850_nand_pins); if (ret) pr_warning("da850_evm_init: nand mux setup failed: %d\n", ret); ret = da8xx_pinmux_setup(da850_nor_pins); if (ret) pr_warning("da850_evm_init: nor mux setup failed: %d\n", ret); da850_evm_init_nor(); platform_add_devices(da850_evm_devices, ARRAY_SIZE(da850_evm_devices)); ret = da8xx_register_edma(); if (ret) pr_warning("da850_evm_init: edma registration failed: %d\n", ret); ret = da8xx_pinmux_setup(da850_i2c0_pins); if (ret) pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n", ret); ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata); if (ret) pr_warning("da850_evm_init: i2c0 registration failed: %d\n", ret); soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK; soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY; soc_info->emac_pdata->rmii_en = 0; ret = da8xx_pinmux_setup(da850_cpgmac_pins); if (ret) pr_warning("da850_evm_init: cpgmac mux setup failed: %d\n", ret); ret = da8xx_register_emac(); if (ret) pr_warning("da850_evm_init: emac registration failed: %d\n", ret); ret = da8xx_register_watchdog(); if (ret) pr_warning("da830_evm_init: watchdog registration failed: %d\n", ret); if (HAS_MMC) { if (HAS_NOR) pr_warning("WARNING: both NOR Flash and MMC/SD are " "enabled, but they share AEMIF pins.\n" "\tDisable one of them.\n"); ret = da8xx_pinmux_setup(da850_mmcsd0_pins); if (ret) pr_warning("da850_evm_init: mmcsd0 mux setup failed:" " %d\n", ret); ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n"); if (ret) pr_warning("da850_evm_init: can not open GPIO %d\n", DA850_MMCSD_CD_PIN); gpio_direction_input(DA850_MMCSD_CD_PIN); ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n"); if (ret) pr_warning("da850_evm_init: can not open GPIO %d\n", DA850_MMCSD_WP_PIN); gpio_direction_input(DA850_MMCSD_WP_PIN); ret = da8xx_register_mmcsd0(&da850_mmc_config); if (ret) pr_warning("da850_evm_init: mmcsd0 registration failed:" " %d\n", ret); } davinci_serial_init(&da850_evm_uart_config); i2c_register_board_info(1, da850_evm_i2c_devices, ARRAY_SIZE(da850_evm_i2c_devices)); /* * shut down uart 0 and 1; they are not used on the board and * accessing them causes endless "too much work in irq53" messages * with arago fs */ __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30); __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30); ret = da8xx_pinmux_setup(da850_mcasp_pins); if (ret) pr_warning("da850_evm_init: mcasp mux setup failed: %d\n", ret); da8xx_register_mcasp(0, &da850_evm_snd_data); ret = da8xx_pinmux_setup(da850_lcdcntl_pins); if (ret) pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n", ret); /* Handle board specific muxing for LCD here */ ret = da8xx_pinmux_setup(da850_evm_lcdc_pins); if (ret) pr_warning("da850_evm_init: evm specific lcd mux setup " "failed: %d\n", ret); ret = da850_lcd_hw_init(); if (ret) pr_warning("da850_evm_init: lcd initialization failed: %d\n", ret); ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata); if (ret) pr_warning("da850_evm_init: lcdc registration failed: %d\n", ret); ret = da8xx_register_rtc(); if (ret) pr_warning("da850_evm_init: rtc setup failed: %d\n", ret); ret = da850_register_cpufreq(); if (ret) pr_warning("da850_evm_init: cpufreq registration failed: %d\n", ret); } #ifdef CONFIG_SERIAL_8250_CONSOLE static int __init da850_evm_console_init(void) { return add_preferred_console("ttyS", 2, "115200"); } console_initcall(da850_evm_console_init); #endif static __init void da850_evm_irq_init(void) { struct davinci_soc_info *soc_info = &davinci_soc_info; cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA850_N_CP_INTC_IRQ, soc_info->intc_irq_prios); } static void __init da850_evm_map_io(void) { da850_init(); } MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138 EVM") .phys_io = IO_PHYS, .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, .boot_params = (DA8XX_DDR_BASE + 0x100), .map_io = da850_evm_map_io, .init_irq = da850_evm_irq_init, .timer = &davinci_timer, .init_machine = da850_evm_init, MACHINE_END