/dts-v1/;

#include "tegra124.dtsi"

/ {
	model = "NVIDIA Tegra124 Venice2";
	compatible = "nvidia,venice2", "nvidia,tegra124";

	memory {
		reg = <0x80000000 0x80000000>;
	};

	serial@70006000 {
		status = "okay";
	};

	i2c@7000c000 {
		status = "okay";
		clock-frequency = <100000>;

		acodec: audio-codec@10 {
			compatible = "maxim,max98090";
			reg = <0x10>;
			interrupt-parent = <&gpio>;
			interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>;
		};
	};

	i2c@7000c400 {
		status = "okay";
		clock-frequency = <100000>;
	};

	i2c@7000c500 {
		status = "okay";
		clock-frequency = <100000>;
	};

	i2c@7000c700 {
		status = "okay";
		clock-frequency = <100000>;
	};

	i2c@7000d000 {
		status = "okay";
		clock-frequency = <100000>;
	};

	pmc@7000e400 {
		nvidia,invert-interrupt;
		nvidia,suspend-mode = <1>;
		nvidia,cpu-pwr-good-time = <500>;
		nvidia,cpu-pwr-off-time = <300>;
		nvidia,core-pwr-good-time = <641 3845>;
		nvidia,core-pwr-off-time = <61036>;
		nvidia,core-power-req-active-high;
		nvidia,sys-clock-req-active-high;
	};

	sdhci@700b0400 {
		cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
		power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
		status = "okay";
		bus-width = <4>;
	};

	sdhci@700b0600 {
		status = "okay";
		bus-width = <8>;
	};

	ahub@70300000 {
		i2s@70301100 {
			status = "okay";
		};
	};

	clocks {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		clk32k_in: clock@0 {
			compatible = "fixed-clock";
			reg=<0>;
			#clock-cells = <0>;
			clock-frequency = <32768>;
		};
	};

	sound {
		compatible = "nvidia,tegra-audio-max98090-venice2",
			     "nvidia,tegra-audio-max98090";
		nvidia,model = "NVIDIA Tegra Venice2";

		nvidia,audio-routing =
			"Headphones", "HPR",
			"Headphones", "HPL",
			"Speakers", "SPKR",
			"Speakers", "SPKL",
			"Mic Jack", "MICBIAS",
			"IN34", "Mic Jack";

		nvidia,i2s-controller = <&tegra_i2s1>;
		nvidia,audio-codec = <&acodec>;

		clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
			 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
			 <&tegra_car TEGRA124_CLK_EXTERN1>;
		clock-names = "pll_a", "pll_a_out0", "mclk";
	};
};