/* * Device Tree Include file for Marvell Armada 1500-mini (Berlin BG2CD) SoC * * Sebastian Hesselbarth * * based on GPL'ed 2.6 kernel sources * (c) Marvell International Ltd. * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual * licensing only applies to this file, and not this project as a * whole. * * a) This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, * copy, modify, merge, publish, distribute, sublicense, and/or * sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following * conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ #include #include / { model = "Marvell Armada 1500-mini (BG2CD) SoC"; compatible = "marvell,berlin2cd", "marvell,berlin"; #address-cells = <1>; #size-cells = <1>; aliases { serial0 = &uart0; serial1 = &uart1; }; cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { compatible = "arm,cortex-a9"; device_type = "cpu"; next-level-cache = <&l2>; reg = <0>; clocks = <&chip_clk CLKID_CPU>; clock-latency = <100000>; operating-points = < /* kHz uV */ 800000 1200000 600000 1200000 >; }; }; pmu { compatible = "arm,cortex-a9-pmu"; interrupt-parent = <&gic>; interrupts = ; }; refclk: oscillator { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <25000000>; }; soc@f7000000 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; interrupt-parent = <&gic>; ranges = <0 0xf7000000 0x1000000>; sdhci0: sdhci@ab0000 { compatible = "mrvl,pxav3-mmc"; reg = <0xab0000 0x200>; clocks = <&chip_clk CLKID_SDIO0XIN>, <&chip_clk CLKID_SDIO0>; clock-names = "io", "core"; interrupts = ; status = "disabled"; }; l2: l2-cache-controller@ac0000 { compatible = "arm,pl310-cache"; reg = <0xac0000 0x1000>; cache-unified; cache-level = <2>; }; gic: interrupt-controller@ad1000 { compatible = "arm,cortex-a9-gic"; reg = <0xad1000 0x1000>, <0xad0100 0x0100>; interrupt-controller; #interrupt-cells = <3>; }; local-timer@ad0600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0xad0600 0x20>; interrupts = ; clocks = <&chip_clk CLKID_TWD>; }; usb_phy0: usb-phy@b74000 { compatible = "marvell,berlin2cd-usb-phy"; reg = <0xb74000 0x128>; #phy-cells = <0>; resets = <&chip_rst 0x178 23>; status = "disabled"; }; usb_phy1: usb-phy@b78000 { compatible = "marvell,berlin2cd-usb-phy"; reg = <0xb78000 0x128>; #phy-cells = <0>; resets = <&chip_rst 0x178 24>; status = "disabled"; }; eth1: ethernet@b90000 { compatible = "marvell,pxa168-eth"; reg = <0xb90000 0x10000>; clocks = <&chip_clk CLKID_GETH1>; interrupts = ; /* set by bootloader */ local-mac-address = [00 00 00 00 00 00]; #address-cells = <1>; #size-cells = <0>; phy-connection-type = "mii"; phy-handle = <ðphy1>; status = "disabled"; ethphy1: ethernet-phy@0 { reg = <0>; }; }; eth0: ethernet@e50000 { compatible = "marvell,pxa168-eth"; reg = <0xe50000 0x10000>; clocks = <&chip_clk CLKID_GETH0>; interrupts = ; /* set by bootloader */ local-mac-address = [00 00 00 00 00 00]; #address-cells = <1>; #size-cells = <0>; phy-connection-type = "mii"; phy-handle = <ðphy0>; status = "disabled"; ethphy0: ethernet-phy@0 { reg = <0>; }; }; apb@e80000 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges = <0 0xe80000 0x10000>; interrupt-parent = <&aic>; gpio0: gpio@400 { compatible = "snps,dw-apb-gpio"; reg = <0x0400 0x400>; #address-cells = <1>; #size-cells = <0>; porta: gpio-port@0 { compatible = "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells = <2>; snps,nr-gpios = <8>; reg = <0>; interrupt-controller; #interrupt-cells = <2>; interrupts = <0>; }; }; gpio1: gpio@800 { compatible = "snps,dw-apb-gpio"; reg = <0x0800 0x400>; #address-cells = <1>; #size-cells = <0>; portb: gpio-port@1 { compatible = "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells = <2>; snps,nr-gpios = <8>; reg = <0>; interrupt-controller; #interrupt-cells = <2>; interrupts = <1>; }; }; gpio2: gpio@c00 { compatible = "snps,dw-apb-gpio"; reg = <0x0c00 0x400>; #address-cells = <1>; #size-cells = <0>; portc: gpio-port@2 { compatible = "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells = <2>; snps,nr-gpios = <8>; reg = <0>; interrupt-controller; #interrupt-cells = <2>; interrupts = <2>; }; }; gpio3: gpio@1000 { compatible = "snps,dw-apb-gpio"; reg = <0x1000 0x400>; #address-cells = <1>; #size-cells = <0>; portd: gpio-port@3 { compatible = "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells = <2>; snps,nr-gpios = <8>; reg = <0>; interrupt-controller; #interrupt-cells = <2>; interrupts = <3>; }; }; timer0: timer@2c00 { compatible = "snps,dw-apb-timer"; reg = <0x2c00 0x14>; interrupts = <8>; clocks = <&chip_clk CLKID_CFG>; clock-names = "timer"; status = "okay"; }; timer1: timer@2c14 { compatible = "snps,dw-apb-timer"; reg = <0x2c14 0x14>; interrupts = <9>; clocks = <&chip_clk CLKID_CFG>; clock-names = "timer"; status = "okay"; }; timer2: timer@2c28 { compatible = "snps,dw-apb-timer"; reg = <0x2c28 0x14>; interrupts = <10>; clocks = <&chip_clk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; timer3: timer@2c3c { compatible = "snps,dw-apb-timer"; reg = <0x2c3c 0x14>; interrupts = <11>; clocks = <&chip_clk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; timer4: timer@2c50 { compatible = "snps,dw-apb-timer"; reg = <0x2c50 0x14>; interrupts = <12>; clocks = <&chip_clk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; timer5: timer@2c64 { compatible = "snps,dw-apb-timer"; reg = <0x2c64 0x14>; interrupts = <13>; clocks = <&chip_clk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; timer6: timer@2c78 { compatible = "snps,dw-apb-timer"; reg = <0x2c78 0x14>; interrupts = <14>; clocks = <&chip_clk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; timer7: timer@2c8c { compatible = "snps,dw-apb-timer"; reg = <0x2c8c 0x14>; interrupts = <15>; clocks = <&chip_clk CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; aic: interrupt-controller@3000 { compatible = "snps,dw-apb-ictl"; reg = <0x3000 0xc00>; interrupt-controller; #interrupt-cells = <1>; interrupt-parent = <&gic>; interrupts = ; }; }; chip: chip-control@ea0000 { compatible = "simple-mfd", "syscon"; reg = <0xea0000 0x400>; chip_clk: clock { compatible = "marvell,berlin2-clk"; #clock-cells = <1>; clocks = <&refclk>; clock-names = "refclk"; }; soc_pinctrl: pin-controller { compatible = "marvell,berlin2cd-soc-pinctrl"; uart0_pmux: uart0-pmux { groups = "G6"; function = "uart0"; }; }; chip_rst: reset { compatible = "marvell,berlin2-reset"; #reset-cells = <2>; }; }; usb0: usb@ed0000 { compatible = "chipidea,usb2"; reg = <0xed0000 0x200>; interrupts = ; clocks = <&chip_clk CLKID_USB0>; phys = <&usb_phy0>; phy-names = "usb-phy"; status = "disabled"; }; usb1: usb@ee0000 { compatible = "chipidea,usb2"; reg = <0xee0000 0x200>; interrupts = ; clocks = <&chip_clk CLKID_USB1>; phys = <&usb_phy1>; phy-names = "usb-phy"; status = "disabled"; }; pwm: pwm@f20000 { compatible = "marvell,berlin-pwm"; reg = <0xf20000 0x40>; clocks = <&chip_clk CLKID_CFG>; #pwm-cells = <3>; }; apb@fc0000 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges = <0 0xfc0000 0x10000>; interrupt-parent = <&sic>; wdt0: watchdog@1000 { compatible = "snps,dw-wdt"; reg = <0x1000 0x100>; clocks = <&refclk>; interrupts = <0>; }; wdt1: watchdog@2000 { compatible = "snps,dw-wdt"; reg = <0x2000 0x100>; clocks = <&refclk>; interrupts = <1>; status = "disabled"; }; wdt2: watchdog@3000 { compatible = "snps,dw-wdt"; reg = <0x3000 0x100>; clocks = <&refclk>; interrupts = <2>; status = "disabled"; }; sm_gpio1: gpio@5000 { compatible = "snps,dw-apb-gpio"; reg = <0x5000 0x400>; #address-cells = <1>; #size-cells = <0>; portf: gpio-port@5 { compatible = "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells = <2>; snps,nr-gpios = <8>; reg = <0>; }; }; sm_gpio0: gpio@c000 { compatible = "snps,dw-apb-gpio"; reg = <0xc000 0x400>; #address-cells = <1>; #size-cells = <0>; porte: gpio-port@4 { compatible = "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells = <2>; snps,nr-gpios = <8>; reg = <0>; }; }; uart0: serial@9000 { compatible = "snps,dw-apb-uart"; reg = <0x9000 0x100>; reg-shift = <2>; reg-io-width = <1>; interrupts = <8>; clocks = <&refclk>; pinctrl-0 = <&uart0_pmux>; pinctrl-names = "default"; status = "disabled"; }; uart1: serial@a000 { compatible = "snps,dw-apb-uart"; reg = <0xa000 0x100>; reg-shift = <2>; reg-io-width = <1>; interrupts = <9>; clocks = <&refclk>; status = "disabled"; }; sysctrl: system-controller@d000 { compatible = "simple-mfd", "syscon"; reg = <0xd000 0x100>; sys_pinctrl: pin-controller { compatible = "marvell,berlin2cd-system-pinctrl"; }; }; sic: interrupt-controller@e000 { compatible = "snps,dw-apb-ictl"; reg = <0xe000 0x400>; interrupt-controller; #interrupt-cells = <1>; interrupt-parent = <&gic>; interrupts = ; }; }; }; };