/* * Copyright (C) 2012 STMicroelectronics Limited. * Author: Srinivas Kandagatla * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * publishhed by the Free Software Foundation. */ #include "stih41x.dtsi" #include "stih416-clock.dtsi" #include "stih416-pinctrl.dtsi" #include #include / { L2: cache-controller { compatible = "arm,pl310-cache"; reg = <0xfffe2000 0x1000>; arm,data-latency = <3 3 3>; arm,tag-latency = <2 2 2>; cache-unified; cache-level = <2>; }; soc { #address-cells = <1>; #size-cells = <1>; interrupt-parent = <&intc>; ranges; compatible = "simple-bus"; powerdown: powerdown-controller { #reset-cells = <1>; compatible = "st,stih416-powerdown"; }; softreset: softreset-controller { #reset-cells = <1>; compatible = "st,stih416-softreset"; }; syscfg_sbc:sbc-syscfg@fe600000{ compatible = "st,stih416-sbc-syscfg", "syscon"; reg = <0xfe600000 0x1000>; }; syscfg_front:front-syscfg@fee10000{ compatible = "st,stih416-front-syscfg", "syscon"; reg = <0xfee10000 0x1000>; }; syscfg_rear:rear-syscfg@fe830000{ compatible = "st,stih416-rear-syscfg", "syscon"; reg = <0xfe830000 0x1000>; }; /* MPE */ syscfg_fvdp_fe:fvdp-fe-syscfg@fddf0000{ compatible = "st,stih416-fvdp-fe-syscfg", "syscon"; reg = <0xfddf0000 0x1000>; }; syscfg_fvdp_lite:fvdp-lite-syscfg@fd6a0000{ compatible = "st,stih416-fvdp-lite-syscfg", "syscon"; reg = <0xfd6a0000 0x1000>; }; syscfg_cpu:cpu-syscfg@fdde0000{ compatible = "st,stih416-cpu-syscfg", "syscon"; reg = <0xfdde0000 0x1000>; }; syscfg_compo:compo-syscfg@fd320000{ compatible = "st,stih416-compo-syscfg", "syscon"; reg = <0xfd320000 0x1000>; }; syscfg_transport:transport-syscfg@fd690000{ compatible = "st,stih416-transport-syscfg", "syscon"; reg = <0xfd690000 0x1000>; }; syscfg_lpm:lpm-syscfg@fe4b5100{ compatible = "st,stih416-lpm-syscfg", "syscon"; reg = <0xfe4b5100 0x8>; }; serial2: serial@fed32000{ compatible = "st,asc"; status = "disabled"; reg = <0xfed32000 0x2c>; interrupts = <0 197 0>; clocks = <&clk_s_a0_ls CLK_ICN_REG>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_serial2 &pinctrl_serial2_oe>; }; /* SBC_UART1 */ sbc_serial1: serial@fe531000 { compatible = "st,asc"; status = "disabled"; reg = <0xfe531000 0x2c>; interrupts = <0 210 0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sbc_serial1>; clocks = <&clk_sysin>; }; i2c@fed40000 { compatible = "st,comms-ssc4-i2c"; reg = <0xfed40000 0x110>; interrupts = ; clocks = <&clk_s_a0_ls CLK_ICN_REG>; clock-names = "ssc"; clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0_default>; status = "disabled"; }; i2c@fed41000 { compatible = "st,comms-ssc4-i2c"; reg = <0xfed41000 0x110>; interrupts = ; clocks = <&clk_s_a0_ls CLK_ICN_REG>; clock-names = "ssc"; clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1_default>; status = "disabled"; }; i2c@fe540000 { compatible = "st,comms-ssc4-i2c"; reg = <0xfe540000 0x110>; interrupts = ; clocks = <&clk_sysin>; clock-names = "ssc"; clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sbc_i2c0_default>; status = "disabled"; }; i2c@fe541000 { compatible = "st,comms-ssc4-i2c"; reg = <0xfe541000 0x110>; interrupts = ; clocks = <&clk_sysin>; clock-names = "ssc"; clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sbc_i2c1_default>; status = "disabled"; }; ethernet0: dwmac@fe810000 { device_type = "network"; compatible = "st,stih416-dwmac", "snps,dwmac", "snps,dwmac-3.710"; status = "disabled"; reg = <0xfe810000 0x8000>, <0x8bc 0x4>; reg-names = "stmmaceth", "sti-ethconf"; interrupts = <0 133 0>, <0 134 0>, <0 135 0>; interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; snps,pbl = <32>; snps,mixed-burst; st,syscon = <&syscfg_rear>; resets = <&softreset STIH416_ETH0_SOFTRESET>; reset-names = "stmmaceth"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mii0>; clock-names = "stmmaceth", "sti-ethclk"; clocks = <&clk_s_a1_ls CLK_ICN_IF_2>, <&clk_s_a1_ls CLK_GMAC0_PHY>; }; ethernet1: dwmac@fef08000 { device_type = "network"; compatible = "st,stih416-dwmac", "snps,dwmac", "snps,dwmac-3.710"; status = "disabled"; reg = <0xfef08000 0x8000>, <0x7f0 0x4>; reg-names = "stmmaceth", "sti-ethconf"; interrupts = <0 136 0>, <0 137 0>, <0 138 0>; interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; snps,pbl = <32>; snps,mixed-burst; st,syscon = <&syscfg_sbc>; resets = <&softreset STIH416_ETH1_SOFTRESET>; reset-names = "stmmaceth"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mii1>; clock-names = "stmmaceth", "sti-ethclk"; clocks = <&clk_s_a0_ls CLK_ICN_REG>, <&clk_s_a0_ls CLK_ETH1_PHY>; }; rc: rc@fe518000 { compatible = "st,comms-irb"; reg = <0xfe518000 0x234>; interrupts = <0 203 0>; rx-mode = "infrared"; clocks = <&clk_sysin>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ir>; resets = <&softreset STIH416_IRB_SOFTRESET>; }; /* FSM */ spifsm: spifsm@fe902000 { compatible = "st,spi-fsm"; reg = <0xfe902000 0x1000>; pinctrl-0 = <&pinctrl_fsm>; st,syscfg = <&syscfg_rear>; st,boot-device-reg = <0x958>; st,boot-device-spi = <0x1a>; status = "disabled"; }; keyscan: keyscan@fe4b0000 { compatible = "st,sti-keyscan"; status = "disabled"; reg = <0xfe4b0000 0x2000>; interrupts = ; clocks = <&clk_sysin>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_keyscan>; resets = <&powerdown STIH416_KEYSCAN_POWERDOWN>, <&softreset STIH416_KEYSCAN_SOFTRESET>; }; mmc0: sdhci@fe81e000 { compatible = "st,sdhci"; status = "disabled"; reg = <0xfe81e000 0x1000>; interrupts = ; interrupt-names = "mmcirq"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mmc0>; clock-names = "mmc"; clocks = <&clk_s_a1_ls 1>; }; mmc1: sdhci@fe81f000 { compatible = "st,sdhci"; status = "disabled"; reg = <0xfe81f000 0x1000>; interrupts = ; interrupt-names = "mmcirq"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mmc1>; clock-names = "mmc"; clocks = <&clk_s_a1_ls 8>; }; }; };