linux/arch/riscv
Zong Li 00cb41d5ad
riscv: add alignment for text, rodata and data sections
The kernel mapping will tried to optimize its mapping by using bigger
size. In rv64, it tries to use PMD_SIZE, and tryies to use PGDIR_SIZE in
rv32. To ensure that the start address of these sections could fit the
mapping entry size, make them align to the biggest alignment.

Define a macro SECTION_ALIGN because the HPAGE_SIZE or PMD_SIZE, etc.,
are invisible in linker script.

This patch is prepared for STRICT_KERNEL_RWX support.

Signed-off-by: Zong Li <zong.li@sifive.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-03-26 09:24:42 -07:00
..
boot riscv: Fix gitignore 2020-02-19 16:13:51 -08:00
configs riscv: Delete CONFIG_SYSFS_SYSCALL from defconfigs 2020-03-03 10:28:11 -08:00
include riscv: add alignment for text, rodata and data sections 2020-03-26 09:24:42 -07:00
kernel riscv: add alignment for text, rodata and data sections 2020-03-26 09:24:42 -07:00
lib RISC-V: Stop using LOCAL for the uaccess fixups 2020-03-03 10:45:14 -08:00
mm riscv: add ARCH_SUPPORTS_DEBUG_PAGEALLOC support 2020-03-26 09:24:36 -07:00
net Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next 2019-12-27 14:20:10 -08:00
Kbuild riscv: add arch/riscv/Kbuild 2019-08-30 17:34:00 -07:00
Kconfig riscv: add ARCH_SUPPORTS_DEBUG_PAGEALLOC support 2020-03-26 09:24:36 -07:00
Kconfig.debug RISC-V: Remove EARLY_PRINTK support 2018-12-17 10:23:46 -08:00
Kconfig.socs riscv: only select serial sifive if TTY is enabled 2019-12-08 20:29:01 -08:00
Makefile riscv: provide a flat image loader 2019-11-17 15:17:39 -08:00