mirror of https://gitee.com/openkylin/linux.git
89 lines
2.9 KiB
C
89 lines
2.9 KiB
C
/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef _POLARIS10_SMUMANAGER_H
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#define _POLARIS10_SMUMANAGER_H
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#include <polaris10_ppsmc.h>
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#include <pp_endian.h>
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#include "smu74.h"
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struct polaris10_avfs {
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enum AVFS_BTC_STATUS avfs_btc_status;
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uint32_t avfs_btc_param;
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};
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struct polaris10_pt_defaults {
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uint8_t SviLoadLineEn;
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uint8_t SviLoadLineVddC;
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uint8_t TDC_VDDC_ThrottleReleaseLimitPerc;
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uint8_t TDC_MAWt;
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uint8_t TdcWaterfallCtl;
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uint8_t DTEAmbientTempBase;
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uint32_t DisplayCac;
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uint32_t BAPM_TEMP_GRADIENT;
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uint16_t BAPMTI_R[SMU74_DTE_ITERATIONS * SMU74_DTE_SOURCES * SMU74_DTE_SINKS];
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uint16_t BAPMTI_RC[SMU74_DTE_ITERATIONS * SMU74_DTE_SOURCES * SMU74_DTE_SINKS];
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};
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struct polaris10_buffer_entry {
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uint32_t data_size;
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uint32_t mc_addr_low;
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uint32_t mc_addr_high;
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void *kaddr;
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unsigned long handle;
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};
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struct polaris10_range_table {
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uint32_t trans_lower_frequency; /* in 10khz */
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uint32_t trans_upper_frequency;
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};
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struct polaris10_smumgr {
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uint8_t *header;
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uint8_t *mec_image;
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struct polaris10_buffer_entry smu_buffer;
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struct polaris10_buffer_entry header_buffer;
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uint32_t soft_regs_start;
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uint8_t *read_rrm_straps;
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uint32_t read_drm_straps_mc_address_high;
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uint32_t read_drm_straps_mc_address_low;
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uint32_t acpi_optimization;
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bool post_initial_boot;
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uint8_t protected_mode;
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uint8_t security_hard_key;
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struct polaris10_avfs avfs;
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};
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int polaris10_smum_init(struct pp_smumgr *smumgr);
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int polaris10_read_smc_sram_dword(struct pp_smumgr *smumgr, uint32_t smc_addr, uint32_t *value, uint32_t limit);
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int polaris10_write_smc_sram_dword(struct pp_smumgr *smumgr, uint32_t smc_addr, uint32_t value, uint32_t limit);
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int polaris10_copy_bytes_to_smc(struct pp_smumgr *smumgr, uint32_t smc_start_address,
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const uint8_t *src, uint32_t byte_count, uint32_t limit);
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#endif
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