mirror of https://gitee.com/openkylin/linux.git
3bb1555c0d
The clock generator in IOFPGA generates the two source clocks: 32kHz and
1MHz for the SP810 System Controller.
The SP810 System Controller selects 32kHz or 1MHz as the sources for
TIM_CLK[3:0], the SP804 timer clocks. The powerup default is 32kHz but
the maximum of "refclk" and "timclk" is chosen by the SP810 driver.
This patch adds support for SP810 system controller and also fixes the
SP804 timer clock frequency.
However the SP804 driver needs to be enabled on ARM64 to test this,
which requires SP804 driver to be moved out of arch/arm.
Fixes:
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| .. | ||
| amd | ||
| apm | ||
| arm | ||
| cavium | ||
| exynos | ||
| freescale | ||
| include | ||
| mediatek | ||
| qcom | ||
| sprd | ||
| xilinx | ||
| .gitignore | ||
| Makefile | ||
| skeleton.dtsi | ||