mirror of https://gitee.com/openkylin/linux.git
635 lines
20 KiB
C
635 lines
20 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Driver for the Conexant CX23885 PCIe bridge
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*
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* Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/pci.h>
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#include <linux/i2c.h>
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#include <linux/kdev_t.h>
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#include <linux/slab.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-fh.h>
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#include <media/v4l2-ctrls.h>
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#include <media/tuner.h>
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#include <media/tveeprom.h>
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#include <media/videobuf2-dma-sg.h>
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#include <media/videobuf2-dvb.h>
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#include <media/rc-core.h>
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#include "cx23885-reg.h"
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#include "media/drv-intf/cx2341x.h"
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#include <linux/mutex.h>
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#define CX23885_VERSION "0.0.4"
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#define UNSET (-1U)
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#define CX23885_MAXBOARDS 8
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/* Max number of inputs by card */
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#define MAX_CX23885_INPUT 8
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#define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
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#define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
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#define CX23885_BOARD_NOAUTO UNSET
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#define CX23885_BOARD_UNKNOWN 0
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#define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1
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#define CX23885_BOARD_HAUPPAUGE_HVR1800 2
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#define CX23885_BOARD_HAUPPAUGE_HVR1250 3
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#define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4
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#define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5
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#define CX23885_BOARD_HAUPPAUGE_HVR1500 6
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#define CX23885_BOARD_HAUPPAUGE_HVR1200 7
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#define CX23885_BOARD_HAUPPAUGE_HVR1700 8
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#define CX23885_BOARD_HAUPPAUGE_HVR1400 9
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#define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
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#define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
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#define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
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#define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13
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#define CX23885_BOARD_TBS_6920 14
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#define CX23885_BOARD_TEVII_S470 15
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#define CX23885_BOARD_DVBWORLD_2005 16
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#define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17
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#define CX23885_BOARD_HAUPPAUGE_HVR1270 18
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#define CX23885_BOARD_HAUPPAUGE_HVR1275 19
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#define CX23885_BOARD_HAUPPAUGE_HVR1255 20
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#define CX23885_BOARD_HAUPPAUGE_HVR1210 21
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#define CX23885_BOARD_MYGICA_X8506 22
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#define CX23885_BOARD_MAGICPRO_PROHDTVE2 23
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#define CX23885_BOARD_HAUPPAUGE_HVR1850 24
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#define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25
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#define CX23885_BOARD_HAUPPAUGE_HVR1290 26
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#define CX23885_BOARD_MYGICA_X8558PRO 27
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#define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28
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#define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID 29
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#define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30
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#define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31
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#define CX23885_BOARD_MPX885 32
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#define CX23885_BOARD_MYGICA_X8507 33
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#define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34
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#define CX23885_BOARD_TEVII_S471 35
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#define CX23885_BOARD_HAUPPAUGE_HVR1255_22111 36
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#define CX23885_BOARD_PROF_8000 37
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#define CX23885_BOARD_HAUPPAUGE_HVR4400 38
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#define CX23885_BOARD_AVERMEDIA_HC81R 39
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#define CX23885_BOARD_TBS_6981 40
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#define CX23885_BOARD_TBS_6980 41
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#define CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200 42
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#define CX23885_BOARD_HAUPPAUGE_IMPACTVCBE 43
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#define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2 44
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#define CX23885_BOARD_DVBSKY_T9580 45
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#define CX23885_BOARD_DVBSKY_T980C 46
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#define CX23885_BOARD_DVBSKY_S950C 47
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#define CX23885_BOARD_TT_CT2_4500_CI 48
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#define CX23885_BOARD_DVBSKY_S950 49
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#define CX23885_BOARD_DVBSKY_S952 50
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#define CX23885_BOARD_DVBSKY_T982 51
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#define CX23885_BOARD_HAUPPAUGE_HVR5525 52
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#define CX23885_BOARD_HAUPPAUGE_STARBURST 53
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#define CX23885_BOARD_VIEWCAST_260E 54
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#define CX23885_BOARD_VIEWCAST_460E 55
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#define CX23885_BOARD_HAUPPAUGE_QUADHD_DVB 56
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#define CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC 57
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#define CX23885_BOARD_HAUPPAUGE_HVR1265_K4 58
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#define CX23885_BOARD_HAUPPAUGE_STARBURST2 59
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#define CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885 60
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#define CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885 61
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#define CX23885_BOARD_AVERMEDIA_CE310B 62
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#define GPIO_0 0x00000001
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#define GPIO_1 0x00000002
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#define GPIO_2 0x00000004
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#define GPIO_3 0x00000008
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#define GPIO_4 0x00000010
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#define GPIO_5 0x00000020
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#define GPIO_6 0x00000040
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#define GPIO_7 0x00000080
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#define GPIO_8 0x00000100
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#define GPIO_9 0x00000200
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#define GPIO_10 0x00000400
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#define GPIO_11 0x00000800
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#define GPIO_12 0x00001000
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#define GPIO_13 0x00002000
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#define GPIO_14 0x00004000
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#define GPIO_15 0x00008000
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/* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
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#define CX23885_NORMS (\
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V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
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V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
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V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
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V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
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struct cx23885_fmt {
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u32 fourcc; /* v4l2 format id */
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int depth;
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int flags;
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u32 cxformat;
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};
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struct cx23885_tvnorm {
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char *name;
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v4l2_std_id id;
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u32 cxiformat;
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u32 cxoformat;
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};
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enum cx23885_itype {
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CX23885_VMUX_COMPOSITE1 = 1,
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CX23885_VMUX_COMPOSITE2,
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CX23885_VMUX_COMPOSITE3,
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CX23885_VMUX_COMPOSITE4,
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CX23885_VMUX_SVIDEO,
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CX23885_VMUX_COMPONENT,
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CX23885_VMUX_TELEVISION,
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CX23885_VMUX_CABLE,
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CX23885_VMUX_DVB,
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CX23885_VMUX_DEBUG,
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CX23885_RADIO,
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};
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enum cx23885_src_sel_type {
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CX23885_SRC_SEL_EXT_656_VIDEO = 0,
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CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
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};
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struct cx23885_riscmem {
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unsigned int size;
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__le32 *cpu;
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__le32 *jmp;
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dma_addr_t dma;
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};
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/* buffer for one video frame */
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struct cx23885_buffer {
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/* common v4l buffer stuff -- must be first */
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struct vb2_v4l2_buffer vb;
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struct list_head queue;
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/* cx23885 specific */
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unsigned int bpl;
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struct cx23885_riscmem risc;
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struct cx23885_fmt *fmt;
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u32 count;
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};
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struct cx23885_input {
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enum cx23885_itype type;
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unsigned int vmux;
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unsigned int amux;
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u32 gpio0, gpio1, gpio2, gpio3;
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};
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typedef enum {
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CX23885_MPEG_UNDEFINED = 0,
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CX23885_MPEG_DVB,
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CX23885_ANALOG_VIDEO,
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CX23885_MPEG_ENCODER,
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} port_t;
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struct cx23885_board {
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char *name;
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port_t porta, portb, portc;
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int num_fds_portb, num_fds_portc;
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unsigned int tuner_type;
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unsigned int radio_type;
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unsigned char tuner_addr;
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unsigned char radio_addr;
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unsigned int tuner_bus;
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/* Vendors can and do run the PCIe bridge at different
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* clock rates, driven physically by crystals on the PCBs.
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* The core has to accommodate this. This allows the user
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* to add new boards with new frequencys. The value is
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* expressed in Hz.
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*
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* The core framework will default this value based on
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* current designs, but it can vary.
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*/
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u32 clk_freq;
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struct cx23885_input input[MAX_CX23885_INPUT];
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int ci_type; /* for NetUP */
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/* Force bottom field first during DMA (888 workaround) */
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u32 force_bff;
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};
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struct cx23885_subid {
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u16 subvendor;
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u16 subdevice;
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u32 card;
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};
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struct cx23885_i2c {
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struct cx23885_dev *dev;
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int nr;
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/* i2c i/o */
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struct i2c_adapter i2c_adap;
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struct i2c_client i2c_client;
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u32 i2c_rc;
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/* 885 registers used for raw address */
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u32 i2c_period;
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u32 reg_ctrl;
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u32 reg_stat;
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u32 reg_addr;
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u32 reg_rdata;
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u32 reg_wdata;
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};
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struct cx23885_dmaqueue {
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struct list_head active;
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u32 count;
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};
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struct cx23885_tsport {
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struct cx23885_dev *dev;
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unsigned nr;
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int sram_chno;
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struct vb2_dvb_frontends frontends;
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/* dma queues */
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struct cx23885_dmaqueue mpegq;
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u32 ts_packet_size;
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u32 ts_packet_count;
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int width;
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int height;
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spinlock_t slock;
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/* registers */
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u32 reg_gpcnt;
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u32 reg_gpcnt_ctl;
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u32 reg_dma_ctl;
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u32 reg_lngth;
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u32 reg_hw_sop_ctrl;
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u32 reg_gen_ctrl;
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u32 reg_bd_pkt_status;
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u32 reg_sop_status;
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u32 reg_fifo_ovfl_stat;
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u32 reg_vld_misc;
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u32 reg_ts_clk_en;
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u32 reg_ts_int_msk;
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u32 reg_ts_int_stat;
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u32 reg_src_sel;
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/* Default register vals */
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int pci_irqmask;
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u32 dma_ctl_val;
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u32 ts_int_msk_val;
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u32 gen_ctrl_val;
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u32 ts_clk_en_val;
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u32 src_sel_val;
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u32 vld_misc_val;
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u32 hw_sop_ctrl_val;
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/* Allow a single tsport to have multiple frontends */
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u32 num_frontends;
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void (*gate_ctrl)(struct cx23885_tsport *port, int open);
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void *port_priv;
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/* Workaround for a temp dvb_frontend that the tuner can attached to */
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struct dvb_frontend analog_fe;
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struct i2c_client *i2c_client_demod;
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struct i2c_client *i2c_client_tuner;
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struct i2c_client *i2c_client_sec;
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struct i2c_client *i2c_client_ci;
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int (*set_frontend)(struct dvb_frontend *fe);
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int (*fe_set_voltage)(struct dvb_frontend *fe,
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enum fe_sec_voltage voltage);
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};
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struct cx23885_kernel_ir {
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struct cx23885_dev *cx;
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char *name;
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char *phys;
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struct rc_dev *rc;
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};
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struct cx23885_audio_buffer {
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unsigned int bpl;
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struct cx23885_riscmem risc;
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void *vaddr;
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struct scatterlist *sglist;
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int sglen;
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unsigned long nr_pages;
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};
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struct cx23885_audio_dev {
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struct cx23885_dev *dev;
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struct pci_dev *pci;
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struct snd_card *card;
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spinlock_t lock;
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atomic_t count;
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unsigned int dma_size;
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unsigned int period_size;
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unsigned int num_periods;
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struct cx23885_audio_buffer *buf;
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struct snd_pcm_substream *substream;
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};
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struct cx23885_dev {
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atomic_t refcount;
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struct v4l2_device v4l2_dev;
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struct v4l2_ctrl_handler ctrl_handler;
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/* pci stuff */
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struct pci_dev *pci;
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unsigned char pci_rev, pci_lat;
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int pci_bus, pci_slot;
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u32 __iomem *lmmio;
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u8 __iomem *bmmio;
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int pci_irqmask;
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spinlock_t pci_irqmask_lock; /* protects mask reg too */
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int hwrevision;
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/* This valud is board specific and is used to configure the
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* AV core so we see nice clean and stable video and audio. */
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u32 clk_freq;
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/* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
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struct cx23885_i2c i2c_bus[3];
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int nr;
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struct mutex lock;
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struct mutex gpio_lock;
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/* board details */
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unsigned int board;
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char name[32];
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struct cx23885_tsport ts1, ts2;
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/* sram configuration */
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struct sram_channel *sram_channels;
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enum {
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CX23885_BRIDGE_UNDEFINED = 0,
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CX23885_BRIDGE_885 = 885,
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CX23885_BRIDGE_887 = 887,
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CX23885_BRIDGE_888 = 888,
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} bridge;
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/* Analog video */
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unsigned int input;
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unsigned int audinput; /* Selectable audio input */
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u32 tvaudio;
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v4l2_std_id tvnorm;
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unsigned int tuner_type;
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unsigned char tuner_addr;
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unsigned int tuner_bus;
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unsigned int radio_type;
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unsigned char radio_addr;
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struct v4l2_subdev *sd_cx25840;
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struct work_struct cx25840_work;
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/* Infrared */
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struct v4l2_subdev *sd_ir;
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struct work_struct ir_rx_work;
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unsigned long ir_rx_notifications;
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struct work_struct ir_tx_work;
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unsigned long ir_tx_notifications;
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struct cx23885_kernel_ir *kernel_ir;
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atomic_t ir_input_stopping;
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/* V4l */
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u32 freq;
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struct video_device *video_dev;
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struct video_device *vbi_dev;
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/* video capture */
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struct cx23885_fmt *fmt;
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unsigned int width, height;
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unsigned field;
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struct cx23885_dmaqueue vidq;
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struct vb2_queue vb2_vidq;
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struct cx23885_dmaqueue vbiq;
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struct vb2_queue vb2_vbiq;
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spinlock_t slock;
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/* MPEG Encoder ONLY settings */
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u32 cx23417_mailbox;
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struct cx2341x_handler cxhdl;
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struct video_device *v4l_device;
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struct vb2_queue vb2_mpegq;
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struct cx23885_tvnorm encodernorm;
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/* Analog raw audio */
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struct cx23885_audio_dev *audio_dev;
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/* Does the system require periodic DMA resets? */
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unsigned int need_dma_reset:1;
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};
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static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
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{
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return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev);
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}
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#define call_all(dev, o, f, args...) \
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v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)
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#define CX23885_HW_888_IR (1 << 0)
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#define CX23885_HW_AV_CORE (1 << 1)
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#define call_hw(dev, grpid, o, f, args...) \
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v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args)
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extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw);
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#define SRAM_CH01 0 /* Video A */
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#define SRAM_CH02 1 /* VBI A */
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#define SRAM_CH03 2 /* Video B */
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#define SRAM_CH04 3 /* Transport via B */
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#define SRAM_CH05 4 /* VBI B */
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#define SRAM_CH06 5 /* Video C */
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#define SRAM_CH07 6 /* Transport via C */
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#define SRAM_CH08 7 /* Audio Internal A */
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#define SRAM_CH09 8 /* Audio Internal B */
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#define SRAM_CH10 9 /* Audio External */
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#define SRAM_CH11 10 /* COMB_3D_N */
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#define SRAM_CH12 11 /* Comb 3D N1 */
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#define SRAM_CH13 12 /* Comb 3D N2 */
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#define SRAM_CH14 13 /* MOE Vid */
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#define SRAM_CH15 14 /* MOE RSLT */
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struct sram_channel {
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char *name;
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u32 cmds_start;
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u32 ctrl_start;
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u32 cdt;
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u32 fifo_start;
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u32 fifo_size;
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u32 ptr1_reg;
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u32 ptr2_reg;
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u32 cnt1_reg;
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u32 cnt2_reg;
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u32 jumponly;
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};
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/* ----------------------------------------------------------- */
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#define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
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#define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2))
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#define cx_andor(reg, mask, value) \
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writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
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((value) & (mask)), dev->lmmio+((reg)>>2))
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#define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
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#define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
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/* ----------------------------------------------------------- */
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/* cx23885-core.c */
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|
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extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
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struct sram_channel *ch,
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unsigned int bpl, u32 risc);
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|
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extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
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struct sram_channel *ch);
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|
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extern int cx23885_risc_buffer(struct pci_dev *pci, struct cx23885_riscmem *risc,
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struct scatterlist *sglist,
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unsigned int top_offset, unsigned int bottom_offset,
|
|
unsigned int bpl, unsigned int padding, unsigned int lines);
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|
|
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extern int cx23885_risc_vbibuffer(struct pci_dev *pci,
|
|
struct cx23885_riscmem *risc, struct scatterlist *sglist,
|
|
unsigned int top_offset, unsigned int bottom_offset,
|
|
unsigned int bpl, unsigned int padding, unsigned int lines);
|
|
|
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int cx23885_start_dma(struct cx23885_tsport *port,
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|
struct cx23885_dmaqueue *q,
|
|
struct cx23885_buffer *buf);
|
|
void cx23885_cancel_buffers(struct cx23885_tsport *port);
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|
|
|
|
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extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
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extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
|
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extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask);
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|
extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask,
|
|
int asoutput);
|
|
|
|
extern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask);
|
|
extern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask);
|
|
extern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask);
|
|
extern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask);
|
|
|
|
/* ----------------------------------------------------------- */
|
|
/* cx23885-cards.c */
|
|
extern struct cx23885_board cx23885_boards[];
|
|
extern const unsigned int cx23885_bcount;
|
|
|
|
extern struct cx23885_subid cx23885_subids[];
|
|
extern const unsigned int cx23885_idcount;
|
|
|
|
extern int cx23885_tuner_callback(void *priv, int component,
|
|
int command, int arg);
|
|
extern void cx23885_card_list(struct cx23885_dev *dev);
|
|
extern int cx23885_ir_init(struct cx23885_dev *dev);
|
|
extern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev);
|
|
extern void cx23885_ir_fini(struct cx23885_dev *dev);
|
|
extern void cx23885_gpio_setup(struct cx23885_dev *dev);
|
|
extern void cx23885_card_setup(struct cx23885_dev *dev);
|
|
extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
|
|
|
|
extern int cx23885_dvb_register(struct cx23885_tsport *port);
|
|
extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
|
|
|
|
extern int cx23885_buf_prepare(struct cx23885_buffer *buf,
|
|
struct cx23885_tsport *port);
|
|
extern void cx23885_buf_queue(struct cx23885_tsport *port,
|
|
struct cx23885_buffer *buf);
|
|
extern void cx23885_free_buffer(struct cx23885_dev *dev,
|
|
struct cx23885_buffer *buf);
|
|
|
|
/* ----------------------------------------------------------- */
|
|
/* cx23885-video.c */
|
|
/* Video */
|
|
extern int cx23885_video_register(struct cx23885_dev *dev);
|
|
extern void cx23885_video_unregister(struct cx23885_dev *dev);
|
|
extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
|
|
extern void cx23885_video_wakeup(struct cx23885_dev *dev,
|
|
struct cx23885_dmaqueue *q, u32 count);
|
|
int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i);
|
|
int cx23885_set_input(struct file *file, void *priv, unsigned int i);
|
|
int cx23885_get_input(struct file *file, void *priv, unsigned int *i);
|
|
int cx23885_set_frequency(struct file *file, void *priv, const struct v4l2_frequency *f);
|
|
int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm);
|
|
|
|
/* ----------------------------------------------------------- */
|
|
/* cx23885-vbi.c */
|
|
extern int cx23885_vbi_fmt(struct file *file, void *priv,
|
|
struct v4l2_format *f);
|
|
extern void cx23885_vbi_timeout(unsigned long data);
|
|
extern const struct vb2_ops cx23885_vbi_qops;
|
|
extern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status);
|
|
|
|
/* cx23885-i2c.c */
|
|
extern int cx23885_i2c_register(struct cx23885_i2c *bus);
|
|
extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
|
|
extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
|
|
|
|
/* ----------------------------------------------------------- */
|
|
/* cx23885-417.c */
|
|
extern int cx23885_417_register(struct cx23885_dev *dev);
|
|
extern void cx23885_417_unregister(struct cx23885_dev *dev);
|
|
extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
|
|
extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
|
|
extern void cx23885_mc417_init(struct cx23885_dev *dev);
|
|
extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
|
|
extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
|
|
extern int mc417_register_read(struct cx23885_dev *dev,
|
|
u16 address, u32 *value);
|
|
extern int mc417_register_write(struct cx23885_dev *dev,
|
|
u16 address, u32 value);
|
|
extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask);
|
|
extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask);
|
|
extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput);
|
|
|
|
/* ----------------------------------------------------------- */
|
|
/* cx23885-alsa.c */
|
|
extern struct cx23885_audio_dev *cx23885_audio_register(
|
|
struct cx23885_dev *dev);
|
|
extern void cx23885_audio_unregister(struct cx23885_dev *dev);
|
|
extern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask);
|
|
extern int cx23885_risc_databuffer(struct pci_dev *pci,
|
|
struct cx23885_riscmem *risc,
|
|
struct scatterlist *sglist,
|
|
unsigned int bpl,
|
|
unsigned int lines,
|
|
unsigned int lpi);
|
|
|
|
/* ----------------------------------------------------------- */
|
|
/* tv norms */
|
|
|
|
static inline unsigned int norm_maxh(v4l2_std_id norm)
|
|
{
|
|
return (norm & V4L2_STD_525_60) ? 480 : 576;
|
|
}
|