mirror of https://gitee.com/openkylin/linux.git
1510 lines
38 KiB
C
1510 lines
38 KiB
C
/*
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* Compaq Hot Plug Controller Driver
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*
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* Copyright (C) 1995,2001 Compaq Computer Corporation
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* Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
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* Copyright (C) 2001 IBM Corp.
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*
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Send feedback to <greg@kroah.com>
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*
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* Jan 12, 2003 - Added 66/100/133MHz PCI-X support,
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* Torben Mathiasen <torben.mathiasen@hp.com>
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*
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*/
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/proc_fs.h>
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#include <linux/slab.h>
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#include <linux/workqueue.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <asm/uaccess.h>
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#include "cpqphp.h"
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#include "cpqphp_nvram.h"
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#include "../../../arch/i386/pci/pci.h" /* horrible hack showing how processor dependent we are... */
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/* Global variables */
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int cpqhp_debug;
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int cpqhp_legacy_mode;
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struct controller *cpqhp_ctrl_list; /* = NULL */
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struct pci_func *cpqhp_slot_list[256];
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/* local variables */
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static void __iomem *smbios_table;
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static void __iomem *smbios_start;
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static void __iomem *cpqhp_rom_start;
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static int power_mode;
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static int debug;
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#define DRIVER_VERSION "0.9.8"
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#define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
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#define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver"
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MODULE_AUTHOR(DRIVER_AUTHOR);
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MODULE_DESCRIPTION(DRIVER_DESC);
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MODULE_LICENSE("GPL");
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module_param(power_mode, bool, 0644);
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MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
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module_param(debug, bool, 0644);
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MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
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#define CPQHPC_MODULE_MINOR 208
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static int one_time_init (void);
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static int set_attention_status (struct hotplug_slot *slot, u8 value);
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static int process_SI (struct hotplug_slot *slot);
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static int process_SS (struct hotplug_slot *slot);
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static int hardware_test (struct hotplug_slot *slot, u32 value);
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static int get_power_status (struct hotplug_slot *slot, u8 *value);
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static int get_attention_status (struct hotplug_slot *slot, u8 *value);
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static int get_latch_status (struct hotplug_slot *slot, u8 *value);
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static int get_adapter_status (struct hotplug_slot *slot, u8 *value);
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static int get_max_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value);
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static int get_cur_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value);
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static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
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.owner = THIS_MODULE,
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.set_attention_status = set_attention_status,
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.enable_slot = process_SI,
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.disable_slot = process_SS,
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.hardware_test = hardware_test,
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.get_power_status = get_power_status,
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.get_attention_status = get_attention_status,
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.get_latch_status = get_latch_status,
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.get_adapter_status = get_adapter_status,
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.get_max_bus_speed = get_max_bus_speed,
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.get_cur_bus_speed = get_cur_bus_speed,
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};
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static inline int is_slot64bit(struct slot *slot)
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{
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return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
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}
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static inline int is_slot66mhz(struct slot *slot)
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{
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return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
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}
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/**
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* detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
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*
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* @begin: begin pointer for region to be scanned.
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* @end: end pointer for region to be scanned.
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*
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* Returns pointer to the head of the SMBIOS tables (or NULL)
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*
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*/
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static void __iomem * detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end)
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{
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void __iomem *fp;
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void __iomem *endp;
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u8 temp1, temp2, temp3, temp4;
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int status = 0;
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endp = (end - sizeof(u32) + 1);
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for (fp = begin; fp <= endp; fp += 16) {
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temp1 = readb(fp);
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temp2 = readb(fp+1);
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temp3 = readb(fp+2);
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temp4 = readb(fp+3);
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if (temp1 == '_' &&
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temp2 == 'S' &&
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temp3 == 'M' &&
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temp4 == '_') {
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status = 1;
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break;
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}
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}
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if (!status)
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fp = NULL;
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dbg("Discovered SMBIOS Entry point at %p\n", fp);
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return fp;
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}
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/**
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* init_SERR - Initializes the per slot SERR generation.
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*
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* For unexpected switch opens
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*
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*/
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static int init_SERR(struct controller * ctrl)
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{
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u32 tempdword;
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u32 number_of_slots;
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u8 physical_slot;
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if (!ctrl)
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return 1;
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tempdword = ctrl->first_slot;
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number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
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// Loop through slots
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while (number_of_slots) {
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physical_slot = tempdword;
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writeb(0, ctrl->hpc_reg + SLOT_SERR);
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tempdword++;
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number_of_slots--;
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}
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return 0;
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}
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/* nice debugging output */
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static int pci_print_IRQ_route (void)
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{
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struct irq_routing_table *routing_table;
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int len;
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int loop;
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u8 tbus, tdevice, tslot;
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routing_table = pcibios_get_irq_routing_table();
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if (routing_table == NULL) {
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err("No BIOS Routing Table??? Not good\n");
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return -ENOMEM;
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}
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len = (routing_table->size - sizeof(struct irq_routing_table)) /
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sizeof(struct irq_info);
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// Make sure I got at least one entry
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if (len == 0) {
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kfree(routing_table);
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return -1;
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}
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dbg("bus dev func slot\n");
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for (loop = 0; loop < len; ++loop) {
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tbus = routing_table->slots[loop].bus;
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tdevice = routing_table->slots[loop].devfn;
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tslot = routing_table->slots[loop].slot;
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dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
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}
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kfree(routing_table);
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return 0;
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}
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/**
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* get_subsequent_smbios_entry: get the next entry from bios table.
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*
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* Gets the first entry if previous == NULL
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* Otherwise, returns the next entry
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* Uses global SMBIOS Table pointer
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*
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* @curr: %NULL or pointer to previously returned structure
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*
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* returns a pointer to an SMBIOS structure or NULL if none found
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*/
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static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
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void __iomem *smbios_table,
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void __iomem *curr)
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{
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u8 bail = 0;
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u8 previous_byte = 1;
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void __iomem *p_temp;
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void __iomem *p_max;
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if (!smbios_table || !curr)
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return(NULL);
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// set p_max to the end of the table
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p_max = smbios_start + readw(smbios_table + ST_LENGTH);
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p_temp = curr;
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p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
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while ((p_temp < p_max) && !bail) {
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/* Look for the double NULL terminator
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* The first condition is the previous byte
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* and the second is the curr */
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if (!previous_byte && !(readb(p_temp))) {
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bail = 1;
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}
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previous_byte = readb(p_temp);
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p_temp++;
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}
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if (p_temp < p_max) {
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return p_temp;
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} else {
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return NULL;
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}
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}
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/**
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* get_SMBIOS_entry
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*
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* @type:SMBIOS structure type to be returned
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* @previous: %NULL or pointer to previously returned structure
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*
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* Gets the first entry of the specified type if previous == NULL
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* Otherwise, returns the next entry of the given type.
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* Uses global SMBIOS Table pointer
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* Uses get_subsequent_smbios_entry
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*
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* returns a pointer to an SMBIOS structure or %NULL if none found
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*/
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static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start,
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void __iomem *smbios_table,
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u8 type,
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void __iomem *previous)
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{
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if (!smbios_table)
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return NULL;
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if (!previous) {
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previous = smbios_start;
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} else {
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previous = get_subsequent_smbios_entry(smbios_start,
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smbios_table, previous);
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}
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while (previous) {
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if (readb(previous + SMBIOS_GENERIC_TYPE) != type) {
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previous = get_subsequent_smbios_entry(smbios_start,
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smbios_table, previous);
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} else {
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break;
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}
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}
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return previous;
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}
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static void release_slot(struct hotplug_slot *hotplug_slot)
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{
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struct slot *slot = hotplug_slot->private;
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dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
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kfree(slot->hotplug_slot->info);
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kfree(slot->hotplug_slot->name);
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kfree(slot->hotplug_slot);
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kfree(slot);
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}
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static int ctrl_slot_setup(struct controller *ctrl,
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void __iomem *smbios_start,
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void __iomem *smbios_table)
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{
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struct slot *new_slot;
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u8 number_of_slots;
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u8 slot_device;
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u8 slot_number;
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u8 ctrl_slot;
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u32 tempdword;
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void __iomem *slot_entry= NULL;
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int result = -ENOMEM;
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dbg("%s\n", __FUNCTION__);
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tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
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number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
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slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
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slot_number = ctrl->first_slot;
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while (number_of_slots) {
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new_slot = kmalloc(sizeof(*new_slot), GFP_KERNEL);
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if (!new_slot)
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goto error;
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memset(new_slot, 0, sizeof(struct slot));
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new_slot->hotplug_slot = kmalloc(sizeof(*(new_slot->hotplug_slot)),
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GFP_KERNEL);
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if (!new_slot->hotplug_slot)
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goto error_slot;
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memset(new_slot->hotplug_slot, 0, sizeof(struct hotplug_slot));
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new_slot->hotplug_slot->info =
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kmalloc(sizeof(*(new_slot->hotplug_slot->info)),
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GFP_KERNEL);
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if (!new_slot->hotplug_slot->info)
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goto error_hpslot;
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memset(new_slot->hotplug_slot->info, 0,
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sizeof(struct hotplug_slot_info));
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new_slot->hotplug_slot->name = kmalloc(SLOT_NAME_SIZE, GFP_KERNEL);
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if (!new_slot->hotplug_slot->name)
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goto error_info;
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new_slot->ctrl = ctrl;
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new_slot->bus = ctrl->bus;
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new_slot->device = slot_device;
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new_slot->number = slot_number;
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dbg("slot->number = %d\n",new_slot->number);
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slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
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slot_entry);
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while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) != new_slot->number)) {
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slot_entry = get_SMBIOS_entry(smbios_start,
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smbios_table, 9, slot_entry);
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}
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new_slot->p_sm_slot = slot_entry;
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init_timer(&new_slot->task_event);
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new_slot->task_event.expires = jiffies + 5 * HZ;
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new_slot->task_event.function = cpqhp_pushbutton_thread;
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//FIXME: these capabilities aren't used but if they are
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// they need to be correctly implemented
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new_slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
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new_slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
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if (is_slot64bit(new_slot))
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new_slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
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if (is_slot66mhz(new_slot))
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new_slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
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if (ctrl->speed == PCI_SPEED_66MHz)
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new_slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
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ctrl_slot = slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
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// Check presence
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new_slot->capabilities |= ((((~tempdword) >> 23) | ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
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// Check the switch state
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new_slot->capabilities |= ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
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// Check the slot enable
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new_slot->capabilities |= ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
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/* register this slot with the hotplug pci core */
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new_slot->hotplug_slot->release = &release_slot;
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new_slot->hotplug_slot->private = new_slot;
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make_slot_name(new_slot->hotplug_slot->name, SLOT_NAME_SIZE, new_slot);
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new_slot->hotplug_slot->ops = &cpqphp_hotplug_slot_ops;
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new_slot->hotplug_slot->info->power_status = get_slot_enabled(ctrl, new_slot);
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new_slot->hotplug_slot->info->attention_status = cpq_get_attention_status(ctrl, new_slot);
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new_slot->hotplug_slot->info->latch_status = cpq_get_latch_status(ctrl, new_slot);
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new_slot->hotplug_slot->info->adapter_status = get_presence_status(ctrl, new_slot);
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dbg ("registering bus %d, dev %d, number %d, "
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"ctrl->slot_device_offset %d, slot %d\n",
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new_slot->bus, new_slot->device,
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new_slot->number, ctrl->slot_device_offset,
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slot_number);
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result = pci_hp_register (new_slot->hotplug_slot);
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if (result) {
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err ("pci_hp_register failed with error %d\n", result);
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goto error_name;
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}
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new_slot->next = ctrl->slot;
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ctrl->slot = new_slot;
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number_of_slots--;
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slot_device++;
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slot_number++;
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}
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return 0;
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error_name:
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kfree(new_slot->hotplug_slot->name);
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error_info:
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kfree(new_slot->hotplug_slot->info);
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error_hpslot:
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kfree(new_slot->hotplug_slot);
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error_slot:
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kfree(new_slot);
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error:
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return result;
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}
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|
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static int ctrl_slot_cleanup (struct controller * ctrl)
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{
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struct slot *old_slot, *next_slot;
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old_slot = ctrl->slot;
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ctrl->slot = NULL;
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while (old_slot) {
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/* memory will be freed by the release_slot callback */
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next_slot = old_slot->next;
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pci_hp_deregister (old_slot->hotplug_slot);
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old_slot = next_slot;
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}
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|
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//Free IRQ associated with hot plug device
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free_irq(ctrl->interrupt, ctrl);
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//Unmap the memory
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iounmap(ctrl->hpc_reg);
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//Finally reclaim PCI mem
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release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
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pci_resource_len(ctrl->pci_dev, 0));
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return(0);
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}
|
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|
|
|
|
//============================================================================
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|
// function: get_slot_mapping
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//
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// Description: Attempts to determine a logical slot mapping for a PCI
|
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// device. Won't work for more than one PCI-PCI bridge
|
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// in a slot.
|
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//
|
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// Input: u8 bus_num - bus number of PCI device
|
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// u8 dev_num - device number of PCI device
|
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// u8 *slot - Pointer to u8 where slot number will
|
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// be returned
|
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//
|
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// Output: SUCCESS or FAILURE
|
|
//=============================================================================
|
|
static int
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get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
|
|
{
|
|
struct irq_routing_table *PCIIRQRoutingInfoLength;
|
|
u32 work;
|
|
long len;
|
|
long loop;
|
|
|
|
u8 tbus, tdevice, tslot, bridgeSlot;
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|
|
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dbg("%s: %p, %d, %d, %p\n", __FUNCTION__, bus, bus_num, dev_num, slot);
|
|
|
|
bridgeSlot = 0xFF;
|
|
|
|
PCIIRQRoutingInfoLength = pcibios_get_irq_routing_table();
|
|
if (!PCIIRQRoutingInfoLength)
|
|
return -1;
|
|
|
|
len = (PCIIRQRoutingInfoLength->size -
|
|
sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
|
|
// Make sure I got at least one entry
|
|
if (len == 0) {
|
|
kfree(PCIIRQRoutingInfoLength);
|
|
return -1;
|
|
}
|
|
|
|
for (loop = 0; loop < len; ++loop) {
|
|
tbus = PCIIRQRoutingInfoLength->slots[loop].bus;
|
|
tdevice = PCIIRQRoutingInfoLength->slots[loop].devfn >> 3;
|
|
tslot = PCIIRQRoutingInfoLength->slots[loop].slot;
|
|
|
|
if ((tbus == bus_num) && (tdevice == dev_num)) {
|
|
*slot = tslot;
|
|
kfree(PCIIRQRoutingInfoLength);
|
|
return 0;
|
|
} else {
|
|
/* Did not get a match on the target PCI device. Check
|
|
* if the current IRQ table entry is a PCI-to-PCI bridge
|
|
* device. If so, and it's secondary bus matches the
|
|
* bus number for the target device, I need to save the
|
|
* bridge's slot number. If I can not find an entry for
|
|
* the target device, I will have to assume it's on the
|
|
* other side of the bridge, and assign it the bridge's
|
|
* slot. */
|
|
bus->number = tbus;
|
|
pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
|
|
PCI_REVISION_ID, &work);
|
|
|
|
if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
|
|
pci_bus_read_config_dword(bus,
|
|
PCI_DEVFN(tdevice, 0),
|
|
PCI_PRIMARY_BUS, &work);
|
|
// See if bridge's secondary bus matches target bus.
|
|
if (((work >> 8) & 0x000000FF) == (long) bus_num) {
|
|
bridgeSlot = tslot;
|
|
}
|
|
}
|
|
}
|
|
|
|
}
|
|
|
|
// If we got here, we didn't find an entry in the IRQ mapping table
|
|
// for the target PCI device. If we did determine that the target
|
|
// device is on the other side of a PCI-to-PCI bridge, return the
|
|
// slot number for the bridge.
|
|
if (bridgeSlot != 0xFF) {
|
|
*slot = bridgeSlot;
|
|
kfree(PCIIRQRoutingInfoLength);
|
|
return 0;
|
|
}
|
|
kfree(PCIIRQRoutingInfoLength);
|
|
// Couldn't find an entry in the routing table for this PCI device
|
|
return -1;
|
|
}
|
|
|
|
|
|
/**
|
|
* cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
|
|
*
|
|
*/
|
|
static int
|
|
cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
|
|
u32 status)
|
|
{
|
|
u8 hp_slot;
|
|
|
|
if (func == NULL)
|
|
return(1);
|
|
|
|
hp_slot = func->device - ctrl->slot_device_offset;
|
|
|
|
// Wait for exclusive access to hardware
|
|
down(&ctrl->crit_sect);
|
|
|
|
if (status == 1) {
|
|
amber_LED_on (ctrl, hp_slot);
|
|
} else if (status == 0) {
|
|
amber_LED_off (ctrl, hp_slot);
|
|
} else {
|
|
// Done with exclusive hardware access
|
|
up(&ctrl->crit_sect);
|
|
return(1);
|
|
}
|
|
|
|
set_SOGO(ctrl);
|
|
|
|
// Wait for SOBS to be unset
|
|
wait_for_ctrl_irq (ctrl);
|
|
|
|
// Done with exclusive hardware access
|
|
up(&ctrl->crit_sect);
|
|
|
|
return(0);
|
|
}
|
|
|
|
|
|
/**
|
|
* set_attention_status - Turns the Amber LED for a slot on or off
|
|
*
|
|
*/
|
|
static int set_attention_status (struct hotplug_slot *hotplug_slot, u8 status)
|
|
{
|
|
struct pci_func *slot_func;
|
|
struct slot *slot = hotplug_slot->private;
|
|
struct controller *ctrl = slot->ctrl;
|
|
u8 bus;
|
|
u8 devfn;
|
|
u8 device;
|
|
u8 function;
|
|
|
|
dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
|
|
|
|
if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
|
|
return -ENODEV;
|
|
|
|
device = devfn >> 3;
|
|
function = devfn & 0x7;
|
|
dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
|
|
|
|
slot_func = cpqhp_slot_find(bus, device, function);
|
|
if (!slot_func)
|
|
return -ENODEV;
|
|
|
|
return cpqhp_set_attention_status(ctrl, slot_func, status);
|
|
}
|
|
|
|
|
|
static int process_SI(struct hotplug_slot *hotplug_slot)
|
|
{
|
|
struct pci_func *slot_func;
|
|
struct slot *slot = hotplug_slot->private;
|
|
struct controller *ctrl = slot->ctrl;
|
|
u8 bus;
|
|
u8 devfn;
|
|
u8 device;
|
|
u8 function;
|
|
|
|
dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
|
|
|
|
if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
|
|
return -ENODEV;
|
|
|
|
device = devfn >> 3;
|
|
function = devfn & 0x7;
|
|
dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
|
|
|
|
slot_func = cpqhp_slot_find(bus, device, function);
|
|
if (!slot_func)
|
|
return -ENODEV;
|
|
|
|
slot_func->bus = bus;
|
|
slot_func->device = device;
|
|
slot_func->function = function;
|
|
slot_func->configured = 0;
|
|
dbg("board_added(%p, %p)\n", slot_func, ctrl);
|
|
return cpqhp_process_SI(ctrl, slot_func);
|
|
}
|
|
|
|
|
|
static int process_SS(struct hotplug_slot *hotplug_slot)
|
|
{
|
|
struct pci_func *slot_func;
|
|
struct slot *slot = hotplug_slot->private;
|
|
struct controller *ctrl = slot->ctrl;
|
|
u8 bus;
|
|
u8 devfn;
|
|
u8 device;
|
|
u8 function;
|
|
|
|
dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
|
|
|
|
if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
|
|
return -ENODEV;
|
|
|
|
device = devfn >> 3;
|
|
function = devfn & 0x7;
|
|
dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
|
|
|
|
slot_func = cpqhp_slot_find(bus, device, function);
|
|
if (!slot_func)
|
|
return -ENODEV;
|
|
|
|
dbg("In %s, slot_func = %p, ctrl = %p\n", __FUNCTION__, slot_func, ctrl);
|
|
return cpqhp_process_SS(ctrl, slot_func);
|
|
}
|
|
|
|
|
|
static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
|
|
{
|
|
struct slot *slot = hotplug_slot->private;
|
|
struct controller *ctrl = slot->ctrl;
|
|
|
|
dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
|
|
|
|
return cpqhp_hardware_test(ctrl, value);
|
|
}
|
|
|
|
|
|
static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
|
|
{
|
|
struct slot *slot = hotplug_slot->private;
|
|
struct controller *ctrl = slot->ctrl;
|
|
|
|
dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
|
|
|
|
*value = get_slot_enabled(ctrl, slot);
|
|
return 0;
|
|
}
|
|
|
|
static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
|
|
{
|
|
struct slot *slot = hotplug_slot->private;
|
|
struct controller *ctrl = slot->ctrl;
|
|
|
|
dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
|
|
|
|
*value = cpq_get_attention_status(ctrl, slot);
|
|
return 0;
|
|
}
|
|
|
|
static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
|
|
{
|
|
struct slot *slot = hotplug_slot->private;
|
|
struct controller *ctrl = slot->ctrl;
|
|
|
|
dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
|
|
|
|
*value = cpq_get_latch_status(ctrl, slot);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
|
|
{
|
|
struct slot *slot = hotplug_slot->private;
|
|
struct controller *ctrl = slot->ctrl;
|
|
|
|
dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
|
|
|
|
*value = get_presence_status(ctrl, slot);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int get_max_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
|
|
{
|
|
struct slot *slot = hotplug_slot->private;
|
|
struct controller *ctrl = slot->ctrl;
|
|
|
|
dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
|
|
|
|
*value = ctrl->speed_capability;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int get_cur_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
|
|
{
|
|
struct slot *slot = hotplug_slot->private;
|
|
struct controller *ctrl = slot->ctrl;
|
|
|
|
dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
|
|
|
|
*value = ctrl->speed;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|
{
|
|
u8 num_of_slots = 0;
|
|
u8 hp_slot = 0;
|
|
u8 device;
|
|
u8 rev;
|
|
u8 bus_cap;
|
|
u16 temp_word;
|
|
u16 vendor_id;
|
|
u16 subsystem_vid;
|
|
u16 subsystem_deviceid;
|
|
u32 rc;
|
|
struct controller *ctrl;
|
|
struct pci_func *func;
|
|
|
|
// Need to read VID early b/c it's used to differentiate CPQ and INTC discovery
|
|
rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id);
|
|
if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) {
|
|
err(msg_HPC_non_compaq_or_intel);
|
|
return -ENODEV;
|
|
}
|
|
dbg("Vendor ID: %x\n", vendor_id);
|
|
|
|
rc = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
|
|
dbg("revision: %d\n", rev);
|
|
if (rc || ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!rev))) {
|
|
err(msg_HPC_rev_error);
|
|
return -ENODEV;
|
|
}
|
|
|
|
/* Check for the proper subsytem ID's
|
|
* Intel uses a different SSID programming model than Compaq.
|
|
* For Intel, each SSID bit identifies a PHP capability.
|
|
* Also Intel HPC's may have RID=0.
|
|
*/
|
|
if ((rev > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) {
|
|
// TODO: This code can be made to support non-Compaq or Intel subsystem IDs
|
|
rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid);
|
|
if (rc) {
|
|
err("%s : pci_read_config_word failed\n", __FUNCTION__);
|
|
return rc;
|
|
}
|
|
dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
|
|
if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
|
|
err(msg_HPC_non_compaq_or_intel);
|
|
return -ENODEV;
|
|
}
|
|
|
|
ctrl = (struct controller *) kmalloc(sizeof(struct controller), GFP_KERNEL);
|
|
if (!ctrl) {
|
|
err("%s : out of memory\n", __FUNCTION__);
|
|
return -ENOMEM;
|
|
}
|
|
memset(ctrl, 0, sizeof(struct controller));
|
|
|
|
rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsystem_deviceid);
|
|
if (rc) {
|
|
err("%s : pci_read_config_word failed\n", __FUNCTION__);
|
|
goto err_free_ctrl;
|
|
}
|
|
|
|
info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
|
|
|
|
/* Set Vendor ID, so it can be accessed later from other functions */
|
|
ctrl->vendor_id = vendor_id;
|
|
|
|
switch (subsystem_vid) {
|
|
case PCI_VENDOR_ID_COMPAQ:
|
|
if (rev >= 0x13) { /* CIOBX */
|
|
ctrl->push_flag = 1;
|
|
ctrl->slot_switch_type = 1;
|
|
ctrl->push_button = 1;
|
|
ctrl->pci_config_space = 1;
|
|
ctrl->defeature_PHP = 1;
|
|
ctrl->pcix_support = 1;
|
|
ctrl->pcix_speed_capability = 1;
|
|
pci_read_config_byte(pdev, 0x41, &bus_cap);
|
|
if (bus_cap & 0x80) {
|
|
dbg("bus max supports 133MHz PCI-X\n");
|
|
ctrl->speed_capability = PCI_SPEED_133MHz_PCIX;
|
|
break;
|
|
}
|
|
if (bus_cap & 0x40) {
|
|
dbg("bus max supports 100MHz PCI-X\n");
|
|
ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
|
|
break;
|
|
}
|
|
if (bus_cap & 20) {
|
|
dbg("bus max supports 66MHz PCI-X\n");
|
|
ctrl->speed_capability = PCI_SPEED_66MHz_PCIX;
|
|
break;
|
|
}
|
|
if (bus_cap & 10) {
|
|
dbg("bus max supports 66MHz PCI\n");
|
|
ctrl->speed_capability = PCI_SPEED_66MHz;
|
|
break;
|
|
}
|
|
|
|
break;
|
|
}
|
|
|
|
switch (subsystem_deviceid) {
|
|
case PCI_SUB_HPC_ID:
|
|
/* Original 6500/7000 implementation */
|
|
ctrl->slot_switch_type = 1;
|
|
ctrl->speed_capability = PCI_SPEED_33MHz;
|
|
ctrl->push_button = 0;
|
|
ctrl->pci_config_space = 1;
|
|
ctrl->defeature_PHP = 1;
|
|
ctrl->pcix_support = 0;
|
|
ctrl->pcix_speed_capability = 0;
|
|
break;
|
|
case PCI_SUB_HPC_ID2:
|
|
/* First Pushbutton implementation */
|
|
ctrl->push_flag = 1;
|
|
ctrl->slot_switch_type = 1;
|
|
ctrl->speed_capability = PCI_SPEED_33MHz;
|
|
ctrl->push_button = 1;
|
|
ctrl->pci_config_space = 1;
|
|
ctrl->defeature_PHP = 1;
|
|
ctrl->pcix_support = 0;
|
|
ctrl->pcix_speed_capability = 0;
|
|
break;
|
|
case PCI_SUB_HPC_ID_INTC:
|
|
/* Third party (6500/7000) */
|
|
ctrl->slot_switch_type = 1;
|
|
ctrl->speed_capability = PCI_SPEED_33MHz;
|
|
ctrl->push_button = 0;
|
|
ctrl->pci_config_space = 1;
|
|
ctrl->defeature_PHP = 1;
|
|
ctrl->pcix_support = 0;
|
|
ctrl->pcix_speed_capability = 0;
|
|
break;
|
|
case PCI_SUB_HPC_ID3:
|
|
/* First 66 Mhz implementation */
|
|
ctrl->push_flag = 1;
|
|
ctrl->slot_switch_type = 1;
|
|
ctrl->speed_capability = PCI_SPEED_66MHz;
|
|
ctrl->push_button = 1;
|
|
ctrl->pci_config_space = 1;
|
|
ctrl->defeature_PHP = 1;
|
|
ctrl->pcix_support = 0;
|
|
ctrl->pcix_speed_capability = 0;
|
|
break;
|
|
case PCI_SUB_HPC_ID4:
|
|
/* First PCI-X implementation, 100MHz */
|
|
ctrl->push_flag = 1;
|
|
ctrl->slot_switch_type = 1;
|
|
ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
|
|
ctrl->push_button = 1;
|
|
ctrl->pci_config_space = 1;
|
|
ctrl->defeature_PHP = 1;
|
|
ctrl->pcix_support = 1;
|
|
ctrl->pcix_speed_capability = 0;
|
|
break;
|
|
default:
|
|
err(msg_HPC_not_supported);
|
|
rc = -ENODEV;
|
|
goto err_free_ctrl;
|
|
}
|
|
break;
|
|
|
|
case PCI_VENDOR_ID_INTEL:
|
|
/* Check for speed capability (0=33, 1=66) */
|
|
if (subsystem_deviceid & 0x0001) {
|
|
ctrl->speed_capability = PCI_SPEED_66MHz;
|
|
} else {
|
|
ctrl->speed_capability = PCI_SPEED_33MHz;
|
|
}
|
|
|
|
/* Check for push button */
|
|
if (subsystem_deviceid & 0x0002) {
|
|
/* no push button */
|
|
ctrl->push_button = 0;
|
|
} else {
|
|
/* push button supported */
|
|
ctrl->push_button = 1;
|
|
}
|
|
|
|
/* Check for slot switch type (0=mechanical, 1=not mechanical) */
|
|
if (subsystem_deviceid & 0x0004) {
|
|
/* no switch */
|
|
ctrl->slot_switch_type = 0;
|
|
} else {
|
|
/* switch */
|
|
ctrl->slot_switch_type = 1;
|
|
}
|
|
|
|
/* PHP Status (0=De-feature PHP, 1=Normal operation) */
|
|
if (subsystem_deviceid & 0x0008) {
|
|
ctrl->defeature_PHP = 1; // PHP supported
|
|
} else {
|
|
ctrl->defeature_PHP = 0; // PHP not supported
|
|
}
|
|
|
|
/* Alternate Base Address Register Interface (0=not supported, 1=supported) */
|
|
if (subsystem_deviceid & 0x0010) {
|
|
ctrl->alternate_base_address = 1; // supported
|
|
} else {
|
|
ctrl->alternate_base_address = 0; // not supported
|
|
}
|
|
|
|
/* PCI Config Space Index (0=not supported, 1=supported) */
|
|
if (subsystem_deviceid & 0x0020) {
|
|
ctrl->pci_config_space = 1; // supported
|
|
} else {
|
|
ctrl->pci_config_space = 0; // not supported
|
|
}
|
|
|
|
/* PCI-X support */
|
|
if (subsystem_deviceid & 0x0080) {
|
|
/* PCI-X capable */
|
|
ctrl->pcix_support = 1;
|
|
/* Frequency of operation in PCI-X mode */
|
|
if (subsystem_deviceid & 0x0040) {
|
|
/* 133MHz PCI-X if bit 7 is 1 */
|
|
ctrl->pcix_speed_capability = 1;
|
|
} else {
|
|
/* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
|
|
/* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
|
|
ctrl->pcix_speed_capability = 0;
|
|
}
|
|
} else {
|
|
/* Conventional PCI */
|
|
ctrl->pcix_support = 0;
|
|
ctrl->pcix_speed_capability = 0;
|
|
}
|
|
break;
|
|
|
|
default:
|
|
err(msg_HPC_not_supported);
|
|
rc = -ENODEV;
|
|
goto err_free_ctrl;
|
|
}
|
|
|
|
} else {
|
|
err(msg_HPC_not_supported);
|
|
return -ENODEV;
|
|
}
|
|
|
|
// Tell the user that we found one.
|
|
info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
|
|
pdev->bus->number);
|
|
|
|
dbg("Hotplug controller capabilities:\n");
|
|
dbg(" speed_capability %d\n", ctrl->speed_capability);
|
|
dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ?
|
|
"switch present" : "no switch");
|
|
dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ?
|
|
"PHP supported" : "PHP not supported");
|
|
dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ?
|
|
"supported" : "not supported");
|
|
dbg(" pci_config_space %s\n", ctrl->pci_config_space ?
|
|
"supported" : "not supported");
|
|
dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ?
|
|
"supported" : "not supported");
|
|
dbg(" pcix_support %s\n", ctrl->pcix_support ?
|
|
"supported" : "not supported");
|
|
|
|
ctrl->pci_dev = pdev;
|
|
pci_set_drvdata(pdev, ctrl);
|
|
|
|
/* make our own copy of the pci bus structure,
|
|
* as we like tweaking it a lot */
|
|
ctrl->pci_bus = kmalloc(sizeof(*ctrl->pci_bus), GFP_KERNEL);
|
|
if (!ctrl->pci_bus) {
|
|
err("out of memory\n");
|
|
rc = -ENOMEM;
|
|
goto err_free_ctrl;
|
|
}
|
|
memcpy(ctrl->pci_bus, pdev->bus, sizeof(*ctrl->pci_bus));
|
|
|
|
ctrl->bus = pdev->bus->number;
|
|
ctrl->rev = rev;
|
|
dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
|
|
PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
|
|
|
|
init_MUTEX(&ctrl->crit_sect);
|
|
init_waitqueue_head(&ctrl->queue);
|
|
|
|
/* initialize our threads if they haven't already been started up */
|
|
rc = one_time_init();
|
|
if (rc) {
|
|
goto err_free_bus;
|
|
}
|
|
|
|
dbg("pdev = %p\n", pdev);
|
|
dbg("pci resource start %lx\n", pci_resource_start(pdev, 0));
|
|
dbg("pci resource len %lx\n", pci_resource_len(pdev, 0));
|
|
|
|
if (!request_mem_region(pci_resource_start(pdev, 0),
|
|
pci_resource_len(pdev, 0), MY_NAME)) {
|
|
err("cannot reserve MMIO region\n");
|
|
rc = -ENOMEM;
|
|
goto err_free_bus;
|
|
}
|
|
|
|
ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
|
|
pci_resource_len(pdev, 0));
|
|
if (!ctrl->hpc_reg) {
|
|
err("cannot remap MMIO region %lx @ %lx\n",
|
|
pci_resource_len(pdev, 0),
|
|
pci_resource_start(pdev, 0));
|
|
rc = -ENODEV;
|
|
goto err_free_mem_region;
|
|
}
|
|
|
|
// Check for 66Mhz operation
|
|
ctrl->speed = get_controller_speed(ctrl);
|
|
|
|
|
|
/********************************************************
|
|
*
|
|
* Save configuration headers for this and
|
|
* subordinate PCI buses
|
|
*
|
|
********************************************************/
|
|
|
|
// find the physical slot number of the first hot plug slot
|
|
|
|
/* Get slot won't work for devices behind bridges, but
|
|
* in this case it will always be called for the "base"
|
|
* bus/dev/func of a slot.
|
|
* CS: this is leveraging the PCIIRQ routing code from the kernel
|
|
* (pci-pc.c: get_irq_routing_table) */
|
|
rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
|
|
(readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
|
|
&(ctrl->first_slot));
|
|
dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
|
|
ctrl->first_slot, rc);
|
|
if (rc) {
|
|
err(msg_initialization_err, rc);
|
|
goto err_iounmap;
|
|
}
|
|
|
|
// Store PCI Config Space for all devices on this bus
|
|
rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
|
|
if (rc) {
|
|
err("%s: unable to save PCI configuration data, error %d\n",
|
|
__FUNCTION__, rc);
|
|
goto err_iounmap;
|
|
}
|
|
|
|
/*
|
|
* Get IO, memory, and IRQ resources for new devices
|
|
*/
|
|
// The next line is required for cpqhp_find_available_resources
|
|
ctrl->interrupt = pdev->irq;
|
|
if (ctrl->interrupt < 0x10) {
|
|
cpqhp_legacy_mode = 1;
|
|
dbg("System seems to be configured for Full Table Mapped MPS mode\n");
|
|
}
|
|
|
|
ctrl->cfgspc_irq = 0;
|
|
pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
|
|
|
|
rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
|
|
ctrl->add_support = !rc;
|
|
if (rc) {
|
|
dbg("cpqhp_find_available_resources = 0x%x\n", rc);
|
|
err("unable to locate PCI configuration resources for hot plug add.\n");
|
|
goto err_iounmap;
|
|
}
|
|
|
|
/*
|
|
* Finish setting up the hot plug ctrl device
|
|
*/
|
|
ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
|
|
dbg("NumSlots %d \n", ctrl->slot_device_offset);
|
|
|
|
ctrl->next_event = 0;
|
|
|
|
/* Setup the slot information structures */
|
|
rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
|
|
if (rc) {
|
|
err(msg_initialization_err, 6);
|
|
err("%s: unable to save PCI configuration data, error %d\n",
|
|
__FUNCTION__, rc);
|
|
goto err_iounmap;
|
|
}
|
|
|
|
/* Mask all general input interrupts */
|
|
writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
|
|
|
|
/* set up the interrupt */
|
|
dbg("HPC interrupt = %d \n", ctrl->interrupt);
|
|
if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
|
|
SA_SHIRQ, MY_NAME, ctrl)) {
|
|
err("Can't get irq %d for the hotplug pci controller\n",
|
|
ctrl->interrupt);
|
|
rc = -ENODEV;
|
|
goto err_iounmap;
|
|
}
|
|
|
|
/* Enable Shift Out interrupt and clear it, also enable SERR on power fault */
|
|
temp_word = readw(ctrl->hpc_reg + MISC);
|
|
temp_word |= 0x4006;
|
|
writew(temp_word, ctrl->hpc_reg + MISC);
|
|
|
|
// Changed 05/05/97 to clear all interrupts at start
|
|
writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
|
|
|
|
ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
|
|
|
|
writel(0x0L, ctrl->hpc_reg + INT_MASK);
|
|
|
|
if (!cpqhp_ctrl_list) {
|
|
cpqhp_ctrl_list = ctrl;
|
|
ctrl->next = NULL;
|
|
} else {
|
|
ctrl->next = cpqhp_ctrl_list;
|
|
cpqhp_ctrl_list = ctrl;
|
|
}
|
|
|
|
// turn off empty slots here unless command line option "ON" set
|
|
// Wait for exclusive access to hardware
|
|
down(&ctrl->crit_sect);
|
|
|
|
num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
|
|
|
|
// find first device number for the ctrl
|
|
device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
|
|
|
|
while (num_of_slots) {
|
|
dbg("num_of_slots: %d\n", num_of_slots);
|
|
func = cpqhp_slot_find(ctrl->bus, device, 0);
|
|
if (!func)
|
|
break;
|
|
|
|
hp_slot = func->device - ctrl->slot_device_offset;
|
|
dbg("hp_slot: %d\n", hp_slot);
|
|
|
|
// We have to save the presence info for these slots
|
|
temp_word = ctrl->ctrl_int_comp >> 16;
|
|
func->presence_save = (temp_word >> hp_slot) & 0x01;
|
|
func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
|
|
|
|
if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
|
|
func->switch_save = 0;
|
|
} else {
|
|
func->switch_save = 0x10;
|
|
}
|
|
|
|
if (!power_mode) {
|
|
if (!func->is_a_board) {
|
|
green_LED_off(ctrl, hp_slot);
|
|
slot_disable(ctrl, hp_slot);
|
|
}
|
|
}
|
|
|
|
device++;
|
|
num_of_slots--;
|
|
}
|
|
|
|
if (!power_mode) {
|
|
set_SOGO(ctrl);
|
|
// Wait for SOBS to be unset
|
|
wait_for_ctrl_irq(ctrl);
|
|
}
|
|
|
|
rc = init_SERR(ctrl);
|
|
if (rc) {
|
|
err("init_SERR failed\n");
|
|
up(&ctrl->crit_sect);
|
|
goto err_free_irq;
|
|
}
|
|
|
|
// Done with exclusive hardware access
|
|
up(&ctrl->crit_sect);
|
|
|
|
cpqhp_create_ctrl_files(ctrl);
|
|
|
|
return 0;
|
|
|
|
err_free_irq:
|
|
free_irq(ctrl->interrupt, ctrl);
|
|
err_iounmap:
|
|
iounmap(ctrl->hpc_reg);
|
|
err_free_mem_region:
|
|
release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
|
|
err_free_bus:
|
|
kfree(ctrl->pci_bus);
|
|
err_free_ctrl:
|
|
kfree(ctrl);
|
|
return rc;
|
|
}
|
|
|
|
|
|
static int one_time_init(void)
|
|
{
|
|
int loop;
|
|
int retval = 0;
|
|
static int initialized = 0;
|
|
|
|
if (initialized)
|
|
return 0;
|
|
|
|
power_mode = 0;
|
|
|
|
retval = pci_print_IRQ_route();
|
|
if (retval)
|
|
goto error;
|
|
|
|
dbg("Initialize + Start the notification mechanism \n");
|
|
|
|
retval = cpqhp_event_start_thread();
|
|
if (retval)
|
|
goto error;
|
|
|
|
dbg("Initialize slot lists\n");
|
|
for (loop = 0; loop < 256; loop++) {
|
|
cpqhp_slot_list[loop] = NULL;
|
|
}
|
|
|
|
// FIXME: We also need to hook the NMI handler eventually.
|
|
// this also needs to be worked with Christoph
|
|
// register_NMI_handler();
|
|
|
|
// Map rom address
|
|
cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
|
|
if (!cpqhp_rom_start) {
|
|
err ("Could not ioremap memory region for ROM\n");
|
|
retval = -EIO;
|
|
goto error;
|
|
}
|
|
|
|
/* Now, map the int15 entry point if we are on compaq specific hardware */
|
|
compaq_nvram_init(cpqhp_rom_start);
|
|
|
|
/* Map smbios table entry point structure */
|
|
smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
|
|
cpqhp_rom_start + ROM_PHY_LEN);
|
|
if (!smbios_table) {
|
|
err ("Could not find the SMBIOS pointer in memory\n");
|
|
retval = -EIO;
|
|
goto error_rom_start;
|
|
}
|
|
|
|
smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
|
|
readw(smbios_table + ST_LENGTH));
|
|
if (!smbios_start) {
|
|
err ("Could not ioremap memory region taken from SMBIOS values\n");
|
|
retval = -EIO;
|
|
goto error_smbios_start;
|
|
}
|
|
|
|
initialized = 1;
|
|
|
|
return retval;
|
|
|
|
error_smbios_start:
|
|
iounmap(smbios_start);
|
|
error_rom_start:
|
|
iounmap(cpqhp_rom_start);
|
|
error:
|
|
return retval;
|
|
}
|
|
|
|
|
|
static void __exit unload_cpqphpd(void)
|
|
{
|
|
struct pci_func *next;
|
|
struct pci_func *TempSlot;
|
|
int loop;
|
|
u32 rc;
|
|
struct controller *ctrl;
|
|
struct controller *tctrl;
|
|
struct pci_resource *res;
|
|
struct pci_resource *tres;
|
|
|
|
rc = compaq_nvram_store(cpqhp_rom_start);
|
|
|
|
ctrl = cpqhp_ctrl_list;
|
|
|
|
while (ctrl) {
|
|
if (ctrl->hpc_reg) {
|
|
u16 misc;
|
|
rc = read_slot_enable (ctrl);
|
|
|
|
writeb(0, ctrl->hpc_reg + SLOT_SERR);
|
|
writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
|
|
|
|
misc = readw(ctrl->hpc_reg + MISC);
|
|
misc &= 0xFFFD;
|
|
writew(misc, ctrl->hpc_reg + MISC);
|
|
}
|
|
|
|
ctrl_slot_cleanup(ctrl);
|
|
|
|
res = ctrl->io_head;
|
|
while (res) {
|
|
tres = res;
|
|
res = res->next;
|
|
kfree(tres);
|
|
}
|
|
|
|
res = ctrl->mem_head;
|
|
while (res) {
|
|
tres = res;
|
|
res = res->next;
|
|
kfree(tres);
|
|
}
|
|
|
|
res = ctrl->p_mem_head;
|
|
while (res) {
|
|
tres = res;
|
|
res = res->next;
|
|
kfree(tres);
|
|
}
|
|
|
|
res = ctrl->bus_head;
|
|
while (res) {
|
|
tres = res;
|
|
res = res->next;
|
|
kfree(tres);
|
|
}
|
|
|
|
kfree (ctrl->pci_bus);
|
|
|
|
tctrl = ctrl;
|
|
ctrl = ctrl->next;
|
|
kfree(tctrl);
|
|
}
|
|
|
|
for (loop = 0; loop < 256; loop++) {
|
|
next = cpqhp_slot_list[loop];
|
|
while (next != NULL) {
|
|
res = next->io_head;
|
|
while (res) {
|
|
tres = res;
|
|
res = res->next;
|
|
kfree(tres);
|
|
}
|
|
|
|
res = next->mem_head;
|
|
while (res) {
|
|
tres = res;
|
|
res = res->next;
|
|
kfree(tres);
|
|
}
|
|
|
|
res = next->p_mem_head;
|
|
while (res) {
|
|
tres = res;
|
|
res = res->next;
|
|
kfree(tres);
|
|
}
|
|
|
|
res = next->bus_head;
|
|
while (res) {
|
|
tres = res;
|
|
res = res->next;
|
|
kfree(tres);
|
|
}
|
|
|
|
TempSlot = next;
|
|
next = next->next;
|
|
kfree(TempSlot);
|
|
}
|
|
}
|
|
|
|
// Stop the notification mechanism
|
|
cpqhp_event_stop_thread();
|
|
|
|
//unmap the rom address
|
|
if (cpqhp_rom_start)
|
|
iounmap(cpqhp_rom_start);
|
|
if (smbios_start)
|
|
iounmap(smbios_start);
|
|
}
|
|
|
|
|
|
|
|
static struct pci_device_id hpcd_pci_tbl[] = {
|
|
{
|
|
/* handle any PCI Hotplug controller */
|
|
.class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
|
|
.class_mask = ~0,
|
|
|
|
/* no matter who makes it */
|
|
.vendor = PCI_ANY_ID,
|
|
.device = PCI_ANY_ID,
|
|
.subvendor = PCI_ANY_ID,
|
|
.subdevice = PCI_ANY_ID,
|
|
|
|
}, { /* end: all zeroes */ }
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
|
|
|
|
|
|
|
|
static struct pci_driver cpqhpc_driver = {
|
|
.name = "compaq_pci_hotplug",
|
|
.id_table = hpcd_pci_tbl,
|
|
.probe = cpqhpc_probe,
|
|
/* remove: cpqhpc_remove_one, */
|
|
};
|
|
|
|
|
|
|
|
static int __init cpqhpc_init(void)
|
|
{
|
|
int result;
|
|
|
|
cpqhp_debug = debug;
|
|
|
|
info (DRIVER_DESC " version: " DRIVER_VERSION "\n");
|
|
result = pci_register_driver(&cpqhpc_driver);
|
|
dbg("pci_register_driver = %d\n", result);
|
|
return result;
|
|
}
|
|
|
|
|
|
static void __exit cpqhpc_cleanup(void)
|
|
{
|
|
dbg("unload_cpqphpd()\n");
|
|
unload_cpqphpd();
|
|
|
|
dbg("pci_unregister_driver\n");
|
|
pci_unregister_driver(&cpqhpc_driver);
|
|
}
|
|
|
|
|
|
module_init(cpqhpc_init);
|
|
module_exit(cpqhpc_cleanup);
|
|
|
|
|