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75 lines
2.8 KiB
Plaintext
75 lines
2.8 KiB
Plaintext
* ARM PrimeCell MultiMedia Card Interface (MMCI) PL180/1
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The ARM PrimeCell MMCI PL180 and PL181 provides an interface for
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reading and writing to MultiMedia and SD cards alike.
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This file documents differences between the core properties described
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by mmc.txt and the properties used by the mmci driver. Using "st" as
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the prefix for a property, indicates support by the ST Micro variant.
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Required properties:
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- compatible : contains "arm,pl18x", "arm,primecell".
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- vmmc-supply : phandle to the regulator device tree node, mentioned
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as the VCC/VDD supply in the eMMC/SD specs.
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Optional properties:
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- arm,primecell-periphid : contains the PrimeCell Peripheral ID, it overrides
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the ID provided by the HW
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- resets : phandle to internal reset line.
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Should be defined for sdmmc variant.
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- vqmmc-supply : phandle to the regulator device tree node, mentioned
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as the VCCQ/VDD_IO supply in the eMMC/SD specs.
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specific for ux500 variant:
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- st,sig-dir-dat0 : bus signal direction pin used for DAT[0].
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- st,sig-dir-dat2 : bus signal direction pin used for DAT[2].
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- st,sig-dir-dat31 : bus signal direction pin used for DAT[3] and DAT[1].
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- st,sig-dir-dat74 : bus signal direction pin used for DAT[4] to DAT[7].
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- st,sig-dir-cmd : cmd signal direction pin used for CMD.
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- st,sig-pin-fbclk : feedback clock signal pin used.
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specific for sdmmc variant:
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- reg : a second base register may be defined if a delay
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block is present and used for tuning.
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- st,sig-dir : signal direction polarity used for cmd, dat0 dat123.
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- st,neg-edge : data & command phase relation, generated on
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sd clock falling edge.
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- st,use-ckin : use ckin pin from an external driver to sample
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the receive data (example: with voltage
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switch transceiver).
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Deprecated properties:
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- mmc-cap-mmc-highspeed : indicates whether MMC is high speed capable.
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- mmc-cap-sd-highspeed : indicates whether SD is high speed capable.
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Example:
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sdi0_per1@80126000 {
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compatible = "arm,pl18x", "arm,primecell";
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reg = <0x80126000 0x1000>;
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interrupts = <0 60 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&dma 29 0 0x2>, /* Logical - DevToMem */
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<&dma 29 0 0x0>; /* Logical - MemToDev */
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dma-names = "rx", "tx";
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clocks = <&prcc_kclk 1 5>, <&prcc_pclk 1 5>;
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clock-names = "sdi", "apb_pclk";
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max-frequency = <100000000>;
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bus-width = <4>;
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cap-sd-highspeed;
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cap-mmc-highspeed;
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cd-gpios = <&gpio2 31 0x4>; // 95
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st,sig-dir-dat0;
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st,sig-dir-dat2;
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st,sig-dir-cmd;
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st,sig-pin-fbclk;
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vmmc-supply = <&ab8500_ldo_aux3_reg>;
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vqmmc-supply = <&vmmci>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&sdi0_default_mode>;
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pinctrl-1 = <&sdi0_sleep_mode>;
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};
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