mirror of https://gitee.com/openkylin/linux.git
144 lines
4.1 KiB
YAML
144 lines
4.1 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright (C) 2020 Texas Instruments Incorporated
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# Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/ti,j721e-cpb-audio.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Texas Instruments J721e Common Processor Board Audio Support
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maintainers:
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- Peter Ujfalusi <peter.ujfalusi@gmail.com>
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description: |
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The audio support on the board is using pcm3168a codec connected to McASP10
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serializers in parallel setup.
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The pcm3168a SCKI clock is sourced from j721e AUDIO_REFCLK2 pin.
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In order to support 48KHz and 44.1KHz family of sampling rates the parent
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clock for AUDIO_REFCLK2 needs to be changed between PLL4 (for 48KHz) and
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PLL15 (for 44.1KHz). The same PLLs are used for McASP10's AUXCLK clock via
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different HSDIVIDER.
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Clocking setup for j721e:
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48KHz family:
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PLL4 ---> PLL4_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
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|-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
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44.1KHz family:
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PLL15 ---> PLL15_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
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|-> PLL15_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
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Clocking setup for j7200:
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48KHz family:
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PLL4 ---> PLL4_HSDIV0 ---> MCASP0_AUXCLK ---> McASP0.auxclk
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|-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
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properties:
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compatible:
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enum:
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- ti,j721e-cpb-audio
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- ti,j7200-cpb-audio
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model:
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$ref: /schemas/types.yaml#/definitions/string
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description: User specified audio sound card name
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ti,cpb-mcasp:
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description: phandle to McASP used on CPB
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$ref: /schemas/types.yaml#/definitions/phandle
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ti,cpb-codec:
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description: phandle to the pcm3168a codec used on the CPB
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$ref: /schemas/types.yaml#/definitions/phandle
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clocks:
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minItems: 4
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maxItems: 6
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clock-names:
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minItems: 4
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maxItems: 6
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required:
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- compatible
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- model
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- ti,cpb-mcasp
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- ti,cpb-codec
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- clocks
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- clock-names
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additionalProperties: false
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allOf:
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- if:
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properties:
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compatible:
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contains:
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const: ti,j721e-cpb-audio
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then:
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properties:
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clocks:
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minItems: 6
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items:
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- description: AUXCLK clock for McASP used by CPB audio
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- description: Parent for CPB_McASP auxclk (for 48KHz)
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- description: Parent for CPB_McASP auxclk (for 44.1KHz)
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- description: SCKI clock for the pcm3168a codec on CPB
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- description: Parent for CPB_SCKI clock (for 48KHz)
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- description: Parent for CPB_SCKI clock (for 44.1KHz)
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clock-names:
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items:
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- const: cpb-mcasp-auxclk
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- const: cpb-mcasp-auxclk-48000
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- const: cpb-mcasp-auxclk-44100
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- const: cpb-codec-scki
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- const: cpb-codec-scki-48000
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- const: cpb-codec-scki-44100
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- if:
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properties:
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compatible:
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contains:
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const: ti,j7200-cpb-audio
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then:
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properties:
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clocks:
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maxItems: 4
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items:
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- description: AUXCLK clock for McASP used by CPB audio
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- description: Parent for CPB_McASP auxclk (for 48KHz)
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- description: SCKI clock for the pcm3168a codec on CPB
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- description: Parent for CPB_SCKI clock (for 48KHz)
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clock-names:
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items:
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- const: cpb-mcasp-auxclk
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- const: cpb-mcasp-auxclk-48000
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- const: cpb-codec-scki
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- const: cpb-codec-scki-48000
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examples:
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- |+
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sound {
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compatible = "ti,j721e-cpb-audio";
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model = "j721e-cpb";
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status = "okay";
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ti,cpb-mcasp = <&mcasp10>;
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ti,cpb-codec = <&pcm3168a_1>;
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clocks = <&k3_clks 184 1>,
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<&k3_clks 184 2>, <&k3_clks 184 4>,
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<&k3_clks 157 371>,
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<&k3_clks 157 400>, <&k3_clks 157 401>;
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clock-names = "cpb-mcasp-auxclk",
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"cpb-mcasp-auxclk-48000", "cpb-mcasp-auxclk-44100",
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"cpb-codec-scki",
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"cpb-codec-scki-48000", "cpb-codec-scki-44100";
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};
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