mirror of https://gitee.com/openkylin/linux.git
84 lines
2.2 KiB
C
84 lines
2.2 KiB
C
/*
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* Applied Micro X-Gene SoC Ethernet v2 Driver
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*
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* Copyright (c) 2017, Applied Micro Circuits Corporation
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* Author(s): Iyappan Subramanian <isubramanian@apm.com>
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* Keyur Chudgar <kchudgar@apm.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "main.h"
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void xge_wr_csr(struct xge_pdata *pdata, u32 offset, u32 val)
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{
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void __iomem *addr = pdata->resources.base_addr + offset;
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iowrite32(val, addr);
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}
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u32 xge_rd_csr(struct xge_pdata *pdata, u32 offset)
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{
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void __iomem *addr = pdata->resources.base_addr + offset;
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return ioread32(addr);
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}
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int xge_port_reset(struct net_device *ndev)
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{
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struct xge_pdata *pdata = netdev_priv(ndev);
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struct device *dev = &pdata->pdev->dev;
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u32 data, wait = 10;
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xge_wr_csr(pdata, ENET_CLKEN, 0x3);
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xge_wr_csr(pdata, ENET_SRST, 0xf);
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xge_wr_csr(pdata, ENET_SRST, 0);
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xge_wr_csr(pdata, CFG_MEM_RAM_SHUTDOWN, 1);
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xge_wr_csr(pdata, CFG_MEM_RAM_SHUTDOWN, 0);
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do {
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usleep_range(100, 110);
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data = xge_rd_csr(pdata, BLOCK_MEM_RDY);
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} while (data != MEM_RDY && wait--);
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if (data != MEM_RDY) {
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dev_err(dev, "ECC init failed: %x\n", data);
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return -ETIMEDOUT;
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}
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xge_wr_csr(pdata, ENET_SHIM, DEVM_ARAUX_COH | DEVM_AWAUX_COH);
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return 0;
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}
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static void xge_traffic_resume(struct net_device *ndev)
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{
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struct xge_pdata *pdata = netdev_priv(ndev);
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xge_wr_csr(pdata, CFG_FORCE_LINK_STATUS_EN, 1);
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xge_wr_csr(pdata, FORCE_LINK_STATUS, 1);
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xge_wr_csr(pdata, CFG_LINK_AGGR_RESUME, 1);
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xge_wr_csr(pdata, RX_DV_GATE_REG, 1);
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}
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void xge_port_init(struct net_device *ndev)
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{
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struct xge_pdata *pdata = netdev_priv(ndev);
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pdata->phy_speed = SPEED_1000;
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xge_mac_init(pdata);
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xge_traffic_resume(ndev);
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}
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