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Ralf Baechle d30cecbcbe MIPS: Don't write ones to reserved entryhi bits. We've silently been relying on the hardware chopping off excess, reserved ASID bits for no better reason that it saving an instruction. Because we already have: #define cpu_asid(cpu, mm) (cpu_context((cpu), (mm)) & ASID_MASK) in <asm/mmu_context.h>. We can use a cleanup to avoid writing non-zero bits into the reserved entryhi bits. This avoid triggering some debugging assertion in the Cavium simulator. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>	2009-11-02 12:00:01 +01:00
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asm	MIPS: Don't write ones to reserved entryhi bits.	2009-11-02 12:00:01 +01:00

Ralf Baechle d30cecbcbe MIPS: Don't write ones to reserved entryhi bits.

We've silently been relying on the hardware chopping off excess, reserved
ASID bits for no better reason that it saving an instruction.  Because we
already have:

#define cpu_asid(cpu, mm)       (cpu_context((cpu), (mm)) & ASID_MASK)

in <asm/mmu_context.h>.

We can use a cleanup to avoid writing non-zero bits into the reserved
entryhi bits.  This avoid triggering some debugging assertion in the
Cavium simulator.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

2009-11-02 12:00:01 +01:00

asm

MIPS: Don't write ones to reserved entryhi bits.

2009-11-02 12:00:01 +01:00