mirror of https://gitee.com/openkylin/linux.git
117 lines
2.6 KiB
C
117 lines
2.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2018 Microchip Technology Inc,
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* Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
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*
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*
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*/
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#include <linux/clk-provider.h>
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#include <linux/of.h>
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#include <linux/mfd/syscon.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <soc/at91/atmel-sfr.h>
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#define I2S_BUS_NR 2
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struct clk_i2s_mux {
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struct clk_hw hw;
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struct regmap *regmap;
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u8 bus_id;
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};
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#define to_clk_i2s_mux(hw) container_of(hw, struct clk_i2s_mux, hw)
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static u8 clk_i2s_mux_get_parent(struct clk_hw *hw)
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{
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struct clk_i2s_mux *mux = to_clk_i2s_mux(hw);
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u32 val;
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regmap_read(mux->regmap, AT91_SFR_I2SCLKSEL, &val);
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return (val & BIT(mux->bus_id)) >> mux->bus_id;
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}
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static int clk_i2s_mux_set_parent(struct clk_hw *hw, u8 index)
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{
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struct clk_i2s_mux *mux = to_clk_i2s_mux(hw);
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return regmap_update_bits(mux->regmap, AT91_SFR_I2SCLKSEL,
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BIT(mux->bus_id), index << mux->bus_id);
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}
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static const struct clk_ops clk_i2s_mux_ops = {
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.get_parent = clk_i2s_mux_get_parent,
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.set_parent = clk_i2s_mux_set_parent,
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.determine_rate = __clk_mux_determine_rate,
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};
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static struct clk_hw * __init
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at91_clk_i2s_mux_register(struct regmap *regmap, const char *name,
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const char * const *parent_names,
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unsigned int num_parents, u8 bus_id)
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{
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struct clk_init_data init = {};
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struct clk_i2s_mux *i2s_ck;
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int ret;
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i2s_ck = kzalloc(sizeof(*i2s_ck), GFP_KERNEL);
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if (!i2s_ck)
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return ERR_PTR(-ENOMEM);
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init.name = name;
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init.ops = &clk_i2s_mux_ops;
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init.parent_names = parent_names;
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init.num_parents = num_parents;
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i2s_ck->hw.init = &init;
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i2s_ck->bus_id = bus_id;
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i2s_ck->regmap = regmap;
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ret = clk_hw_register(NULL, &i2s_ck->hw);
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if (ret) {
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kfree(i2s_ck);
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return ERR_PTR(ret);
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}
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return &i2s_ck->hw;
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}
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static void __init of_sama5d2_clk_i2s_mux_setup(struct device_node *np)
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{
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struct regmap *regmap_sfr;
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u8 bus_id;
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const char *parent_names[2];
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struct device_node *i2s_mux_np;
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struct clk_hw *hw;
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int ret;
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regmap_sfr = syscon_regmap_lookup_by_compatible("atmel,sama5d2-sfr");
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if (IS_ERR(regmap_sfr))
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return;
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for_each_child_of_node(np, i2s_mux_np) {
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if (of_property_read_u8(i2s_mux_np, "reg", &bus_id))
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continue;
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if (bus_id > I2S_BUS_NR)
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continue;
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ret = of_clk_parent_fill(i2s_mux_np, parent_names, 2);
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if (ret != 2)
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continue;
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hw = at91_clk_i2s_mux_register(regmap_sfr, i2s_mux_np->name,
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parent_names, 2, bus_id);
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if (IS_ERR(hw))
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continue;
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of_clk_add_hw_provider(i2s_mux_np, of_clk_hw_simple_get, hw);
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}
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}
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CLK_OF_DECLARE(sama5d2_clk_i2s_mux, "atmel,sama5d2-clk-i2s-mux",
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of_sama5d2_clk_i2s_mux_setup);
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