mirror of https://gitee.com/openkylin/linux.git
137 lines
3.1 KiB
C
137 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
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*/
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#ifndef _DP_PARSER_H_
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#define _DP_PARSER_H_
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#include <linux/platform_device.h>
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#include <linux/phy/phy.h>
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#include <linux/phy/phy-dp.h>
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#include "dpu_io_util.h"
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#include "msm_drv.h"
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#define DP_LABEL "MDSS DP DISPLAY"
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#define DP_MAX_PIXEL_CLK_KHZ 675000
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#define DP_MAX_NUM_DP_LANES 4
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enum dp_pm_type {
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DP_CORE_PM,
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DP_CTRL_PM,
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DP_STREAM_PM,
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DP_PHY_PM,
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DP_MAX_PM
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};
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struct dss_io_data {
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u32 len;
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void __iomem *base;
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};
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static inline const char *dp_parser_pm_name(enum dp_pm_type module)
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{
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switch (module) {
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case DP_CORE_PM: return "DP_CORE_PM";
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case DP_CTRL_PM: return "DP_CTRL_PM";
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case DP_STREAM_PM: return "DP_STREAM_PM";
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case DP_PHY_PM: return "DP_PHY_PM";
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default: return "???";
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}
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}
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/**
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* struct dp_display_data - display related device tree data.
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*
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* @ctrl_node: referece to controller device
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* @phy_node: reference to phy device
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* @is_active: is the controller currently active
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* @name: name of the display
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* @display_type: type of the display
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*/
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struct dp_display_data {
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struct device_node *ctrl_node;
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struct device_node *phy_node;
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bool is_active;
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const char *name;
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const char *display_type;
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};
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/**
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* struct dp_ctrl_resource - controller's IO related data
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*
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* @dp_controller: Display Port controller mapped memory address
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* @phy_io: phy's mapped memory address
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*/
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struct dp_io {
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struct dss_io_data dp_controller;
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struct phy *phy;
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union phy_configure_opts phy_opts;
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};
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/**
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* struct dp_pinctrl - DP's pin control
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*
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* @pin: pin-controller's instance
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* @state_active: active state pin control
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* @state_hpd_active: hpd active state pin control
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* @state_suspend: suspend state pin control
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*/
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struct dp_pinctrl {
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struct pinctrl *pin;
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struct pinctrl_state *state_active;
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struct pinctrl_state *state_hpd_active;
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struct pinctrl_state *state_suspend;
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};
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#define DP_DEV_REGULATOR_MAX 4
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/* Regulators for DP devices */
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struct dp_reg_entry {
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char name[32];
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int enable_load;
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int disable_load;
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};
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struct dp_regulator_cfg {
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int num;
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struct dp_reg_entry regs[DP_DEV_REGULATOR_MAX];
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};
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/**
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* struct dp_parser - DP parser's data exposed to clients
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*
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* @pdev: platform data of the client
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* @mp: gpio, regulator and clock related data
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* @pinctrl: pin-control related data
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* @disp_data: controller's display related data
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* @parse: function to be called by client to parse device tree.
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*/
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struct dp_parser {
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struct platform_device *pdev;
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struct dss_module_power mp[DP_MAX_PM];
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struct dp_pinctrl pinctrl;
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struct dp_io io;
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struct dp_display_data disp_data;
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const struct dp_regulator_cfg *regulator_cfg;
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u32 max_dp_lanes;
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int (*parse)(struct dp_parser *parser);
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};
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/**
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* dp_parser_get() - get the DP's device tree parser module
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*
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* @pdev: platform data of the client
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* return: pointer to dp_parser structure.
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*
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* This function provides client capability to parse the
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* device tree and populate the data structures. The data
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* related to clock, regulators, pin-control and other
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* can be parsed using this module.
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*/
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struct dp_parser *dp_parser_get(struct platform_device *pdev);
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#endif
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