mirror of https://gitee.com/openkylin/linux.git
0b21503dbb
Currently, a RCG's M/N counter (used for fraction division) is
set to either 'bypass' (counter disabled) or 'dual edge' (counter
enabled) based on whether the corresponding rcg struct has a mnd
field specified and a non-zero N.
In the case where M and N are the same value, the M/N counter is
still enabled by code even though no division takes place.
Leaving the RCG in such a state can result in improper behavior.
This was observed with the DSI pixel clock RCG when M and N were
both set to 1.
Add an additional check (M != N) to enable the M/N counter only
when it's needed for fraction division.
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Fixes:
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.. | ||
Kconfig | ||
Makefile | ||
clk-branch.c | ||
clk-branch.h | ||
clk-pll.c | ||
clk-pll.h | ||
clk-rcg.c | ||
clk-rcg.h | ||
clk-rcg2.c | ||
clk-regmap-divider.c | ||
clk-regmap-divider.h | ||
clk-regmap-mux.c | ||
clk-regmap-mux.h | ||
clk-regmap.c | ||
clk-regmap.h | ||
common.c | ||
common.h | ||
gcc-apq8084.c | ||
gcc-ipq806x.c | ||
gcc-msm8660.c | ||
gcc-msm8960.c | ||
gcc-msm8974.c | ||
lcc-ipq806x.c | ||
lcc-msm8960.c | ||
mmcc-apq8084.c | ||
mmcc-msm8960.c | ||
mmcc-msm8974.c | ||
reset.c | ||
reset.h |