mirror of https://gitee.com/openkylin/linux.git
650 lines
15 KiB
C
650 lines
15 KiB
C
#include <linux/mm.h>
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#include <linux/gfp.h>
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#include <asm/pgalloc.h>
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#include <asm/pgtable.h>
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#include <asm/tlb.h>
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#include <asm/fixmap.h>
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#include <asm/mtrr.h>
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#define PGALLOC_GFP GFP_KERNEL | __GFP_NOTRACK | __GFP_REPEAT | __GFP_ZERO
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#ifdef CONFIG_HIGHPTE
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#define PGALLOC_USER_GFP __GFP_HIGHMEM
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#else
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#define PGALLOC_USER_GFP 0
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#endif
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gfp_t __userpte_alloc_gfp = PGALLOC_GFP | PGALLOC_USER_GFP;
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pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
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{
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return (pte_t *)__get_free_page(PGALLOC_GFP);
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}
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pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
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{
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struct page *pte;
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pte = alloc_pages(__userpte_alloc_gfp, 0);
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if (!pte)
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return NULL;
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if (!pgtable_page_ctor(pte)) {
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__free_page(pte);
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return NULL;
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}
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return pte;
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}
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static int __init setup_userpte(char *arg)
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{
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if (!arg)
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return -EINVAL;
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/*
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* "userpte=nohigh" disables allocation of user pagetables in
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* high memory.
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*/
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if (strcmp(arg, "nohigh") == 0)
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__userpte_alloc_gfp &= ~__GFP_HIGHMEM;
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else
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return -EINVAL;
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return 0;
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}
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early_param("userpte", setup_userpte);
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void ___pte_free_tlb(struct mmu_gather *tlb, struct page *pte)
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{
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pgtable_page_dtor(pte);
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paravirt_release_pte(page_to_pfn(pte));
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tlb_remove_page(tlb, pte);
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}
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#if CONFIG_PGTABLE_LEVELS > 2
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void ___pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd)
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{
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struct page *page = virt_to_page(pmd);
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paravirt_release_pmd(__pa(pmd) >> PAGE_SHIFT);
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/*
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* NOTE! For PAE, any changes to the top page-directory-pointer-table
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* entries need a full cr3 reload to flush.
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*/
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#ifdef CONFIG_X86_PAE
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tlb->need_flush_all = 1;
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#endif
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pgtable_pmd_page_dtor(page);
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tlb_remove_page(tlb, page);
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}
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#if CONFIG_PGTABLE_LEVELS > 3
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void ___pud_free_tlb(struct mmu_gather *tlb, pud_t *pud)
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{
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paravirt_release_pud(__pa(pud) >> PAGE_SHIFT);
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tlb_remove_page(tlb, virt_to_page(pud));
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}
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#endif /* CONFIG_PGTABLE_LEVELS > 3 */
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#endif /* CONFIG_PGTABLE_LEVELS > 2 */
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static inline void pgd_list_add(pgd_t *pgd)
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{
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struct page *page = virt_to_page(pgd);
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list_add(&page->lru, &pgd_list);
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}
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static inline void pgd_list_del(pgd_t *pgd)
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{
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struct page *page = virt_to_page(pgd);
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list_del(&page->lru);
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}
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#define UNSHARED_PTRS_PER_PGD \
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(SHARED_KERNEL_PMD ? KERNEL_PGD_BOUNDARY : PTRS_PER_PGD)
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static void pgd_set_mm(pgd_t *pgd, struct mm_struct *mm)
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{
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BUILD_BUG_ON(sizeof(virt_to_page(pgd)->index) < sizeof(mm));
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virt_to_page(pgd)->index = (pgoff_t)mm;
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}
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struct mm_struct *pgd_page_get_mm(struct page *page)
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{
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return (struct mm_struct *)page->index;
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}
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static void pgd_ctor(struct mm_struct *mm, pgd_t *pgd)
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{
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/* If the pgd points to a shared pagetable level (either the
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ptes in non-PAE, or shared PMD in PAE), then just copy the
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references from swapper_pg_dir. */
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if (CONFIG_PGTABLE_LEVELS == 2 ||
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(CONFIG_PGTABLE_LEVELS == 3 && SHARED_KERNEL_PMD) ||
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CONFIG_PGTABLE_LEVELS == 4) {
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clone_pgd_range(pgd + KERNEL_PGD_BOUNDARY,
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swapper_pg_dir + KERNEL_PGD_BOUNDARY,
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KERNEL_PGD_PTRS);
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}
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/* list required to sync kernel mapping updates */
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if (!SHARED_KERNEL_PMD) {
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pgd_set_mm(pgd, mm);
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pgd_list_add(pgd);
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}
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}
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static void pgd_dtor(pgd_t *pgd)
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{
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if (SHARED_KERNEL_PMD)
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return;
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spin_lock(&pgd_lock);
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pgd_list_del(pgd);
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spin_unlock(&pgd_lock);
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}
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/*
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* List of all pgd's needed for non-PAE so it can invalidate entries
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* in both cached and uncached pgd's; not needed for PAE since the
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* kernel pmd is shared. If PAE were not to share the pmd a similar
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* tactic would be needed. This is essentially codepath-based locking
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* against pageattr.c; it is the unique case in which a valid change
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* of kernel pagetables can't be lazily synchronized by vmalloc faults.
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* vmalloc faults work because attached pagetables are never freed.
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* -- nyc
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*/
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#ifdef CONFIG_X86_PAE
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/*
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* In PAE mode, we need to do a cr3 reload (=tlb flush) when
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* updating the top-level pagetable entries to guarantee the
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* processor notices the update. Since this is expensive, and
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* all 4 top-level entries are used almost immediately in a
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* new process's life, we just pre-populate them here.
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*
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* Also, if we're in a paravirt environment where the kernel pmd is
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* not shared between pagetables (!SHARED_KERNEL_PMDS), we allocate
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* and initialize the kernel pmds here.
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*/
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#define PREALLOCATED_PMDS UNSHARED_PTRS_PER_PGD
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void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd)
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{
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paravirt_alloc_pmd(mm, __pa(pmd) >> PAGE_SHIFT);
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/* Note: almost everything apart from _PAGE_PRESENT is
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reserved at the pmd (PDPT) level. */
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set_pud(pudp, __pud(__pa(pmd) | _PAGE_PRESENT));
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/*
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* According to Intel App note "TLBs, Paging-Structure Caches,
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* and Their Invalidation", April 2007, document 317080-001,
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* section 8.1: in PAE mode we explicitly have to flush the
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* TLB via cr3 if the top-level pgd is changed...
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*/
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flush_tlb_mm(mm);
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}
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#else /* !CONFIG_X86_PAE */
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/* No need to prepopulate any pagetable entries in non-PAE modes. */
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#define PREALLOCATED_PMDS 0
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#endif /* CONFIG_X86_PAE */
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static void free_pmds(struct mm_struct *mm, pmd_t *pmds[])
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{
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int i;
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for(i = 0; i < PREALLOCATED_PMDS; i++)
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if (pmds[i]) {
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pgtable_pmd_page_dtor(virt_to_page(pmds[i]));
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free_page((unsigned long)pmds[i]);
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mm_dec_nr_pmds(mm);
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}
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}
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static int preallocate_pmds(struct mm_struct *mm, pmd_t *pmds[])
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{
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int i;
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bool failed = false;
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for(i = 0; i < PREALLOCATED_PMDS; i++) {
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pmd_t *pmd = (pmd_t *)__get_free_page(PGALLOC_GFP);
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if (!pmd)
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failed = true;
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if (pmd && !pgtable_pmd_page_ctor(virt_to_page(pmd))) {
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free_page((unsigned long)pmd);
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pmd = NULL;
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failed = true;
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}
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if (pmd)
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mm_inc_nr_pmds(mm);
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pmds[i] = pmd;
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}
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if (failed) {
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free_pmds(mm, pmds);
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return -ENOMEM;
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}
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return 0;
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}
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/*
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* Mop up any pmd pages which may still be attached to the pgd.
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* Normally they will be freed by munmap/exit_mmap, but any pmd we
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* preallocate which never got a corresponding vma will need to be
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* freed manually.
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*/
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static void pgd_mop_up_pmds(struct mm_struct *mm, pgd_t *pgdp)
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{
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int i;
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for(i = 0; i < PREALLOCATED_PMDS; i++) {
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pgd_t pgd = pgdp[i];
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if (pgd_val(pgd) != 0) {
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pmd_t *pmd = (pmd_t *)pgd_page_vaddr(pgd);
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pgdp[i] = native_make_pgd(0);
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paravirt_release_pmd(pgd_val(pgd) >> PAGE_SHIFT);
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pmd_free(mm, pmd);
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mm_dec_nr_pmds(mm);
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}
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}
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}
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static void pgd_prepopulate_pmd(struct mm_struct *mm, pgd_t *pgd, pmd_t *pmds[])
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{
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pud_t *pud;
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int i;
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if (PREALLOCATED_PMDS == 0) /* Work around gcc-3.4.x bug */
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return;
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pud = pud_offset(pgd, 0);
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for (i = 0; i < PREALLOCATED_PMDS; i++, pud++) {
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pmd_t *pmd = pmds[i];
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if (i >= KERNEL_PGD_BOUNDARY)
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memcpy(pmd, (pmd_t *)pgd_page_vaddr(swapper_pg_dir[i]),
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sizeof(pmd_t) * PTRS_PER_PMD);
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pud_populate(mm, pud, pmd);
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}
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}
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/*
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* Xen paravirt assumes pgd table should be in one page. 64 bit kernel also
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* assumes that pgd should be in one page.
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*
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* But kernel with PAE paging that is not running as a Xen domain
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* only needs to allocate 32 bytes for pgd instead of one page.
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*/
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#ifdef CONFIG_X86_PAE
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#include <linux/slab.h>
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#define PGD_SIZE (PTRS_PER_PGD * sizeof(pgd_t))
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#define PGD_ALIGN 32
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static struct kmem_cache *pgd_cache;
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static int __init pgd_cache_init(void)
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{
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/*
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* When PAE kernel is running as a Xen domain, it does not use
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* shared kernel pmd. And this requires a whole page for pgd.
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*/
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if (!SHARED_KERNEL_PMD)
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return 0;
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/*
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* when PAE kernel is not running as a Xen domain, it uses
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* shared kernel pmd. Shared kernel pmd does not require a whole
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* page for pgd. We are able to just allocate a 32-byte for pgd.
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* During boot time, we create a 32-byte slab for pgd table allocation.
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*/
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pgd_cache = kmem_cache_create("pgd_cache", PGD_SIZE, PGD_ALIGN,
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SLAB_PANIC, NULL);
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if (!pgd_cache)
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return -ENOMEM;
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return 0;
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}
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core_initcall(pgd_cache_init);
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static inline pgd_t *_pgd_alloc(void)
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{
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/*
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* If no SHARED_KERNEL_PMD, PAE kernel is running as a Xen domain.
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* We allocate one page for pgd.
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*/
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if (!SHARED_KERNEL_PMD)
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return (pgd_t *)__get_free_page(PGALLOC_GFP);
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/*
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* Now PAE kernel is not running as a Xen domain. We can allocate
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* a 32-byte slab for pgd to save memory space.
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*/
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return kmem_cache_alloc(pgd_cache, PGALLOC_GFP);
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}
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static inline void _pgd_free(pgd_t *pgd)
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{
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if (!SHARED_KERNEL_PMD)
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free_page((unsigned long)pgd);
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else
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kmem_cache_free(pgd_cache, pgd);
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}
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#else
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static inline pgd_t *_pgd_alloc(void)
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{
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return (pgd_t *)__get_free_page(PGALLOC_GFP);
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}
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static inline void _pgd_free(pgd_t *pgd)
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{
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free_page((unsigned long)pgd);
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}
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#endif /* CONFIG_X86_PAE */
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pgd_t *pgd_alloc(struct mm_struct *mm)
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{
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pgd_t *pgd;
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pmd_t *pmds[PREALLOCATED_PMDS];
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pgd = _pgd_alloc();
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if (pgd == NULL)
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goto out;
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mm->pgd = pgd;
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if (preallocate_pmds(mm, pmds) != 0)
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goto out_free_pgd;
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if (paravirt_pgd_alloc(mm) != 0)
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goto out_free_pmds;
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/*
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* Make sure that pre-populating the pmds is atomic with
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* respect to anything walking the pgd_list, so that they
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* never see a partially populated pgd.
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*/
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spin_lock(&pgd_lock);
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pgd_ctor(mm, pgd);
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pgd_prepopulate_pmd(mm, pgd, pmds);
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spin_unlock(&pgd_lock);
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return pgd;
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out_free_pmds:
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free_pmds(mm, pmds);
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out_free_pgd:
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_pgd_free(pgd);
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out:
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return NULL;
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}
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void pgd_free(struct mm_struct *mm, pgd_t *pgd)
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{
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pgd_mop_up_pmds(mm, pgd);
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pgd_dtor(pgd);
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paravirt_pgd_free(mm, pgd);
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_pgd_free(pgd);
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}
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/*
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* Used to set accessed or dirty bits in the page table entries
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* on other architectures. On x86, the accessed and dirty bits
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* are tracked by hardware. However, do_wp_page calls this function
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* to also make the pte writeable at the same time the dirty bit is
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* set. In that case we do actually need to write the PTE.
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*/
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int ptep_set_access_flags(struct vm_area_struct *vma,
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unsigned long address, pte_t *ptep,
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pte_t entry, int dirty)
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{
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int changed = !pte_same(*ptep, entry);
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if (changed && dirty) {
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*ptep = entry;
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pte_update_defer(vma->vm_mm, address, ptep);
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}
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return changed;
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}
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#ifdef CONFIG_TRANSPARENT_HUGEPAGE
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int pmdp_set_access_flags(struct vm_area_struct *vma,
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unsigned long address, pmd_t *pmdp,
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pmd_t entry, int dirty)
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{
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int changed = !pmd_same(*pmdp, entry);
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VM_BUG_ON(address & ~HPAGE_PMD_MASK);
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if (changed && dirty) {
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*pmdp = entry;
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pmd_update_defer(vma->vm_mm, address, pmdp);
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/*
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* We had a write-protection fault here and changed the pmd
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* to to more permissive. No need to flush the TLB for that,
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* #PF is architecturally guaranteed to do that and in the
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* worst-case we'll generate a spurious fault.
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*/
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}
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return changed;
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}
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#endif
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int ptep_test_and_clear_young(struct vm_area_struct *vma,
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unsigned long addr, pte_t *ptep)
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{
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int ret = 0;
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if (pte_young(*ptep))
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ret = test_and_clear_bit(_PAGE_BIT_ACCESSED,
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(unsigned long *) &ptep->pte);
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if (ret)
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pte_update(vma->vm_mm, addr, ptep);
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return ret;
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}
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#ifdef CONFIG_TRANSPARENT_HUGEPAGE
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int pmdp_test_and_clear_young(struct vm_area_struct *vma,
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unsigned long addr, pmd_t *pmdp)
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{
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int ret = 0;
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if (pmd_young(*pmdp))
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ret = test_and_clear_bit(_PAGE_BIT_ACCESSED,
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(unsigned long *)pmdp);
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if (ret)
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pmd_update(vma->vm_mm, addr, pmdp);
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return ret;
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}
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#endif
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int ptep_clear_flush_young(struct vm_area_struct *vma,
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unsigned long address, pte_t *ptep)
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{
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/*
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* On x86 CPUs, clearing the accessed bit without a TLB flush
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* doesn't cause data corruption. [ It could cause incorrect
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* page aging and the (mistaken) reclaim of hot pages, but the
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* chance of that should be relatively low. ]
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*
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* So as a performance optimization don't flush the TLB when
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* clearing the accessed bit, it will eventually be flushed by
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* a context switch or a VM operation anyway. [ In the rare
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* event of it not getting flushed for a long time the delay
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* shouldn't really matter because there's no real memory
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* pressure for swapout to react to. ]
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*/
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return ptep_test_and_clear_young(vma, address, ptep);
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}
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#ifdef CONFIG_TRANSPARENT_HUGEPAGE
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int pmdp_clear_flush_young(struct vm_area_struct *vma,
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unsigned long address, pmd_t *pmdp)
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{
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int young;
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VM_BUG_ON(address & ~HPAGE_PMD_MASK);
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young = pmdp_test_and_clear_young(vma, address, pmdp);
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if (young)
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flush_tlb_range(vma, address, address + HPAGE_PMD_SIZE);
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return young;
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}
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void pmdp_splitting_flush(struct vm_area_struct *vma,
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unsigned long address, pmd_t *pmdp)
|
|
{
|
|
int set;
|
|
VM_BUG_ON(address & ~HPAGE_PMD_MASK);
|
|
set = !test_and_set_bit(_PAGE_BIT_SPLITTING,
|
|
(unsigned long *)pmdp);
|
|
if (set) {
|
|
pmd_update(vma->vm_mm, address, pmdp);
|
|
/* need tlb flush only to serialize against gup-fast */
|
|
flush_tlb_range(vma, address, address + HPAGE_PMD_SIZE);
|
|
}
|
|
}
|
|
#endif
|
|
|
|
/**
|
|
* reserve_top_address - reserves a hole in the top of kernel address space
|
|
* @reserve - size of hole to reserve
|
|
*
|
|
* Can be used to relocate the fixmap area and poke a hole in the top
|
|
* of kernel address space to make room for a hypervisor.
|
|
*/
|
|
void __init reserve_top_address(unsigned long reserve)
|
|
{
|
|
#ifdef CONFIG_X86_32
|
|
BUG_ON(fixmaps_set > 0);
|
|
__FIXADDR_TOP = round_down(-reserve, 1 << PMD_SHIFT) - PAGE_SIZE;
|
|
printk(KERN_INFO "Reserving virtual address space above 0x%08lx (rounded to 0x%08lx)\n",
|
|
-reserve, __FIXADDR_TOP + PAGE_SIZE);
|
|
#endif
|
|
}
|
|
|
|
int fixmaps_set;
|
|
|
|
void __native_set_fixmap(enum fixed_addresses idx, pte_t pte)
|
|
{
|
|
unsigned long address = __fix_to_virt(idx);
|
|
|
|
if (idx >= __end_of_fixed_addresses) {
|
|
BUG();
|
|
return;
|
|
}
|
|
set_pte_vaddr(address, pte);
|
|
fixmaps_set++;
|
|
}
|
|
|
|
void native_set_fixmap(enum fixed_addresses idx, phys_addr_t phys,
|
|
pgprot_t flags)
|
|
{
|
|
__native_set_fixmap(idx, pfn_pte(phys >> PAGE_SHIFT, flags));
|
|
}
|
|
|
|
#ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
|
|
/**
|
|
* pud_set_huge - setup kernel PUD mapping
|
|
*
|
|
* MTRR can override PAT memory types with 4KiB granularity. Therefore,
|
|
* this function does not set up a huge page when the range is covered
|
|
* by a non-WB type of MTRR. MTRR_TYPE_INVALID indicates that MTRR are
|
|
* disabled.
|
|
*
|
|
* Returns 1 on success and 0 on failure.
|
|
*/
|
|
int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
|
|
{
|
|
u8 mtrr;
|
|
|
|
mtrr = mtrr_type_lookup(addr, addr + PUD_SIZE);
|
|
if ((mtrr != MTRR_TYPE_WRBACK) && (mtrr != MTRR_TYPE_INVALID))
|
|
return 0;
|
|
|
|
prot = pgprot_4k_2_large(prot);
|
|
|
|
set_pte((pte_t *)pud, pfn_pte(
|
|
(u64)addr >> PAGE_SHIFT,
|
|
__pgprot(pgprot_val(prot) | _PAGE_PSE)));
|
|
|
|
return 1;
|
|
}
|
|
|
|
/**
|
|
* pmd_set_huge - setup kernel PMD mapping
|
|
*
|
|
* MTRR can override PAT memory types with 4KiB granularity. Therefore,
|
|
* this function does not set up a huge page when the range is covered
|
|
* by a non-WB type of MTRR. MTRR_TYPE_INVALID indicates that MTRR are
|
|
* disabled.
|
|
*
|
|
* Returns 1 on success and 0 on failure.
|
|
*/
|
|
int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
|
|
{
|
|
u8 mtrr;
|
|
|
|
mtrr = mtrr_type_lookup(addr, addr + PMD_SIZE);
|
|
if ((mtrr != MTRR_TYPE_WRBACK) && (mtrr != MTRR_TYPE_INVALID))
|
|
return 0;
|
|
|
|
prot = pgprot_4k_2_large(prot);
|
|
|
|
set_pte((pte_t *)pmd, pfn_pte(
|
|
(u64)addr >> PAGE_SHIFT,
|
|
__pgprot(pgprot_val(prot) | _PAGE_PSE)));
|
|
|
|
return 1;
|
|
}
|
|
|
|
/**
|
|
* pud_clear_huge - clear kernel PUD mapping when it is set
|
|
*
|
|
* Returns 1 on success and 0 on failure (no PUD map is found).
|
|
*/
|
|
int pud_clear_huge(pud_t *pud)
|
|
{
|
|
if (pud_large(*pud)) {
|
|
pud_clear(pud);
|
|
return 1;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* pmd_clear_huge - clear kernel PMD mapping when it is set
|
|
*
|
|
* Returns 1 on success and 0 on failure (no PMD map is found).
|
|
*/
|
|
int pmd_clear_huge(pmd_t *pmd)
|
|
{
|
|
if (pmd_large(*pmd)) {
|
|
pmd_clear(pmd);
|
|
return 1;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
|