mirror of https://gitee.com/openkylin/linux.git
762 lines
21 KiB
C
762 lines
21 KiB
C
/****************************************************************************
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* Driver for Solarflare Solarstorm network controllers and boards
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* Copyright 2007-2009 Solarflare Communications Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation, incorporated herein by reference.
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*/
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#include <linux/rtnetlink.h>
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#include "net_driver.h"
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#include "phy.h"
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#include "efx.h"
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#include "nic.h"
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#include "regs.h"
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#include "io.h"
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#include "workarounds.h"
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/* Macros for unpacking the board revision */
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/* The revision info is in host byte order. */
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#define FALCON_BOARD_TYPE(_rev) (_rev >> 8)
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#define FALCON_BOARD_MAJOR(_rev) ((_rev >> 4) & 0xf)
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#define FALCON_BOARD_MINOR(_rev) (_rev & 0xf)
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/* Board types */
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#define FALCON_BOARD_SFE4001 0x01
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#define FALCON_BOARD_SFE4002 0x02
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#define FALCON_BOARD_SFN4111T 0x51
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#define FALCON_BOARD_SFN4112F 0x52
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/* Board temperature is about 15°C above ambient when air flow is
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* limited. */
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#define FALCON_BOARD_TEMP_BIAS 15
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/* SFC4000 datasheet says: 'The maximum permitted junction temperature
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* is 125°C; the thermal design of the environment for the SFC4000
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* should aim to keep this well below 100°C.' */
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#define FALCON_JUNC_TEMP_MAX 90
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/*****************************************************************************
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* Support for LM87 sensor chip used on several boards
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*/
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#define LM87_REG_ALARMS1 0x41
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#define LM87_REG_ALARMS2 0x42
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#define LM87_IN_LIMITS(nr, _min, _max) \
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0x2B + (nr) * 2, _max, 0x2C + (nr) * 2, _min
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#define LM87_AIN_LIMITS(nr, _min, _max) \
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0x3B + (nr), _max, 0x1A + (nr), _min
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#define LM87_TEMP_INT_LIMITS(_min, _max) \
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0x39, _max, 0x3A, _min
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#define LM87_TEMP_EXT1_LIMITS(_min, _max) \
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0x37, _max, 0x38, _min
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#define LM87_ALARM_TEMP_INT 0x10
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#define LM87_ALARM_TEMP_EXT1 0x20
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#if defined(CONFIG_SENSORS_LM87) || defined(CONFIG_SENSORS_LM87_MODULE)
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static int efx_init_lm87(struct efx_nic *efx, struct i2c_board_info *info,
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const u8 *reg_values)
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{
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struct falcon_board *board = falcon_board(efx);
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struct i2c_client *client = i2c_new_device(&board->i2c_adap, info);
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int rc;
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if (!client)
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return -EIO;
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while (*reg_values) {
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u8 reg = *reg_values++;
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u8 value = *reg_values++;
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rc = i2c_smbus_write_byte_data(client, reg, value);
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if (rc)
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goto err;
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}
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board->hwmon_client = client;
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return 0;
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err:
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i2c_unregister_device(client);
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return rc;
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}
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static void efx_fini_lm87(struct efx_nic *efx)
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{
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i2c_unregister_device(falcon_board(efx)->hwmon_client);
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}
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static int efx_check_lm87(struct efx_nic *efx, unsigned mask)
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{
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struct i2c_client *client = falcon_board(efx)->hwmon_client;
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s32 alarms1, alarms2;
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/* If link is up then do not monitor temperature */
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if (EFX_WORKAROUND_7884(efx) && efx->link_state.up)
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return 0;
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alarms1 = i2c_smbus_read_byte_data(client, LM87_REG_ALARMS1);
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alarms2 = i2c_smbus_read_byte_data(client, LM87_REG_ALARMS2);
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if (alarms1 < 0)
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return alarms1;
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if (alarms2 < 0)
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return alarms2;
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alarms1 &= mask;
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alarms2 &= mask >> 8;
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if (alarms1 || alarms2) {
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EFX_ERR(efx,
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"LM87 detected a hardware failure (status %02x:%02x)"
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"%s%s\n",
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alarms1, alarms2,
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(alarms1 & LM87_ALARM_TEMP_INT) ? " INTERNAL" : "",
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(alarms1 & LM87_ALARM_TEMP_EXT1) ? " EXTERNAL" : "");
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return -ERANGE;
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}
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return 0;
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}
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#else /* !CONFIG_SENSORS_LM87 */
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static inline int
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efx_init_lm87(struct efx_nic *efx, struct i2c_board_info *info,
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const u8 *reg_values)
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{
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return 0;
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}
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static inline void efx_fini_lm87(struct efx_nic *efx)
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{
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}
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static inline int efx_check_lm87(struct efx_nic *efx, unsigned mask)
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{
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return 0;
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}
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#endif /* CONFIG_SENSORS_LM87 */
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/*****************************************************************************
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* Support for the SFE4001 and SFN4111T NICs.
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*
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* The SFE4001 does not power-up fully at reset due to its high power
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* consumption. We control its power via a PCA9539 I/O expander.
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* Both boards have a MAX6647 temperature monitor which we expose to
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* the lm90 driver.
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*
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* This also provides minimal support for reflashing the PHY, which is
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* initiated by resetting it with the FLASH_CFG_1 pin pulled down.
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* On SFE4001 rev A2 and later this is connected to the 3V3X output of
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* the IO-expander; on the SFN4111T it is connected to Falcon's GPIO3.
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* We represent reflash mode as PHY_MODE_SPECIAL and make it mutually
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* exclusive with the network device being open.
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*/
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/**************************************************************************
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* Support for I2C IO Expander device on SFE4001
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*/
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#define PCA9539 0x74
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#define P0_IN 0x00
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#define P0_OUT 0x02
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#define P0_INVERT 0x04
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#define P0_CONFIG 0x06
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#define P0_EN_1V0X_LBN 0
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#define P0_EN_1V0X_WIDTH 1
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#define P0_EN_1V2_LBN 1
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#define P0_EN_1V2_WIDTH 1
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#define P0_EN_2V5_LBN 2
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#define P0_EN_2V5_WIDTH 1
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#define P0_EN_3V3X_LBN 3
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#define P0_EN_3V3X_WIDTH 1
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#define P0_EN_5V_LBN 4
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#define P0_EN_5V_WIDTH 1
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#define P0_SHORTEN_JTAG_LBN 5
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#define P0_SHORTEN_JTAG_WIDTH 1
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#define P0_X_TRST_LBN 6
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#define P0_X_TRST_WIDTH 1
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#define P0_DSP_RESET_LBN 7
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#define P0_DSP_RESET_WIDTH 1
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#define P1_IN 0x01
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#define P1_OUT 0x03
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#define P1_INVERT 0x05
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#define P1_CONFIG 0x07
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#define P1_AFE_PWD_LBN 0
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#define P1_AFE_PWD_WIDTH 1
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#define P1_DSP_PWD25_LBN 1
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#define P1_DSP_PWD25_WIDTH 1
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#define P1_RESERVED_LBN 2
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#define P1_RESERVED_WIDTH 2
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#define P1_SPARE_LBN 4
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#define P1_SPARE_WIDTH 4
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/* Temperature Sensor */
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#define MAX664X_REG_RSL 0x02
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#define MAX664X_REG_WLHO 0x0B
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static void sfe4001_poweroff(struct efx_nic *efx)
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{
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struct i2c_client *ioexp_client = falcon_board(efx)->ioexp_client;
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struct i2c_client *hwmon_client = falcon_board(efx)->hwmon_client;
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/* Turn off all power rails and disable outputs */
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i2c_smbus_write_byte_data(ioexp_client, P0_OUT, 0xff);
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i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, 0xff);
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i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0xff);
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/* Clear any over-temperature alert */
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i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
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}
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static int sfe4001_poweron(struct efx_nic *efx)
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{
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struct i2c_client *ioexp_client = falcon_board(efx)->ioexp_client;
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struct i2c_client *hwmon_client = falcon_board(efx)->hwmon_client;
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unsigned int i, j;
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int rc;
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u8 out;
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/* Clear any previous over-temperature alert */
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rc = i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
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if (rc < 0)
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return rc;
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/* Enable port 0 and port 1 outputs on IO expander */
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rc = i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0x00);
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if (rc)
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return rc;
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rc = i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG,
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0xff & ~(1 << P1_SPARE_LBN));
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if (rc)
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goto fail_on;
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/* If PHY power is on, turn it all off and wait 1 second to
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* ensure a full reset.
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*/
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rc = i2c_smbus_read_byte_data(ioexp_client, P0_OUT);
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if (rc < 0)
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goto fail_on;
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out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) |
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(0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) |
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(0 << P0_EN_1V0X_LBN));
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if (rc != out) {
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EFX_INFO(efx, "power-cycling PHY\n");
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rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
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if (rc)
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goto fail_on;
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schedule_timeout_uninterruptible(HZ);
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}
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for (i = 0; i < 20; ++i) {
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/* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */
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out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) |
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(1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) |
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(1 << P0_X_TRST_LBN));
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if (efx->phy_mode & PHY_MODE_SPECIAL)
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out |= 1 << P0_EN_3V3X_LBN;
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rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
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if (rc)
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goto fail_on;
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msleep(10);
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/* Turn on 1V power rail */
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out &= ~(1 << P0_EN_1V0X_LBN);
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rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
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if (rc)
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goto fail_on;
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EFX_INFO(efx, "waiting for DSP boot (attempt %d)...\n", i);
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/* In flash config mode, DSP does not turn on AFE, so
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* just wait 1 second.
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*/
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if (efx->phy_mode & PHY_MODE_SPECIAL) {
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schedule_timeout_uninterruptible(HZ);
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return 0;
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}
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for (j = 0; j < 10; ++j) {
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msleep(100);
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/* Check DSP has asserted AFE power line */
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rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN);
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if (rc < 0)
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goto fail_on;
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if (rc & (1 << P1_AFE_PWD_LBN))
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return 0;
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}
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}
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EFX_INFO(efx, "timed out waiting for DSP boot\n");
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rc = -ETIMEDOUT;
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fail_on:
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sfe4001_poweroff(efx);
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return rc;
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}
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static int sfn4111t_reset(struct efx_nic *efx)
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{
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struct falcon_board *board = falcon_board(efx);
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efx_oword_t reg;
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/* GPIO 3 and the GPIO register are shared with I2C, so block that */
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i2c_lock_adapter(&board->i2c_adap);
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/* Pull RST_N (GPIO 2) low then let it up again, setting the
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* FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the
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* output enables; the output levels should always be 0 (low)
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* and we rely on external pull-ups. */
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efx_reado(efx, ®, FR_AB_GPIO_CTL);
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EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO2_OEN, true);
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efx_writeo(efx, ®, FR_AB_GPIO_CTL);
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msleep(1000);
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EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO2_OEN, false);
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EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO3_OEN,
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!!(efx->phy_mode & PHY_MODE_SPECIAL));
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efx_writeo(efx, ®, FR_AB_GPIO_CTL);
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msleep(1);
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i2c_unlock_adapter(&board->i2c_adap);
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ssleep(1);
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return 0;
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}
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static ssize_t show_phy_flash_cfg(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
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return sprintf(buf, "%d\n", !!(efx->phy_mode & PHY_MODE_SPECIAL));
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}
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static ssize_t set_phy_flash_cfg(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
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enum efx_phy_mode old_mode, new_mode;
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int err;
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rtnl_lock();
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old_mode = efx->phy_mode;
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if (count == 0 || *buf == '0')
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new_mode = old_mode & ~PHY_MODE_SPECIAL;
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else
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new_mode = PHY_MODE_SPECIAL;
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if (old_mode == new_mode) {
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err = 0;
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} else if (efx->state != STATE_RUNNING || netif_running(efx->net_dev)) {
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err = -EBUSY;
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} else {
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/* Reset the PHY, reconfigure the MAC and enable/disable
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* MAC stats accordingly. */
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efx->phy_mode = new_mode;
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if (new_mode & PHY_MODE_SPECIAL)
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falcon_stop_nic_stats(efx);
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if (falcon_board(efx)->type->id == FALCON_BOARD_SFE4001)
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err = sfe4001_poweron(efx);
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else
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err = sfn4111t_reset(efx);
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if (!err)
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err = efx_reconfigure_port(efx);
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if (!(new_mode & PHY_MODE_SPECIAL))
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falcon_start_nic_stats(efx);
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}
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rtnl_unlock();
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return err ? err : count;
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}
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static DEVICE_ATTR(phy_flash_cfg, 0644, show_phy_flash_cfg, set_phy_flash_cfg);
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static void sfe4001_fini(struct efx_nic *efx)
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{
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struct falcon_board *board = falcon_board(efx);
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EFX_INFO(efx, "%s\n", __func__);
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device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
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sfe4001_poweroff(efx);
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i2c_unregister_device(board->ioexp_client);
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i2c_unregister_device(board->hwmon_client);
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}
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static int sfe4001_check_hw(struct efx_nic *efx)
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{
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s32 status;
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/* If XAUI link is up then do not monitor */
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if (EFX_WORKAROUND_7884(efx) && !efx->xmac_poll_required)
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return 0;
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/* Check the powered status of the PHY. Lack of power implies that
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* the MAX6647 has shut down power to it, probably due to a temp.
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* alarm. Reading the power status rather than the MAX6647 status
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* directly because the later is read-to-clear and would thus
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* start to power up the PHY again when polled, causing us to blip
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* the power undesirably.
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* We know we can read from the IO expander because we did
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* it during power-on. Assume failure now is bad news. */
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status = i2c_smbus_read_byte_data(falcon_board(efx)->ioexp_client, P1_IN);
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if (status >= 0 &&
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(status & ((1 << P1_AFE_PWD_LBN) | (1 << P1_DSP_PWD25_LBN))) != 0)
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return 0;
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/* Use board power control, not PHY power control */
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sfe4001_poweroff(efx);
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efx->phy_mode = PHY_MODE_OFF;
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return (status < 0) ? -EIO : -ERANGE;
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}
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static struct i2c_board_info sfe4001_hwmon_info = {
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I2C_BOARD_INFO("max6647", 0x4e),
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};
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/* This board uses an I2C expander to provider power to the PHY, which needs to
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* be turned on before the PHY can be used.
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* Context: Process context, rtnl lock held
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*/
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static int sfe4001_init(struct efx_nic *efx)
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{
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struct falcon_board *board = falcon_board(efx);
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int rc;
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#if defined(CONFIG_SENSORS_LM90) || defined(CONFIG_SENSORS_LM90_MODULE)
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board->hwmon_client =
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i2c_new_device(&board->i2c_adap, &sfe4001_hwmon_info);
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#else
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board->hwmon_client =
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i2c_new_dummy(&board->i2c_adap, sfe4001_hwmon_info.addr);
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#endif
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if (!board->hwmon_client)
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return -EIO;
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/* Raise board/PHY high limit from 85 to 90 degrees Celsius */
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rc = i2c_smbus_write_byte_data(board->hwmon_client,
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MAX664X_REG_WLHO, 90);
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if (rc)
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goto fail_hwmon;
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board->ioexp_client = i2c_new_dummy(&board->i2c_adap, PCA9539);
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if (!board->ioexp_client) {
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rc = -EIO;
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goto fail_hwmon;
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}
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if (efx->phy_mode & PHY_MODE_SPECIAL) {
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/* PHY won't generate a 156.25 MHz clock and MAC stats fetch
|
|
* will fail. */
|
|
falcon_stop_nic_stats(efx);
|
|
}
|
|
rc = sfe4001_poweron(efx);
|
|
if (rc)
|
|
goto fail_ioexp;
|
|
|
|
rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
|
|
if (rc)
|
|
goto fail_on;
|
|
|
|
EFX_INFO(efx, "PHY is powered on\n");
|
|
return 0;
|
|
|
|
fail_on:
|
|
sfe4001_poweroff(efx);
|
|
fail_ioexp:
|
|
i2c_unregister_device(board->ioexp_client);
|
|
fail_hwmon:
|
|
i2c_unregister_device(board->hwmon_client);
|
|
return rc;
|
|
}
|
|
|
|
static int sfn4111t_check_hw(struct efx_nic *efx)
|
|
{
|
|
s32 status;
|
|
|
|
/* If XAUI link is up then do not monitor */
|
|
if (EFX_WORKAROUND_7884(efx) && !efx->xmac_poll_required)
|
|
return 0;
|
|
|
|
/* Test LHIGH, RHIGH, FAULT, EOT and IOT alarms */
|
|
status = i2c_smbus_read_byte_data(falcon_board(efx)->hwmon_client,
|
|
MAX664X_REG_RSL);
|
|
if (status < 0)
|
|
return -EIO;
|
|
if (status & 0x57)
|
|
return -ERANGE;
|
|
return 0;
|
|
}
|
|
|
|
static void sfn4111t_fini(struct efx_nic *efx)
|
|
{
|
|
EFX_INFO(efx, "%s\n", __func__);
|
|
|
|
device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
|
|
i2c_unregister_device(falcon_board(efx)->hwmon_client);
|
|
}
|
|
|
|
static struct i2c_board_info sfn4111t_a0_hwmon_info = {
|
|
I2C_BOARD_INFO("max6647", 0x4e),
|
|
};
|
|
|
|
static struct i2c_board_info sfn4111t_r5_hwmon_info = {
|
|
I2C_BOARD_INFO("max6646", 0x4d),
|
|
};
|
|
|
|
static void sfn4111t_init_phy(struct efx_nic *efx)
|
|
{
|
|
if (!(efx->phy_mode & PHY_MODE_SPECIAL)) {
|
|
if (sft9001_wait_boot(efx) != -EINVAL)
|
|
return;
|
|
|
|
efx->phy_mode = PHY_MODE_SPECIAL;
|
|
falcon_stop_nic_stats(efx);
|
|
}
|
|
|
|
sfn4111t_reset(efx);
|
|
sft9001_wait_boot(efx);
|
|
}
|
|
|
|
static int sfn4111t_init(struct efx_nic *efx)
|
|
{
|
|
struct falcon_board *board = falcon_board(efx);
|
|
int rc;
|
|
|
|
board->hwmon_client =
|
|
i2c_new_device(&board->i2c_adap,
|
|
(board->minor < 5) ?
|
|
&sfn4111t_a0_hwmon_info :
|
|
&sfn4111t_r5_hwmon_info);
|
|
if (!board->hwmon_client)
|
|
return -EIO;
|
|
|
|
rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
|
|
if (rc)
|
|
goto fail_hwmon;
|
|
|
|
if (efx->phy_mode & PHY_MODE_SPECIAL)
|
|
/* PHY may not generate a 156.25 MHz clock and MAC
|
|
* stats fetch will fail. */
|
|
falcon_stop_nic_stats(efx);
|
|
|
|
return 0;
|
|
|
|
fail_hwmon:
|
|
i2c_unregister_device(board->hwmon_client);
|
|
return rc;
|
|
}
|
|
|
|
/*****************************************************************************
|
|
* Support for the SFE4002
|
|
*
|
|
*/
|
|
static u8 sfe4002_lm87_channel = 0x03; /* use AIN not FAN inputs */
|
|
|
|
static const u8 sfe4002_lm87_regs[] = {
|
|
LM87_IN_LIMITS(0, 0x7c, 0x99), /* 2.5V: 1.8V +/- 10% */
|
|
LM87_IN_LIMITS(1, 0x4c, 0x5e), /* Vccp1: 1.2V +/- 10% */
|
|
LM87_IN_LIMITS(2, 0xac, 0xd4), /* 3.3V: 3.3V +/- 10% */
|
|
LM87_IN_LIMITS(3, 0xac, 0xd4), /* 5V: 5.0V +/- 10% */
|
|
LM87_IN_LIMITS(4, 0xac, 0xe0), /* 12V: 10.8-14V */
|
|
LM87_IN_LIMITS(5, 0x3f, 0x4f), /* Vccp2: 1.0V +/- 10% */
|
|
LM87_AIN_LIMITS(0, 0x98, 0xbb), /* AIN1: 1.66V +/- 10% */
|
|
LM87_AIN_LIMITS(1, 0x8a, 0xa9), /* AIN2: 1.5V +/- 10% */
|
|
LM87_TEMP_INT_LIMITS(0, 80 + FALCON_BOARD_TEMP_BIAS),
|
|
LM87_TEMP_EXT1_LIMITS(0, FALCON_JUNC_TEMP_MAX),
|
|
0
|
|
};
|
|
|
|
static struct i2c_board_info sfe4002_hwmon_info = {
|
|
I2C_BOARD_INFO("lm87", 0x2e),
|
|
.platform_data = &sfe4002_lm87_channel,
|
|
};
|
|
|
|
/****************************************************************************/
|
|
/* LED allocations. Note that on rev A0 boards the schematic and the reality
|
|
* differ: red and green are swapped. Below is the fixed (A1) layout (there
|
|
* are only 3 A0 boards in existence, so no real reason to make this
|
|
* conditional).
|
|
*/
|
|
#define SFE4002_FAULT_LED (2) /* Red */
|
|
#define SFE4002_RX_LED (0) /* Green */
|
|
#define SFE4002_TX_LED (1) /* Amber */
|
|
|
|
static void sfe4002_init_phy(struct efx_nic *efx)
|
|
{
|
|
/* Set the TX and RX LEDs to reflect status and activity, and the
|
|
* fault LED off */
|
|
falcon_qt202x_set_led(efx, SFE4002_TX_LED,
|
|
QUAKE_LED_TXLINK | QUAKE_LED_LINK_ACTSTAT);
|
|
falcon_qt202x_set_led(efx, SFE4002_RX_LED,
|
|
QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACTSTAT);
|
|
falcon_qt202x_set_led(efx, SFE4002_FAULT_LED, QUAKE_LED_OFF);
|
|
}
|
|
|
|
static void sfe4002_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
|
|
{
|
|
falcon_qt202x_set_led(
|
|
efx, SFE4002_FAULT_LED,
|
|
(mode == EFX_LED_ON) ? QUAKE_LED_ON : QUAKE_LED_OFF);
|
|
}
|
|
|
|
static int sfe4002_check_hw(struct efx_nic *efx)
|
|
{
|
|
struct falcon_board *board = falcon_board(efx);
|
|
|
|
/* A0 board rev. 4002s report a temperature fault the whole time
|
|
* (bad sensor) so we mask it out. */
|
|
unsigned alarm_mask =
|
|
(board->major == 0 && board->minor == 0) ?
|
|
~LM87_ALARM_TEMP_EXT1 : ~0;
|
|
|
|
return efx_check_lm87(efx, alarm_mask);
|
|
}
|
|
|
|
static int sfe4002_init(struct efx_nic *efx)
|
|
{
|
|
return efx_init_lm87(efx, &sfe4002_hwmon_info, sfe4002_lm87_regs);
|
|
}
|
|
|
|
/*****************************************************************************
|
|
* Support for the SFN4112F
|
|
*
|
|
*/
|
|
static u8 sfn4112f_lm87_channel = 0x03; /* use AIN not FAN inputs */
|
|
|
|
static const u8 sfn4112f_lm87_regs[] = {
|
|
LM87_IN_LIMITS(0, 0x7c, 0x99), /* 2.5V: 1.8V +/- 10% */
|
|
LM87_IN_LIMITS(1, 0x4c, 0x5e), /* Vccp1: 1.2V +/- 10% */
|
|
LM87_IN_LIMITS(2, 0xac, 0xd4), /* 3.3V: 3.3V +/- 10% */
|
|
LM87_IN_LIMITS(4, 0xac, 0xe0), /* 12V: 10.8-14V */
|
|
LM87_IN_LIMITS(5, 0x3f, 0x4f), /* Vccp2: 1.0V +/- 10% */
|
|
LM87_AIN_LIMITS(1, 0x8a, 0xa9), /* AIN2: 1.5V +/- 10% */
|
|
LM87_TEMP_INT_LIMITS(0, 60 + FALCON_BOARD_TEMP_BIAS),
|
|
LM87_TEMP_EXT1_LIMITS(0, FALCON_JUNC_TEMP_MAX),
|
|
0
|
|
};
|
|
|
|
static struct i2c_board_info sfn4112f_hwmon_info = {
|
|
I2C_BOARD_INFO("lm87", 0x2e),
|
|
.platform_data = &sfn4112f_lm87_channel,
|
|
};
|
|
|
|
#define SFN4112F_ACT_LED 0
|
|
#define SFN4112F_LINK_LED 1
|
|
|
|
static void sfn4112f_init_phy(struct efx_nic *efx)
|
|
{
|
|
falcon_qt202x_set_led(efx, SFN4112F_ACT_LED,
|
|
QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACT);
|
|
falcon_qt202x_set_led(efx, SFN4112F_LINK_LED,
|
|
QUAKE_LED_RXLINK | QUAKE_LED_LINK_STAT);
|
|
}
|
|
|
|
static void sfn4112f_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
|
|
{
|
|
int reg;
|
|
|
|
switch (mode) {
|
|
case EFX_LED_OFF:
|
|
reg = QUAKE_LED_OFF;
|
|
break;
|
|
case EFX_LED_ON:
|
|
reg = QUAKE_LED_ON;
|
|
break;
|
|
default:
|
|
reg = QUAKE_LED_RXLINK | QUAKE_LED_LINK_STAT;
|
|
break;
|
|
}
|
|
|
|
falcon_qt202x_set_led(efx, SFN4112F_LINK_LED, reg);
|
|
}
|
|
|
|
static int sfn4112f_check_hw(struct efx_nic *efx)
|
|
{
|
|
/* Mask out unused sensors */
|
|
return efx_check_lm87(efx, ~0x48);
|
|
}
|
|
|
|
static int sfn4112f_init(struct efx_nic *efx)
|
|
{
|
|
return efx_init_lm87(efx, &sfn4112f_hwmon_info, sfn4112f_lm87_regs);
|
|
}
|
|
|
|
static const struct falcon_board_type board_types[] = {
|
|
{
|
|
.id = FALCON_BOARD_SFE4001,
|
|
.ref_model = "SFE4001",
|
|
.gen_type = "10GBASE-T adapter",
|
|
.init = sfe4001_init,
|
|
.init_phy = efx_port_dummy_op_void,
|
|
.fini = sfe4001_fini,
|
|
.set_id_led = tenxpress_set_id_led,
|
|
.monitor = sfe4001_check_hw,
|
|
},
|
|
{
|
|
.id = FALCON_BOARD_SFE4002,
|
|
.ref_model = "SFE4002",
|
|
.gen_type = "XFP adapter",
|
|
.init = sfe4002_init,
|
|
.init_phy = sfe4002_init_phy,
|
|
.fini = efx_fini_lm87,
|
|
.set_id_led = sfe4002_set_id_led,
|
|
.monitor = sfe4002_check_hw,
|
|
},
|
|
{
|
|
.id = FALCON_BOARD_SFN4111T,
|
|
.ref_model = "SFN4111T",
|
|
.gen_type = "100/1000/10GBASE-T adapter",
|
|
.init = sfn4111t_init,
|
|
.init_phy = sfn4111t_init_phy,
|
|
.fini = sfn4111t_fini,
|
|
.set_id_led = tenxpress_set_id_led,
|
|
.monitor = sfn4111t_check_hw,
|
|
},
|
|
{
|
|
.id = FALCON_BOARD_SFN4112F,
|
|
.ref_model = "SFN4112F",
|
|
.gen_type = "SFP+ adapter",
|
|
.init = sfn4112f_init,
|
|
.init_phy = sfn4112f_init_phy,
|
|
.fini = efx_fini_lm87,
|
|
.set_id_led = sfn4112f_set_id_led,
|
|
.monitor = sfn4112f_check_hw,
|
|
},
|
|
};
|
|
|
|
static const struct falcon_board_type falcon_dummy_board = {
|
|
.init = efx_port_dummy_op_int,
|
|
.init_phy = efx_port_dummy_op_void,
|
|
.fini = efx_port_dummy_op_void,
|
|
.set_id_led = efx_port_dummy_op_set_id_led,
|
|
.monitor = efx_port_dummy_op_int,
|
|
};
|
|
|
|
void falcon_probe_board(struct efx_nic *efx, u16 revision_info)
|
|
{
|
|
struct falcon_board *board = falcon_board(efx);
|
|
u8 type_id = FALCON_BOARD_TYPE(revision_info);
|
|
int i;
|
|
|
|
board->major = FALCON_BOARD_MAJOR(revision_info);
|
|
board->minor = FALCON_BOARD_MINOR(revision_info);
|
|
|
|
for (i = 0; i < ARRAY_SIZE(board_types); i++)
|
|
if (board_types[i].id == type_id)
|
|
board->type = &board_types[i];
|
|
|
|
if (board->type) {
|
|
EFX_INFO(efx, "board is %s rev %c%d\n",
|
|
(efx->pci_dev->subsystem_vendor == EFX_VENDID_SFC)
|
|
? board->type->ref_model : board->type->gen_type,
|
|
'A' + board->major, board->minor);
|
|
} else {
|
|
EFX_ERR(efx, "unknown board type %d\n", type_id);
|
|
board->type = &falcon_dummy_board;
|
|
}
|
|
}
|