Andrzej Hajda 0df5e4acf5 drm/exynos/mixer: replace MXR_INT_EN register cache with flag ... Driver uses only VSYNC interrupts, so we need to cache VSYNC bit state only. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Reviewed-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>		2015-08-16 10:23:33 +09:00
..
drm	drm/exynos/mixer: replace MXR_INT_EN register cache with flag	2015-08-16 10:23:33 +09:00
host1x	gpu: host1x: Export host1x_syncpt_read()	2015-04-02 18:46:20 +02:00
ipu-v3	GPU: ipu: fix lockup caused by pending chained interrupts	2015-07-10 11:02:46 +02:00
vga	vga_switcheroo: Remove unnecessary checks	2015-08-12 17:13:19 +02:00
Makefile	gpu: host1x: Provide a proper struct bus_type	2015-01-27 10:09:14 +01:00