linux/drivers/dma/qcom
Sinan Kaya 0e858f8d6f dmaengine: qcom_hidma: protect common data structures
When MSI interrupts are supported, error and the transfer interrupt can
come from multiple processor contexts.

Each error interrupt is an MSI interrupt. If the channel is disabled by
the first error interrupt, the remaining error interrupts will gracefully
return in the interrupt handler.

If an error is observed while servicing the completions in success case,
the posting of the completions will be aborted as soon as channel disabled
state is observed. The error interrupt handler will take it from there and
finish the remaining completions. We don't want to create multiple success
and error messages to be delivered to the client in mixed order.

Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-11-03 18:55:45 +05:30
..
Kconfig dmaengine: add Qualcomm Technologies HIDMA channel driver 2016-03-11 07:42:30 +05:30
Makefile dmaengine: qcom_hidma: add debugfs hooks 2016-05-14 11:54:45 +05:30
bam_dma.c dmaengine: qcom-bam-dma: add __maybe_unused annotations for PM 2016-07-06 22:39:43 +05:30
hidma.c dmaengine: qcom_hidma: add error reporting for tx_status 2016-08-31 21:27:32 +05:30
hidma.h dmaengine: qcom_hidma: make pending_tre_count atomic 2016-11-03 18:55:44 +05:30
hidma_dbg.c dmaengine: qcom_hidma: make pending_tre_count atomic 2016-11-03 18:55:44 +05:30
hidma_ll.c dmaengine: qcom_hidma: protect common data structures 2016-11-03 18:55:45 +05:30
hidma_mgmt.c dmaengine: qcom_hidma: configure DMA and MSI for OF 2016-10-19 19:02:58 +05:30
hidma_mgmt.h
hidma_mgmt_sys.c