Alex Deucher aa5e24e5f8 drm/amd: add new gfx8 register definitions for EDC ... EDC is a RAS feature for on chip memory. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2015-12-02 15:54:18 -05:00
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bif	drm/amdgpu: add BIF 5.1 register headers	2015-06-03 21:02:51 -04:00
dce	drm/amdgpu: add DCE 11.0 register headers	2015-06-03 21:02:54 -04:00
gca	drm/amd: add new gfx8 register definitions for EDC	2015-12-02 15:54:18 -05:00
gmc	drm/amdgpu: add GMC 8.2 register headers	2015-06-03 21:02:59 -04:00
oss	drm/amdgpu: add OSS 3.0.1 register headers	2015-06-03 21:03:02 -04:00
smu	drm/amdgpu: Add Fiji smu 7.1.3 headers (v2)	2015-08-17 16:50:25 -04:00
uvd	drm/amdgpu: add UVD 6.0 register headers	2015-06-03 21:03:08 -04:00
vce	drm/amdgpu: add VCE 3.0 register headers	2015-06-03 21:03:10 -04:00